soc: silabs: add support for setting low power states

This commit adds sys_set_power_state() function with support for EM1
Sleep, EM2 Deep Sleep, EM3 Stop power modes on Silabs SoCs.

Tested on efr32_slwstk6061a board.

Note: No support for efm32hg, efm32wg series at this point due to the
missing possibility of placing function code in RAM, required by errata
in SiLabs library code.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>

soc/arm/silabs_exx32/Kconfig.defconfig

@@ -1 +1,8 @@
 source "soc/arm/silabs_exx32/*/Kconfig.defconfig.series"
+
+if SYS_POWER_MANAGEMENT
+
+config SOC_GECKO_EMU
+	default y
+
+endif # SYS_POWER_MANAGEMENT

soc/arm/silabs_exx32/common/CMakeLists.txt

@@ -1 +1,3 @@
 zephyr_sources(soc.c soc_gpio.c)
+
+zephyr_sources_ifdef(CONFIG_SYS_POWER_MANAGEMENT soc_power.c)

soc/arm/silabs_exx32/common/soc_power.c

@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2018, Piotr Mienkowski
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include <zephyr.h>
+#include <power.h>
+#include <em_emu.h>
+
+#include <logging/log.h>
+LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
+
+/*
+ * Power state map:
+ * SYS_POWER_STATE_CPU_LPS_1: EM1 Sleep
+ * SYS_POWER_STATE_CPU_LPS_2: EM2 Deep Sleep
+ * SYS_POWER_STATE_CPU_LPS_3: EM3 Stop
+ */
+
+/* Invoke Low Power/System Off specific Tasks */
+void sys_set_power_state(enum power_states state)
+{
+	LOG_DBG("SoC entering power state %d", state);
+
+	/* FIXME: When this function is entered the Kernel has disabled
+	 * interrupts using BASEPRI register. This is incorrect as it prevents
+	 * waking up from any interrupt which priority is not 0. Work around the
+	 * issue and disable interrupts using PRIMASK register as recommended
+	 * by ARM.
+	 */
+
+	/* Set PRIMASK */
+	__disable_irq();
+	/* Set BASEPRI to 0 */
+	irq_unlock(0);
+
+	switch (state) {
+#ifdef CONFIG_SYS_POWER_LOW_POWER_STATES
+#ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
+	case SYS_POWER_STATE_CPU_LPS_1:
+		EMU_EnterEM1();
+		break;
+#endif /* CONFIG_SYS_POWER_STATE_CPU_LPS_1_SUPPORTED */
+#ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
+	case SYS_POWER_STATE_CPU_LPS_2:
+		EMU_EnterEM2(true);
+		break;
+#endif /* CONFIG_SYS_POWER_STATE_CPU_LPS_2_SUPPORTED */
+#ifdef CONFIG_SYS_POWER_STATE_CPU_LPS_3_SUPPORTED
+	case SYS_POWER_STATE_CPU_LPS_3:
+		EMU_EnterEM3(true);
+		break;
+#endif /* CONFIG_SYS_POWER_STATE_CPU_LPS_3_SUPPORTED */
+#endif /* CONFIG_SYS_POWER_LOW_POWER_STATES */
+	default:
+		LOG_ERR("Unsupported power state %u", state);
+		break;
+	}
+
+	LOG_DBG("SoC leaving power state %d", state);
+
+	/* Clear PRIMASK */
+	__enable_irq();
+}
+
+/* Handle SOC specific activity after Low Power Mode Exit */
+void sys_power_state_post_ops(enum power_states state)
+{
+	ARG_UNUSED(state);
+}

soc/arm/silabs_exx32/efm32pg12b/Kconfig.series

@@ -13,6 +13,10 @@ config SOC_SERIES_EFM32PG12B
 	select CPU_HAS_FPU
 	select SOC_FAMILY_EXX32
 	select CPU_HAS_SYSTICK
+	select SYS_POWER_LOW_POWER_STATES_SUPPORTED
+	select SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
+	select SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
+	select SYS_POWER_STATE_CPU_LPS_3_SUPPORTED
 	select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
 	select SOC_GECKO_CMU
 	select SOC_GECKO_EMU

soc/arm/silabs_exx32/efr32fg1p/Kconfig.series

@@ -13,6 +13,10 @@ config SOC_SERIES_EFR32FG1P
 	select CPU_HAS_FPU
 	select SOC_FAMILY_EXX32
 	select CPU_HAS_SYSTICK
+	select SYS_POWER_LOW_POWER_STATES_SUPPORTED
+	select SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
+	select SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
+	select SYS_POWER_STATE_CPU_LPS_3_SUPPORTED
 	select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
 	select SOC_GECKO_CMU
 	select SOC_GECKO_GPIO

soc/arm/silabs_exx32/efr32mg12p/Kconfig.series

@@ -13,6 +13,10 @@ config SOC_SERIES_EFR32MG12P
 	select CPU_HAS_SYSTICK
 	select HAS_SILABS_GECKO
 	select HAS_SWO
+	select SYS_POWER_LOW_POWER_STATES_SUPPORTED
+	select SYS_POWER_STATE_CPU_LPS_1_SUPPORTED
+	select SYS_POWER_STATE_CPU_LPS_2_SUPPORTED
+	select SYS_POWER_STATE_CPU_LPS_3_SUPPORTED
 	select SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
 	select SOC_GECKO_CMU
 	select SOC_GECKO_EMU