spell: fix doxygen comment typos: /drivers

Fix doxygen comment typos used to generate API docs

Change-Id: I6fd5051c99bdcc731740c92001e525349c254d85
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This commit is contained in:
David B. Kinder 2017-04-19 10:45:34 -07:00
parent 8df439b40b
commit 896cf7a00a
15 changed files with 28 additions and 28 deletions

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@ -29,7 +29,7 @@ int nble_open(void);
* transmission is already going, message needs to be queued
*
* @note This function needs to be executed with (UART) irq off to avoid
* pre-emption from uart_ipc_isr causing state variable corruption.
* preemption from uart_ipc_isr causing state variable corruption.
* It also called from uart_ipc_isr() to send the next IPC message.
*/
int ipc_uart_ns16550_send_pdu(struct device *dev, void *handle, int len,

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@ -12,7 +12,7 @@
* Telnet console driver.
* Hooks into the printk and fputc (for printf) modules.
*
* Telnet has been standardised in 1983
* Telnet has been standardized in 1983
* RFC 854 - https://tools.ietf.org/html/rfc854
*/

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@ -97,7 +97,7 @@ static void _config(struct device *dev, uint32_t mask, int flags)
}
/**
* @brief Configurate pin or port
* @brief Configure pin or port
*
* @param dev Device struct
* @param access_op Access operation (pin or port)

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@ -11,12 +11,12 @@
* This is a driver for accessing a simple, fixed purpose, 32-bit
* memory-mapped i/o register using the same APIs as GPIO drivers. This is
* useful when an SoC or board has registers that aren't part of a GPIO IP
* block and these registers are used to control things that Zephyr normaly
* block and these registers are used to control things that Zephyr normally
* expects to be specified using a GPIO pin, e.g. for driving an LED, or
* chip-select line for an SPI device.
*
* The implementation expects that all bits of the hardware register are both
* readable and writeable, and that for any bits that act as outputs, the value
* readable and writable, and that for any bits that act as outputs, the value
* read will have the value that was last written to it. This requirement
* stems from the use of a read-modify-write method for all changes.
*

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@ -336,7 +336,7 @@ done:
}
/**
* @brief Configurate pin or port
* @brief Configure pin or port
*
* @param dev Device struct of the PCAL9535A
* @param access_op Access operation (pin or port)

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@ -207,8 +207,8 @@ void stm32_exti_trigger(int line, int trigger)
* Check EXTI lines in range @min @max for pending interrupts
*
* @param arg isr argument
* @parram min low end of EXTI# range
* @parram max low end of EXTI# range
* @param min low end of EXTI# range
* @param max low end of EXTI# range
*/
static void __stm32_exti_isr(int min, int max, void *arg)
{

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@ -375,7 +375,7 @@ void _loapic_irq_disable(unsigned int irq)
*
* This routine finds the vector of the interrupt that is being processed.
* The ISR (In-Service Register) register contain the vectors of the interrupts
* in service. And the higher vector is the indentification of the interrupt
* in service. And the higher vector is the identification of the interrupt
* being currently processed.
*
* This function must be called with interrupts locked in interrupt context.

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@ -6,7 +6,7 @@
/**
* @file
* @brief LOAPIC spurioys interrupt handler
* @brief LOAPIC spurious interrupt handler
*/
#include <kernel_structs.h>

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@ -199,7 +199,7 @@ void __irq_controller_irq_config(unsigned int vector, unsigned int irq,
*
* This routine finds the vector of the interrupt that is being processed.
* The ISR (In-Service Register) register contain the vectors of the interrupts
* in service. And the higher vector is the indentification of the interrupt
* in service. And the higher vector is the identification of the interrupt
* being currently processed.
*
* MVIC ISR registers' offsets:

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@ -47,24 +47,24 @@
*
* INTERNALS
* The whole logic runs around a structure: struct lookup_data, which exists
* on one instanciation called 'lookup'.
* on one instantiation called 'lookup'.
* Such structure is used for 2 distinct roles:
* - to match devices the caller is looking for
* - to loop on PCI bus, devices, function and BARs
*
* The search criterias are the class and/or the vendor_id/device_id of a PCI
* The search criteria are the class and/or the vendor_id/device_id of a PCI
* device. The caller first initializes the lookup structure by calling
* pci_bus_scan_init(), which will reset the search criterias as well as the
* loop paramaters to 0. At the very first subsequent call of pci_bus_scan()
* the lookup structure will store the search criterias. Then the loop starts.
* pci_bus_scan_init(), which will reset the search criteria as well as the
* loop parameters to 0. At the very first subsequent call of pci_bus_scan()
* the lookup structure will store the search criteria. Then the loop starts.
* For each bus it will run through each device on which it will loop on each
* function and BARs, as long as the criterias does not match or until it hit
* function and BARs, as long as the criteria does not match or until it hit
* the limit of bus/dev/functions to scan.
*
* On a successful match, it will stop the loop, fill in the caller's
* pci_dev_info structure with the found device information, and return 1.
* Hopefully, the lookup structure still remembers where it stopped and the
* original search criterias. Thus, when the caller asks to scan again for
* original search criteria. Thus, when the caller asks to scan again for
* a possible result next, the loop will restart where it stopped.
* That will work as long as there are relevant results found.
*/
@ -352,8 +352,8 @@ void pci_bus_scan_init(void)
*
* @brief Scans PCI bus for devices
*
* The routine scans the PCI bus for the devices on criterias provided in the
* given dev_info at first call. Which criterias can be class and/or
* The routine scans the PCI bus for the devices on criteria provided in the
* given dev_info at first call. Which criteria can be class and/or
* vendor_id/device_id.
*
* @return 1 on success, 0 otherwise. On success, dev_info is filled in with

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@ -320,7 +320,7 @@ void pci_read(uint32_t controller, union pci_addr_reg addr,
* the caller to enforce this.
*
* @param controller is the PCI controller to use
* @param addr is the PCI addres to read
* @param addr is the PCI address to read
* @param size is the size in bytes to write
* @param data is the data to write
*

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@ -282,7 +282,7 @@ struct stm32_pinmux_conf {
* @param func alternate function ID
*
* Helper function for mapping alternate function for given pin to its
* configuration. This function must be implemented by SoC integartion
* configuration. This function must be implemented by SoC integration
* code.
*
* @return SoC specific pin configuration
@ -295,7 +295,7 @@ int stm32_get_pin_config(int pin, int func);
* @param port IO port
*
* Map given IO @port to corresponding clock subsystem. The returned
* clock subsystemd ID must suitable for passing as parameter to
* clock subsystem ID must suitable for passing as parameter to
* clock_control_on(). Implement this function at the SoC level.
*
* @return clock subsystem ID
@ -321,7 +321,7 @@ int _pinmux_stm32_set(uint32_t pin, uint32_t func,
* Obtain pin assignment/configuration for current board. This call
* needs to be implemented at the board integration level. After
* restart all pins are already configured as GPIO and can be skipped
* in the configuration arrray. Pin numbers in @pin_num field are
* in the configuration array. Pin numbers in @pin_num field are
* STM32PIN() encoded.
*
* @return array of pin assignments

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@ -18,7 +18,7 @@
* @brief Measure duration of signal send by sensor
*
* @param drv_data Pointer to the driver data structure
* @param singnal_val Value of signal being measured
* @param signal_val Value of signal being measured
*
* @return duration in usec of signal being measured,
* -1 if duration exceeds DHT_SIGNAL_MAX_WAIT_DURATION

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@ -302,7 +302,7 @@ static inline int ns16550_pci_uart_scan(struct device *dev)
*
* @param dev UART device struct
*
* @return 0 if successful, failed othersie
* @return 0 if successful, failed otherwise
*/
static int uart_ns16550_init(struct device *dev)
{

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@ -56,7 +56,7 @@
* Its handler may make a task or fiber ready to run, so any elapsed ticks
* must be accounted for and the timer must also expire at the end of the
* next logical tick so _timer_int_handler() can put it back in periodic mode.
* This can only be distinguished from the previous factor by the executiion of
* This can only be distinguished from the previous factor by the execution of
* _timer_int_handler().
*
* 6. Tickless idle may end naturally. The down counter should be zero in
@ -315,7 +315,7 @@ static void tickless_idle_init(void)
* Re-program the timer to enter into the idle state for the given number of
* ticks. It is placed into one shot mode where it will fire in the number of
* ticks supplied or the maximum number of ticks that can be programmed into
* hardware. A value of -1 means inifinite number of ticks.
* hardware. A value of -1 means infinite number of ticks.
*
* @return N/A
*/