spell: fix doxygen comment typos: /drivers
Fix doxygen comment typos used to generate API docs Change-Id: I6fd5051c99bdcc731740c92001e525349c254d85 Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
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@ -29,7 +29,7 @@ int nble_open(void);
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* transmission is already going, message needs to be queued
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*
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* @note This function needs to be executed with (UART) irq off to avoid
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* pre-emption from uart_ipc_isr causing state variable corruption.
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* preemption from uart_ipc_isr causing state variable corruption.
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* It also called from uart_ipc_isr() to send the next IPC message.
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*/
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int ipc_uart_ns16550_send_pdu(struct device *dev, void *handle, int len,
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@ -12,7 +12,7 @@
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* Telnet console driver.
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* Hooks into the printk and fputc (for printf) modules.
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*
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* Telnet has been standardised in 1983
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* Telnet has been standardized in 1983
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* RFC 854 - https://tools.ietf.org/html/rfc854
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*/
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@ -97,7 +97,7 @@ static void _config(struct device *dev, uint32_t mask, int flags)
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}
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/**
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* @brief Configurate pin or port
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* @brief Configure pin or port
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*
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* @param dev Device struct
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* @param access_op Access operation (pin or port)
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@ -11,12 +11,12 @@
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* This is a driver for accessing a simple, fixed purpose, 32-bit
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* memory-mapped i/o register using the same APIs as GPIO drivers. This is
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* useful when an SoC or board has registers that aren't part of a GPIO IP
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* block and these registers are used to control things that Zephyr normaly
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* block and these registers are used to control things that Zephyr normally
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* expects to be specified using a GPIO pin, e.g. for driving an LED, or
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* chip-select line for an SPI device.
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*
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* The implementation expects that all bits of the hardware register are both
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* readable and writeable, and that for any bits that act as outputs, the value
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* readable and writable, and that for any bits that act as outputs, the value
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* read will have the value that was last written to it. This requirement
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* stems from the use of a read-modify-write method for all changes.
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*
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@ -336,7 +336,7 @@ done:
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}
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/**
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* @brief Configurate pin or port
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* @brief Configure pin or port
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*
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* @param dev Device struct of the PCAL9535A
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* @param access_op Access operation (pin or port)
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@ -207,8 +207,8 @@ void stm32_exti_trigger(int line, int trigger)
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* Check EXTI lines in range @min @max for pending interrupts
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*
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* @param arg isr argument
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* @parram min low end of EXTI# range
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* @parram max low end of EXTI# range
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* @param min low end of EXTI# range
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* @param max low end of EXTI# range
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*/
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static void __stm32_exti_isr(int min, int max, void *arg)
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{
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@ -375,7 +375,7 @@ void _loapic_irq_disable(unsigned int irq)
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*
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* This routine finds the vector of the interrupt that is being processed.
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* The ISR (In-Service Register) register contain the vectors of the interrupts
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* in service. And the higher vector is the indentification of the interrupt
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* in service. And the higher vector is the identification of the interrupt
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* being currently processed.
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*
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* This function must be called with interrupts locked in interrupt context.
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@ -6,7 +6,7 @@
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/**
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* @file
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* @brief LOAPIC spurioys interrupt handler
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* @brief LOAPIC spurious interrupt handler
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*/
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#include <kernel_structs.h>
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@ -199,7 +199,7 @@ void __irq_controller_irq_config(unsigned int vector, unsigned int irq,
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*
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* This routine finds the vector of the interrupt that is being processed.
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* The ISR (In-Service Register) register contain the vectors of the interrupts
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* in service. And the higher vector is the indentification of the interrupt
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* in service. And the higher vector is the identification of the interrupt
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* being currently processed.
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*
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* MVIC ISR registers' offsets:
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@ -47,24 +47,24 @@
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*
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* INTERNALS
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* The whole logic runs around a structure: struct lookup_data, which exists
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* on one instanciation called 'lookup'.
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* on one instantiation called 'lookup'.
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* Such structure is used for 2 distinct roles:
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* - to match devices the caller is looking for
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* - to loop on PCI bus, devices, function and BARs
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*
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* The search criterias are the class and/or the vendor_id/device_id of a PCI
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* The search criteria are the class and/or the vendor_id/device_id of a PCI
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* device. The caller first initializes the lookup structure by calling
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* pci_bus_scan_init(), which will reset the search criterias as well as the
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* loop paramaters to 0. At the very first subsequent call of pci_bus_scan()
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* the lookup structure will store the search criterias. Then the loop starts.
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* pci_bus_scan_init(), which will reset the search criteria as well as the
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* loop parameters to 0. At the very first subsequent call of pci_bus_scan()
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* the lookup structure will store the search criteria. Then the loop starts.
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* For each bus it will run through each device on which it will loop on each
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* function and BARs, as long as the criterias does not match or until it hit
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* function and BARs, as long as the criteria does not match or until it hit
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* the limit of bus/dev/functions to scan.
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*
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* On a successful match, it will stop the loop, fill in the caller's
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* pci_dev_info structure with the found device information, and return 1.
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* Hopefully, the lookup structure still remembers where it stopped and the
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* original search criterias. Thus, when the caller asks to scan again for
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* original search criteria. Thus, when the caller asks to scan again for
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* a possible result next, the loop will restart where it stopped.
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* That will work as long as there are relevant results found.
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*/
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@ -352,8 +352,8 @@ void pci_bus_scan_init(void)
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*
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* @brief Scans PCI bus for devices
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*
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* The routine scans the PCI bus for the devices on criterias provided in the
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* given dev_info at first call. Which criterias can be class and/or
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* The routine scans the PCI bus for the devices on criteria provided in the
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* given dev_info at first call. Which criteria can be class and/or
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* vendor_id/device_id.
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*
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* @return 1 on success, 0 otherwise. On success, dev_info is filled in with
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@ -320,7 +320,7 @@ void pci_read(uint32_t controller, union pci_addr_reg addr,
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* the caller to enforce this.
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*
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* @param controller is the PCI controller to use
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* @param addr is the PCI addres to read
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* @param addr is the PCI address to read
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* @param size is the size in bytes to write
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* @param data is the data to write
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*
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@ -282,7 +282,7 @@ struct stm32_pinmux_conf {
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* @param func alternate function ID
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*
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* Helper function for mapping alternate function for given pin to its
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* configuration. This function must be implemented by SoC integartion
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* configuration. This function must be implemented by SoC integration
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* code.
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*
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* @return SoC specific pin configuration
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@ -295,7 +295,7 @@ int stm32_get_pin_config(int pin, int func);
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* @param port IO port
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*
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* Map given IO @port to corresponding clock subsystem. The returned
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* clock subsystemd ID must suitable for passing as parameter to
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* clock subsystem ID must suitable for passing as parameter to
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* clock_control_on(). Implement this function at the SoC level.
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*
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* @return clock subsystem ID
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@ -321,7 +321,7 @@ int _pinmux_stm32_set(uint32_t pin, uint32_t func,
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* Obtain pin assignment/configuration for current board. This call
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* needs to be implemented at the board integration level. After
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* restart all pins are already configured as GPIO and can be skipped
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* in the configuration arrray. Pin numbers in @pin_num field are
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* in the configuration array. Pin numbers in @pin_num field are
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* STM32PIN() encoded.
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*
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* @return array of pin assignments
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@ -18,7 +18,7 @@
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* @brief Measure duration of signal send by sensor
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*
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* @param drv_data Pointer to the driver data structure
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* @param singnal_val Value of signal being measured
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* @param signal_val Value of signal being measured
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*
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* @return duration in usec of signal being measured,
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* -1 if duration exceeds DHT_SIGNAL_MAX_WAIT_DURATION
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@ -302,7 +302,7 @@ static inline int ns16550_pci_uart_scan(struct device *dev)
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*
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* @param dev UART device struct
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*
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* @return 0 if successful, failed othersie
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* @return 0 if successful, failed otherwise
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*/
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static int uart_ns16550_init(struct device *dev)
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{
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@ -56,7 +56,7 @@
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* Its handler may make a task or fiber ready to run, so any elapsed ticks
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* must be accounted for and the timer must also expire at the end of the
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* next logical tick so _timer_int_handler() can put it back in periodic mode.
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* This can only be distinguished from the previous factor by the executiion of
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* This can only be distinguished from the previous factor by the execution of
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* _timer_int_handler().
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*
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* 6. Tickless idle may end naturally. The down counter should be zero in
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@ -315,7 +315,7 @@ static void tickless_idle_init(void)
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* Re-program the timer to enter into the idle state for the given number of
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* ticks. It is placed into one shot mode where it will fire in the number of
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* ticks supplied or the maximum number of ticks that can be programmed into
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* hardware. A value of -1 means inifinite number of ticks.
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* hardware. A value of -1 means infinite number of ticks.
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*
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* @return N/A
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*/
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