patrick/zephyr
1
0
Fork 0
Code Issues Pull requests Actions 8 Packages Projects Releases Wiki Activity

soc: viper: update registers and interrupt numbers

Browse source 
Update register addresses and NVIC/GIC interrupt numbers
according to the latest viper RTL version.

Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
This commit is contained in:
Raveendra Padasalagi 2021-02-25 10:53:46 +05:30 committed by Kumar Gala
parent 61e0e14df1
commit 8c704ea3a8
3 changed files with 11 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
dts/arm/broadcom/viper-a72.dtsi
View file

@ -56,6 +56,12 @@
&uart1 {
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
};
&paxdma {
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
};

6
dts/arm/broadcom/viper-m7.dtsi
View file

@ -38,17 +38,17 @@
};
&uart1 {
interrupts = <197 3>;
interrupts = <203 3>;
};
&pcie0_ep {
interrupt-parent = <&nvic>;
interrupts = <44 3>, <46 3>, <98 3>, <123 3>, <215 3>;
interrupts = <44 3>, <46 3>, <98 3>, <99 3>, <215 3>;
interrupt-names = "perst", "perst_inband", "flr",
"snoop_irq1", "pcie_pmon_lite";
};
&paxdma {
interrupt-parent = <&nvic>;
interrupts = <226 3>;
interrupts = <228 3>;
};

2
soc/arm/bcm_vk/viper/soc.h
View file

@ -299,7 +299,7 @@ typedef enum IRQn {
#define LS_ICFG_PMON_LITE_CLK_CTRL 0x482f00bc
#define PCIE_PMON_LITE_CLK_ENABLE (BIT(0) | BIT(2))
#define LS_ICFG_PMON_LITE_SW_RESETN 0x482f011c
#define LS_ICFG_PMON_LITE_SW_RESETN 0x482f0120
#define PCIE_PMON_LITE_SW_RESETN BIT(0)
#endif