hexiwear_kw40z: Add hexiwear_kw40z board
Adds initial support and documentation for the kw40z on the hexiwear board. Jira: ZEP-1391 Change-Id: Idb58bfb3c2951b1f737a8c547860bde4ef4d9a3e Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
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11
boards/arm/hexiwear_kw40z/Kconfig.board
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11
boards/arm/hexiwear_kw40z/Kconfig.board
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# Kconfig - Hexiwear KW40Z board
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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config BOARD_HEXIWEAR_KW40Z
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bool "Hexiwear KW40Z"
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depends on SOC_SERIES_KINETIS_KWX
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select SOC_PART_NUMBER_MKW40Z160VHT4
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65
boards/arm/hexiwear_kw40z/Kconfig.defconfig
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boards/arm/hexiwear_kw40z/Kconfig.defconfig
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# Kconfig - Hexiwear KW40Z board
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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if BOARD_HEXIWEAR_KW40Z
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config BOARD
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default hexiwear_kw40z
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config OSC_XTAL0_FREQ
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default 32000000
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config MCG_FRDIV
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default 5
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config MCG_FCRDIV
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default 0
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if PINMUX_MCUX
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config PINMUX_MCUX_PORTA
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def_bool y
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config PINMUX_MCUX_PORTB
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def_bool n
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config PINMUX_MCUX_PORTC
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def_bool y if UART_MCUX_LPUART_0 || I2C_1
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endif # PINMUX_MCUX
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if GPIO_MCUX
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config GPIO_MCUX_PORTA
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def_bool y
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config GPIO_MCUX_PORTB
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def_bool n
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config GPIO_MCUX_PORTC
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def_bool y if UART_MCUX_LPUART_0 || I2C_1
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endif # GPIO_MCUX
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if UART_MCUX_LPUART
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config UART_MCUX_LPUART_0
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def_bool y
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endif # UART_MCUX
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if I2C
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config I2C_1
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def_bool y
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config I2C_1_IRQ_PRI
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default 0
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endif # I2C
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endif # BOARD_HEXIWEAR_KW40Z
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10
boards/arm/hexiwear_kw40z/Makefile
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10
boards/arm/hexiwear_kw40z/Makefile
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# Makefile - Hexiwear KW40Z board
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#
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# Copyright (c) 2017, NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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ccflags-y += -I$(srctree)/drivers
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obj-$(CONFIG_PINMUX_MCUX) += pinmux.o
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12
boards/arm/hexiwear_kw40z/board.h
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boards/arm/hexiwear_kw40z/board.h
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/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __INC_BOARD_H
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#define __INC_BOARD_H
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#include <soc.h>
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#endif /* __INC_BOARD_H */
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203
boards/arm/hexiwear_kw40z/doc/hexiwear_kw40z.rst
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203
boards/arm/hexiwear_kw40z/doc/hexiwear_kw40z.rst
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.. _hexiwear_kw40z:
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Hexiwear KW40Z
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##############
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Overview
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********
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See :ref:`hexiwear_k64` for a general overview of the Hexiwear board and the
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main application SoC, the K64. The KW40Z is a secondary SoC on the board that
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provides wireless connectivity with a multimode BLE and 802.15.4 radio.
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For more information about the KW40Z SoC:
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- `KW40Z Website`_
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- `KW40Z Datasheet`_
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- `KW40Z Reference Manual`_
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Supported Features
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==================
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The hexiwear_kw40z board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| PINMUX | on-chip | pinmux |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial port-polling; |
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| | | serial port-interrupt |
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+-----------+------------+-------------------------------------+
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| RTT | on-chip | console |
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+-----------+------------+-------------------------------------+
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| FLASH | on-chip | soc flash |
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+-----------+------------+-------------------------------------+
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The default configuration can be found in the defconfig file:
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``boards/arm/hexiwear_kw40z/hexiwear_kw40z_defconfig``
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Other hardware features are not currently supported by the port.
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Connections and IOs
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===================
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The KW40Z SoC has three pairs of pinmux/gpio controllers, but only one is
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currently enabled (PORTC/GPIOC) for the hexiwear_kw40z board.
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+-------+-----------------+---------------------------+
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| Name | Function | Usage |
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+=======+=================+===========================+
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| PTC6 | UART0_RX | UART BT HCI |
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+-------+-----------------+---------------------------+
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| PTC7 | UART0_TX | UART BT HCI |
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+-------+-----------------+---------------------------+
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System Clock
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============
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The KW40Z SoC is configured to use the 32 MHz external oscillator on the board
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with the on-chip FLL to generate a 40 MHz system clock.
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Serial Port
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===========
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The KW40Z SoC has one UART, which is used for BT HCI. The console is available
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using `Segger RTT`_.
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Programming and Debugging
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*************************
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The Hexiwear docking station includes an `OpenSDA`_ serial and debug adaptor
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built into the board. Different firmware options are available for the adaptor
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including Segger J-Link and DAPLink. Because `Segger RTT`_ is required for a
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console, the `Segger J-Link OpenSDA`_ firmware is recommended.
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Segger J-Link
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=============
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Download and install the `Segger J-Link Software and Documentation Pack`_ to
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get the JLinkGDBServer for your host computer.
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Put the OpenSDA adapter into bootloader mode by holding the reset button while
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you power on the board. A USB mass storage device called MAINTENANCE will
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enumerate. Copy the `Segger J-Link OpenSDA V2.1 Bootloader`_ to the MAINTENANCE
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drive. Power cycle the board, this time without holding the reset button.
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Start the GDB Server:
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.. code-block:: console
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$ JLinkGDBServer -if swd -device MKW40Z160xxx4
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SEGGER J-Link GDB Server V6.14b Command Line Version
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JLinkARM.dll V6.14b (DLL compiled Mar 9 2017 08:48:20)
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-----GDB Server start settings-----
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GDBInit file: none
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GDB Server Listening port: 2331
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SWO raw output listening port: 2332
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Terminal I/O port: 2333
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Accept remote connection: yes
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Generate logfile: off
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Verify download: off
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Init regs on start: off
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Silent mode: off
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Single run mode: off
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Target connection timeout: 0 ms
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------J-Link related settings------
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J-Link Host interface: USB
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J-Link script: none
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J-Link settings file: none
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------Target related settings------
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Target device: MKW40Z160xxx4
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Target interface: SWD
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Target interface speed: 1000kHz
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Target endian: little
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Connecting to J-Link...
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J-Link is connected.
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Firmware: J-Link OpenSDA 2 compiled Feb 28 2017 19:27:57
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Hardware: V1.00
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S/N: 621000000
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Checking target voltage...
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Target voltage: 3.30 V
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Listening on TCP/IP port 2331
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Connecting to target...Connected to target
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Waiting for GDB connection...
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In a second terminal, open telnet:
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.. code-block:: console
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$ telnet localhost 19021
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Trying 127.0.0.1...
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Connected to localhost.
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Escape character is '^]'.
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SEGGER J-Link V6.14b - Real time terminal output
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J-Link OpenSDA 2 compiled Feb 28 2017 19:27:57 V1.0, SN=621000000
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Process: JLinkGDBServer
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In a third terminal, build the Zephyr kernel and application:
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.. code-block:: console
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$ cd $ZEPHYR_BASE
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$ . zephyr-env.sh
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$ cd $ZEPHYR_BASE/samples/hello_world/
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$ make BOARD=hexiwear_kw40z
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Start the GDB client:
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.. code-block:: console
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$ arm-zephyr-eabi-gdb outdir/hexiwear_kw40z/zephyr.elf
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Connect to the GDB server:
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.. code-block:: console
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(gdb) target remote localhost:2331
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(gdb) load
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(gdb) monitor reset
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(gdb) continue
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Back in the second terminal where you opened telnet, you should see:
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.. code-block:: console
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***** BOOTING ZEPHYR OS v1.7.99 - BUILD: Apr 6 2017 21:09:52 *****
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Hello World! arm
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.. _KW40Z Website:
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http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/kinetis-cortex-m-mcus/w-series-wireless-m0-plus-m4/kinetis-kw40z-2.4-ghz-dual-mode-ble-and-802.15.4-wireless-radio-microcontroller-mcu-based-on-arm-cortex-m0-plus-core:KW40Z
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.. _KW40Z Datasheet:
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http://www.nxp.com/assets/documents/data/en/data-sheets/MKW40Z160.pdf
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.. _KW40Z Reference Manual:
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http://www.nxp.com/assets/documents/data/en/reference-manuals/MKW40Z160RM.pdf
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.. _Segger RTT:
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https://www.segger.com/jlink-rtt.html
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.. _OpenSDA:
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http://www.nxp.com/products/software-and-tools/hardware-development-tools/startertrak-development-boards/opensda-serial-and-debug-adapter:OPENSDA
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.. _Segger J-Link OpenSDA:
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https://www.segger.com/opensda.html
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.. _Segger J-Link OpenSDA V2.1 Bootloader:
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https://www.segger.com/downloads/jlink/OpenSDA_V2_1.bin
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.. _Segger J-Link Software and Documentation Pack:
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https://www.segger.com/downloads/jlink
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12
boards/arm/hexiwear_kw40z/hexiwear_kw40z_defconfig
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12
boards/arm/hexiwear_kw40z/hexiwear_kw40z_defconfig
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CONFIG_ARM=y
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CONFIG_SOC_MKW40Z4=y
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CONFIG_SOC_SERIES_KINETIS_KWX=y
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CONFIG_BOARD_HEXIWEAR_KW40Z=y
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CONFIG_CONSOLE=y
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CONFIG_RTT_CONSOLE=y
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CONFIG_CORTEX_M_SYSTICK=y
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CONFIG_PINMUX=y
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CONFIG_GPIO=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=40000000
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CONFIG_OSC_EXTERNAL=y
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CONFIG_HAS_DTS=y
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37
boards/arm/hexiwear_kw40z/pinmux.c
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37
boards/arm/hexiwear_kw40z/pinmux.c
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/*
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* Copyright (c) 2017, NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <init.h>
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#include <pinmux.h>
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#include <fsl_port.h>
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static int hexiwear_kw40z_pinmux_init(struct device *dev)
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{
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ARG_UNUSED(dev);
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#ifdef CONFIG_PINMUX_MCUX_PORTC
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struct device *portc =
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device_get_binding(CONFIG_PINMUX_MCUX_PORTC_NAME);
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#endif
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#ifdef CONFIG_UART_MCUX_LPUART_0
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/* UART0 RX, TX */
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pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt4));
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pinmux_pin_set(portc, 7, PORT_PCR_MUX(kPORT_MuxAlt4));
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#endif
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#if CONFIG_I2C_1
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/* I2C1 SCL, SDA */
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pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt3)
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| PORT_PCR_PS_MASK);
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pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt3)
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| PORT_PCR_PS_MASK);
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#endif
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return 0;
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}
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SYS_INIT(hexiwear_kw40z_pinmux_init, PRE_KERNEL_1, CONFIG_PINMUX_INIT_PRIORITY);
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@ -2,6 +2,7 @@ ifeq ($(CONFIG_HAS_DTS),y)
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dtb-$(CONFIG_BOARD_FRDM_K64F) = frdm_k64f.dts_compiled
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dtb-$(CONFIG_BOARD_FRDM_KW41Z) = frdm_kw41z.dts_compiled
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dtb-$(CONFIG_BOARD_HEXIWEAR_K64) = hexiwear_k64.dts_compiled
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dtb-$(CONFIG_BOARD_HEXIWEAR_KW40Z) = hexiwear_kw40z.dts_compiled
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dtb-$(CONFIG_BOARD_CC3200_LAUNCHXL) = cc3200_launchxl.dts_compiled
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dtb-$(CONFIG_BOARD_NUCLEO_L476RG) = nucleo_l476rg.dts_compiled
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dtb-$(CONFIG_BOARD_V2M_BEETLE) = v2m_beetle.dts_compiled
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28
dts/arm/hexiwear_kw40z.dts
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28
dts/arm/hexiwear_kw40z.dts
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/dts-v1/;
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#include <nxp/nxp_kw40z.dtsi>
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/ {
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model = "Hexiwear KW40 board";
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compatible = "nxp,kw40z", "nxp,mkw40z4";
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aliases {
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lpuart_0 = &lpuart0;
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pinmux_a = &pinmux_a;
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pinmux_b = &pinmux_b;
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pinmux_c = &pinmux_c;
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gpio_a = &gpioa;
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gpio_b = &gpiob;
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gpio_c = &gpioc;
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};
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chosen {
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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};
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};
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&lpuart0 {
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status = "ok";
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baud-rate = <115200>;
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};
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4
dts/arm/hexiwear_kw40z.fixup
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4
dts/arm/hexiwear_kw40z.fixup
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#define CONFIG_NUM_IRQ_PRIO_BITS ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
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#define CONFIG_UART_MCUX_LPUART_0_BAUD_RATE NXP_KW41Z_LPUART_40054000_BAUD_RATE
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#define CONFIG_UART_MCUX_LPUART_0_IRQ_PRI NXP_KW41Z_LPUART_40054000_IRQ_0_PRIORITY
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