From 8e07e21424529aca51d64d496f3947562493fdcc Mon Sep 17 00:00:00 2001 From: Daniel DeGrasse Date: Tue, 12 Apr 2022 17:27:14 -0500 Subject: [PATCH] drivers: clock_control: convert lpc11u6x syscon driver to pinctrl convert lpc11u6x syscon clock driver to pin control, and remove all pinmux usage from driver and syscon dts node. Signed-off-by: Daniel DeGrasse --- .../clock_control/clock_control_lpc11u6x.c | 44 +++---------------- .../clock_control/clock_control_lpc11u6x.h | 3 ++ dts/arm/nxp/nxp_lpc11u6x.dtsi | 4 +- dts/bindings/clock/nxp,lpc11u6x-syscon.yaml | 12 ++--- 4 files changed, 13 insertions(+), 50 deletions(-) diff --git a/drivers/clock_control/clock_control_lpc11u6x.c b/drivers/clock_control/clock_control_lpc11u6x.c index 226db693ba..41aa5d9457 100644 --- a/drivers/clock_control/clock_control_lpc11u6x.c +++ b/drivers/clock_control/clock_control_lpc11u6x.c @@ -10,7 +10,6 @@ #include #include -#include #include "clock_control_lpc11u6x.h" @@ -74,43 +73,6 @@ static void syscon_ahb_clock_enable(struct lpc11u6x_syscon_regs *syscon, } } -#if defined(CONFIG_CLOCK_CONTROL_LPC11U6X_PLL_SRC_SYSOSC) \ - && DT_INST_NODE_HAS_PROP(0, pinmuxs) -/** - * @brief: configure system oscillator pins. - * - * This system oscillator pins and their configurations are retrieved from the - * "pinmuxs" property of the DT clock controller node. - */ -static void pinmux_enable_sysosc(void) -{ - const struct device *pinmux_dev; - uint32_t pin, func; - - pinmux_dev = device_get_binding( - DT_LABEL(DT_INST_PHANDLE_BY_NAME(0, pinmuxs, xtalin))); - if (!pinmux_dev) { - return; - } - pin = DT_INST_PHA_BY_NAME(0, pinmuxs, xtalin, pin); - func = DT_INST_PHA_BY_NAME(0, pinmuxs, xtalin, function); - - pinmux_pin_set(pinmux_dev, pin, func); - - pinmux_dev = device_get_binding( - DT_LABEL(DT_INST_PHANDLE_BY_NAME(0, pinmuxs, xtalout))); - if (!pinmux_dev) { - return; - } - pin = DT_INST_PHA_BY_NAME(0, pinmuxs, xtalout, pin); - func = DT_INST_PHA_BY_NAME(0, pinmuxs, xtalout, function); - - pinmux_pin_set(pinmux_dev, pin, func); -} -#else -#define pinmux_enable_sysosc() do { } while (0) -#endif - static void syscon_peripheral_reset(struct lpc11u6x_syscon_regs *syscon, uint32_t mask, bool reset) { @@ -347,7 +309,7 @@ static int lpc11u6x_syscon_init(const struct device *dev) /* Configure PLL input */ syscon_set_pll_src(cfg->syscon, LPC11U6X_SYS_PLL_CLK_SEL_SYSOSC); - pinmux_enable_sysosc(); + pinctrl_apply_state(cfg->pincfg, PINCTRL_STATE_DEFAULT); #elif defined(CONFIG_CLOCK_CONTROL_LPC11U6X_PLL_SRC_IRC) syscon_power_up(cfg->syscon, LPC11U6X_PDRUNCFG_IRC_PD, true); @@ -381,8 +343,12 @@ static const struct clock_control_driver_api lpc11u6x_clock_control_api = { .get_rate = lpc11u6x_clock_control_get_rate, }; + +PINCTRL_DT_INST_DEFINE(0); + static const struct lpc11u6x_syscon_config syscon_config = { .syscon = (struct lpc11u6x_syscon_regs *) DT_INST_REG_ADDR(0), + .pincfg = PINCTRL_DT_INST_DEV_CONFIG_GET(0), }; static struct lpc11u6x_syscon_data syscon_data; diff --git a/drivers/clock_control/clock_control_lpc11u6x.h b/drivers/clock_control/clock_control_lpc11u6x.h index a462840ff1..2e91a5e9e1 100644 --- a/drivers/clock_control/clock_control_lpc11u6x.h +++ b/drivers/clock_control/clock_control_lpc11u6x.h @@ -7,6 +7,8 @@ #ifndef ZEPHYR_DRIVERS_CLOCK_CONTROL_CLOCK_CONTROL_LPC11U6X_H_ #define ZEPHYR_DRIVERS_CLOCK_CONTROL_CLOCK_CONTROL_LPC11U6X_H_ +#include + #define LPC11U6X_SYS_AHB_CLK_CTRL_I2C0 (1 << 5) #define LPC11U6X_SYS_AHB_CLK_CTRL_GPIO (1 << 6) #define LPC11U6X_SYS_AHB_CLK_CTRL_USART0 (1 << 12) @@ -132,6 +134,7 @@ struct lpc11u6x_syscon_regs { struct lpc11u6x_syscon_config { struct lpc11u6x_syscon_regs *syscon; + const struct pinctrl_dev_config *pincfg; }; struct lpc11u6x_syscon_data { diff --git a/dts/arm/nxp/nxp_lpc11u6x.dtsi b/dts/arm/nxp/nxp_lpc11u6x.dtsi index 24dbb8a67e..2f3bfbfb06 100644 --- a/dts/arm/nxp/nxp_lpc11u6x.dtsi +++ b/dts/arm/nxp/nxp_lpc11u6x.dtsi @@ -60,7 +60,7 @@ #size-cells = <1>; ranges = <0x0 0x40044000 0x150>; pinctrl: pinctrl { - compatible = "nxp,lpc-iocon-pinctrl"; + compatible = "nxp,lpc11u6x-pinctrl"; }; /* PIO0_0 to PIO0_23 */ pio0: pio0@0 { @@ -164,8 +164,6 @@ #clock-cells = <1>; reg = <0x40048000 0x400>; label = "SYSCON"; - pinmuxs = <&pinmux2 0 1>, <&pinmux2 1 1>; - pinmux-names = "XTALIN", "XTALOUT"; }; uart0: serial@40008000 { diff --git a/dts/bindings/clock/nxp,lpc11u6x-syscon.yaml b/dts/bindings/clock/nxp,lpc11u6x-syscon.yaml index b667b39c4d..7b36b7ab59 100644 --- a/dts/bindings/clock/nxp,lpc11u6x-syscon.yaml +++ b/dts/bindings/clock/nxp,lpc11u6x-syscon.yaml @@ -5,7 +5,7 @@ description: LPC11U6X clock controller node compatible: "nxp,lpc11u6x-syscon" -include: [clock-controller.yaml, base.yaml] +include: [clock-controller.yaml, pinctrl-device.yaml, base.yaml] properties: reg: @@ -14,15 +14,11 @@ properties: label: required: true - pinmuxs: - type: phandle-array + pinctrl-0: required: true - description: system oscillator pinmux configuration - pinmux-names: - type: string-array - required: false - description: system oscillator pins names + pinctrl-names: + required: true "#clock-cells": const: 1