drivers: counter: sam0_tc32: rework devicetree support
Rework the devicetree to utilize new DT_INST macros and extract per instance data for clocks from devicetree. Move the prescaler setting from Kconfig to devicetree as well. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala
Kumar Gala
parent
fe573b6e23
commit
8eafcc32db
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@ -1,26 +1,10 @@
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# Copyright (c) 2019 Derek Hageman <hageman@inthat.cloud>
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# SPDX-License-Identifier: Apache-2.0
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menuconfig COUNTER_SAM0_TC32
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config COUNTER_SAM0_TC32
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bool "SAM0 series 32-bit basic timer driver"
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default y
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depends on SOC_FAMILY_SAM0
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help
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Enable the SAM0 series timer counter (TC) driver in 32-bit wide
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mode.
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if COUNTER_SAM0_TC32
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index = 0
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source "drivers/counter/Kconfig.template.sam0_tc32"
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index = 2
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source "drivers/counter/Kconfig.template.sam0_tc32"
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index = 4
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source "drivers/counter/Kconfig.template.sam0_tc32"
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index = 6
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source "drivers/counter/Kconfig.template.sam0_tc32"
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endif # COUNTER_SAM0_TC32
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@ -1,35 +0,0 @@
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# Copyright (c) 2019 Derek Hageman <hageman@inthat.cloud>
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# SPDX-License-Identifier: Apache-2.0
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choice
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bool "Timer $(index) prescaler"
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config COUNTER_SAM0_TC32_$(index)_PRESCALER_1
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bool "clock / 1"
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config COUNTER_SAM0_TC32_$(index)_PRESCALER_2
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bool "clock / 2"
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config COUNTER_SAM0_TC32_$(index)_PRESCALER_4
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bool "clock / 4"
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config COUNTER_SAM0_TC32_$(index)_PRESCALER_8
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bool "clock / 8"
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config COUNTER_SAM0_TC32_$(index)_PRESCALER_16
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bool "clock / 16"
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config COUNTER_SAM0_TC32_$(index)_PRESCALER_64
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bool "clock / 64"
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config COUNTER_SAM0_TC32_$(index)_PRESCALER_256
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bool "clock / 256"
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config COUNTER_SAM0_TC32_$(index)_PRESCALER_1024
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bool "clock / 1024"
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endchoice
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config COUNTER_SAM0_TC32_$(index)_DIVISOR
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int
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default 1 if COUNTER_SAM0_TC32_$(index)_PRESCALER_1
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default 2 if COUNTER_SAM0_TC32_$(index)_PRESCALER_2
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default 4 if COUNTER_SAM0_TC32_$(index)_PRESCALER_4
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default 8 if COUNTER_SAM0_TC32_$(index)_PRESCALER_8
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default 16 if COUNTER_SAM0_TC32_$(index)_PRESCALER_16
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default 64 if COUNTER_SAM0_TC32_$(index)_PRESCALER_64
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default 256 if COUNTER_SAM0_TC32_$(index)_PRESCALER_256
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default 1024 if COUNTER_SAM0_TC32_$(index)_PRESCALER_1024
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@ -4,6 +4,8 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT atmel_sam0_tc32
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#include <drivers/counter.h>
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#include <device.h>
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#include <soc.h>
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@ -402,64 +404,57 @@ static const struct counter_driver_api counter_sam0_tc32_driver_api = {
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#ifdef MCLK
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#define COUNTER_SAM0_TC32_CLOCK_CONTROL(n) \
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.mclk = MCLK_TC##n, \
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.mclk_mask = MCLK_TC##n##_MASK, \
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.gclk_id = TC##n##_GCLK_ID,
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#define COUNTER_SAM0_TC32_CLOCK_CONTROL(n) \
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.mclk = (volatile uint32_t *)MCLK_MASK_DT_INT_REG_ADDR(n), \
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.mclk_mask = BIT(DT_INST_CLOCKS_CELL_BY_NAME(n, mclk, bit)), \
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.gclk_id = DT_INST_CLOCKS_CELL_BY_NAME(n, gclk, periph_ch),
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#else
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#define COUNTER_SAM0_TC32_CLOCK_CONTROL(n) \
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.pm_apbcmask = PM_APBCMASK_TC##n, \
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.gclk_clkctrl_id = UTIL_CAT(GCLK_CLKCTRL_ID_TC ## n ## _TC, \
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UTIL_INC(n)),
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#define COUNTER_SAM0_TC32_CLOCK_CONTROL(n) \
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.pm_apbcmask = BIT(DT_INST_CLOCKS_CELL_BY_NAME(n, pm, bit)), \
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.gclk_clkctrl_id = DT_INST_CLOCKS_CELL_BY_NAME(n, gclk, clkctrl_id),
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#endif
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#define COUNTER_SAM0_TC32_DEVICE(n) \
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static void counter_sam0_tc32_config_##n(struct device *dev); \
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static const struct counter_sam0_tc32_config \
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counter_sam0_tc32_dev_config_##n = { \
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.info = { \
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.max_top_value = UINT32_MAX, \
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.freq = SOC_ATMEL_SAM0_GCLK0_FREQ_HZ / \
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CONFIG_COUNTER_SAM0_TC32_##n##_DIVISOR, \
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.flags = COUNTER_CONFIG_INFO_COUNT_UP, \
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.channels = 1 \
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}, \
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.regs = (TcCount32 *)DT_ATMEL_SAM0_TC32_TC_##n##_BASE_ADDRESS,\
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COUNTER_SAM0_TC32_CLOCK_CONTROL(n) \
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.prescaler = UTIL_CAT(TC_CTRLA_PRESCALER_DIV, \
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CONFIG_COUNTER_SAM0_TC32_##n##_DIVISOR), \
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.irq_config_func = &counter_sam0_tc32_config_##n, \
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}; \
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static struct counter_sam0_tc32_data counter_sam0_tc32_dev_data_##n; \
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DEVICE_AND_API_INIT(counter_sam0_tc32_##n, \
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DT_ATMEL_SAM0_TC32_TC_##n##_LABEL, \
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&counter_sam0_tc32_initialize, \
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&counter_sam0_tc32_dev_data_##n, \
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&counter_sam0_tc32_dev_config_##n, PRE_KERNEL_1, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&counter_sam0_tc32_driver_api); \
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static void counter_sam0_tc32_config_##n(struct device *dev) \
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{ \
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IRQ_CONNECT(DT_ATMEL_SAM0_TC32_TC_##n##_IRQ_0, \
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DT_ATMEL_SAM0_TC32_TC_##n##_IRQ_0_PRIORITY, \
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counter_sam0_tc32_isr, \
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DEVICE_GET(counter_sam0_tc32_##n), \
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0); \
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irq_enable(DT_ATMEL_SAM0_TC32_TC_##n##_IRQ_0); \
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#define SAM0_TC32_PRESCALER(n) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(n, prescaler), \
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(DT_INST_PROP(n, prescaler)), (1))
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#define COUNTER_SAM0_TC32_DEVICE(n) \
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static void counter_sam0_tc32_config_##n(struct device *dev); \
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static const struct counter_sam0_tc32_config \
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\
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counter_sam0_tc32_dev_config_##n = { \
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.info = { \
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.max_top_value = UINT32_MAX, \
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.freq = SOC_ATMEL_SAM0_GCLK0_FREQ_HZ / \
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SAM0_TC32_PRESCALER(n), \
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.flags = COUNTER_CONFIG_INFO_COUNT_UP, \
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.channels = 1 \
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}, \
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.regs = (TcCount32 *)DT_INST_REG_ADDR(n), \
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COUNTER_SAM0_TC32_CLOCK_CONTROL(n) \
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.prescaler = UTIL_CAT(TC_CTRLA_PRESCALER_DIV, \
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SAM0_TC32_PRESCALER(n)), \
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.irq_config_func = &counter_sam0_tc32_config_##n, \
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}; \
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\
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static struct counter_sam0_tc32_data counter_sam0_tc32_dev_data_##n;\
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\
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DEVICE_AND_API_INIT(counter_sam0_tc32_##n, \
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DT_INST_LABEL(n), \
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&counter_sam0_tc32_initialize, \
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&counter_sam0_tc32_dev_data_##n, \
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&counter_sam0_tc32_dev_config_##n, \
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PRE_KERNEL_1, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&counter_sam0_tc32_driver_api); \
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\
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static void counter_sam0_tc32_config_##n(struct device *dev) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(n), \
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DT_INST_IRQ(n, priority), \
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counter_sam0_tc32_isr, \
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DEVICE_GET(counter_sam0_tc32_##n), 0); \
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irq_enable(DT_INST_IRQN(n)); \
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}
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#if DT_ATMEL_SAM0_TC32_TC_0_BASE_ADDRESS
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COUNTER_SAM0_TC32_DEVICE(0);
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#endif
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#if DT_ATMEL_SAM0_TC32_TC_2_BASE_ADDRESS
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COUNTER_SAM0_TC32_DEVICE(2);
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#endif
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#if DT_ATMEL_SAM0_TC32_TC_4_BASE_ADDRESS
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COUNTER_SAM0_TC32_DEVICE(4);
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#endif
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#if DT_ATMEL_SAM0_TC32_TC_6_BASE_ADDRESS
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COUNTER_SAM0_TC32_DEVICE(6);
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#endif
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DT_INST_FOREACH(COUNTER_SAM0_TC32_DEVICE)
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@ -22,3 +22,17 @@ properties:
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label:
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required: true
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prescaler:
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type: int
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required: false
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description: Timer prescaler
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enum:
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- 1
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- 2
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- 4
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- 8
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- 16
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- 64
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- 256
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- 1024
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