From 8fb4a186677279ce01107430e0f5814d94c5a94b Mon Sep 17 00:00:00 2001 From: Nazar Palamar Date: Wed, 1 Mar 2023 11:44:41 +0200 Subject: [PATCH] boards: arm: cy8cproto-062-4343w: enable BLE features Enable BLE features for CY8CPROTO-062-4343W board. Signed-off-by: Nazar Palamar --- .../arm/cy8cproto_062_4343w/Kconfig.defconfig | 30 +++++++++++++++++++ .../cy8cproto_062_4343w-pinctrl.dtsi | 17 +++++++++++ .../cy8cproto_062_4343w.dts | 27 +++++++++++++++++ .../cy8cproto_062_4343w_defconfig | 3 ++ 4 files changed, 77 insertions(+) diff --git a/boards/arm/cy8cproto_062_4343w/Kconfig.defconfig b/boards/arm/cy8cproto_062_4343w/Kconfig.defconfig index 198537aa92..14c47a06e5 100644 --- a/boards/arm/cy8cproto_062_4343w/Kconfig.defconfig +++ b/boards/arm/cy8cproto_062_4343w/Kconfig.defconfig @@ -8,4 +8,34 @@ if BOARD_CY8CPROTO_062_4343W config BOARD default "cy8cproto_062_4343w" +if WIFI || BT + +# Select CYW43XXX part and module +choice CYW43XXX_PART + default CYW4343W +endchoice + +choice CYW4343W_MODULE + default CYW4343W_MURATA_1DX +endchoice + +endif # WIFI || BT + + +if BT + +# Select HCI components +config UART + bool + default y + +config BT_UART + default y + +choice BT_HCI_BUS_TYPE + default BT_H4 +endchoice + +endif # BT + endif # BOARD_CY8CPROTO_062_4343W diff --git a/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w-pinctrl.dtsi b/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w-pinctrl.dtsi index 073a5517d7..d86f9b67bf 100644 --- a/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w-pinctrl.dtsi +++ b/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w-pinctrl.dtsi @@ -3,6 +3,23 @@ * SPDX-License-Identifier: Apache-2.0 */ +/* Configure pin control bias mode for uart2 pins */ +&p3_1_scb2_uart_tx { + drive-push-pull; +}; + +&p3_0_scb2_uart_rx { + input-enable; +}; + +&p3_2_scb2_uart_rts { + drive-push-pull; +}; + +&p3_3_scb2_uart_cts { + input-enable; +}; + /* Configure pin control bias mode for uart5 pins */ &p5_1_scb5_uart_tx { drive-push-pull; diff --git a/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w.dts b/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w.dts index c09b64e91f..48544362c2 100644 --- a/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w.dts +++ b/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w.dts @@ -22,6 +22,7 @@ zephyr,flash = &flash0; zephyr,console = &uart5; zephyr,shell-uart = &uart5; + zephyr,bt_uart = &uart2; }; }; @@ -33,6 +34,32 @@ pinctrl-names = "default"; }; +&uart2 { + status = "okay"; + /* The UART bus speed (current_speed) for zephyr_bt_uart should be the same + * as the default baudrate defined in CYW43xx firmware (default 115200). + */ + + current-speed = <115200>; + + /* HCI-UART pins*/ + pinctrl-0 = <&p3_1_scb2_uart_tx &p3_0_scb2_uart_rx &p3_2_scb2_uart_rts &p3_3_scb2_uart_cts>; + pinctrl-names = "default"; + + bt-hci { + status = "okay"; + compatible = "infineon,cyw43xxx-bt-hci"; + bt-reg-on-gpios = <&gpio_prt3 4 (GPIO_ACTIVE_HIGH)>; + + /* Configuration UART speeds for firmware download (fw-download-speed) and + * HCI operation (hci-operation-speed). + * If hci-operation-speed or fw-download-speed are not defined in bt-hci{...} + * node, cyw43xx driver will use bus/current-speed as default speed. + */ + fw-download-speed = <3000000>; + }; +}; + /* System clock configuration */ &fll0 { status = "okay"; diff --git a/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w_defconfig b/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w_defconfig index 937b4b587b..c36ce13e1a 100644 --- a/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w_defconfig +++ b/boards/arm/cy8cproto_062_4343w/cy8cproto_062_4343w_defconfig @@ -24,5 +24,8 @@ CONFIG_SERIAL=y # Enable pin controller CONFIG_PINCTRL=y +# Enable GPIO driver +CONFIG_GPIO=y + # Enable clock controller CONFIG_CLOCK_CONTROL=y