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riscv: linker: add support for FLASH_LOAD_OFFSET

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This allows board to re-configure ROM_BASE address while building
firmware image.

For example, a board need to build two firmware images. And the images
are put into one flash and required to work independent:

config FLASH_LOAD_OFFSET
    default 0 if FIRST_IMAGE
    default 0x80000 if SECOND_IMAGE

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This commit is contained in:
Dino Li 2021-08-02 14:20:05 +08:00 committed by Christopher Friedt
parent 7ca190c20f
commit 91ba039381
1 changed files with 5 additions and 0 deletions
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5
include/arch/riscv/common/linker.ld
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@ -33,7 +33,12 @@
#ifdef CONFIG_XIP
#if DT_NODE_HAS_COMPAT_STATUS(DT_CHOSEN(zephyr_flash), soc_nv_flash, okay)
#ifdef CONFIG_FLASH_LOAD_OFFSET
#define ROM_BASE (DT_REG_ADDR(DT_CHOSEN(zephyr_flash)) + \
CONFIG_FLASH_LOAD_OFFSET)
#else /* !CONFIG_FLASH_LOAD_OFFSET */
#define ROM_BASE DT_REG_ADDR(DT_CHOSEN(zephyr_flash))
#endif /* CONFIG_FLASH_LOAD_OFFSET */
#define ROM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_flash))
#elif DT_NODE_HAS_COMPAT_STATUS(DT_CHOSEN(zephyr_flash), jedec_spi_nor, okay)
/* For jedec,spi-nor we expect the spi controller to memory map the flash