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soc: microchip_mec: mec1501 Add pinmux definitions

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Define pinmux base addresses from gpio bases. Pinmux
and gpio functionality are located in the same PCR register
for each pin.

Introduce pinmux Kconfig switches for the SOC.

Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
This commit is contained in:
Francisco Munoz 2019-05-15 01:56:49 -07:00 committed by Anas Nashif
parent 3d180991bc
commit 950679470d
2 changed files with 15 additions and 0 deletions
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7
soc/arm/microchip_mec/mec1501/Kconfig.defconfig.mec1501hsz
View file

@ -22,6 +22,13 @@ config UART_NS16550
endif # SERIAL
if PINMUX
config PINMUX_XEC
default y
endif # PINMUX
config GPIO
default y

8
soc/arm/microchip_mec/mec1501/dts_fixup.h
View file

@ -45,6 +45,14 @@
#define DT_UART_NS16550_PORT_2_IRQ_PRI DT_NS16550_2_IRQ_0_PRIORITY
#define DT_UART_NS16550_PORT_2_IRQ_FLAGS 0 /* Default */
/* Pin multiplexing and GPIOs share the same registers in the HW */
#define DT_PINMUX_XEC_GPIO000_036_BASE_ADDR DT_MICROCHIP_XEC_GPIO_0_BASE_ADDRESS
#define DT_PINMUX_XEC_GPIO040_076_BASE_ADDR DT_MICROCHIP_XEC_GPIO_1_BASE_ADDRESS
#define DT_PINMUX_XEC_GPIO100_136_BASE_ADDR DT_MICROCHIP_XEC_GPIO_2_BASE_ADDRESS
#define DT_PINMUX_XEC_GPIO140_176_BASE_ADDR DT_MICROCHIP_XEC_GPIO_3_BASE_ADDRESS
#define DT_PINMUX_XEC_GPIO200_236_BASE_ADDR DT_MICROCHIP_XEC_GPIO_4_BASE_ADDRESS
#define DT_PINMUX_XEC_GPIO240_276_BASE_ADDR DT_MICROCHIP_XEC_GPIO_5_BASE_ADDRESS
#define DT_GPIO_XEC_GPIO000_036_BASE_ADDR DT_MICROCHIP_XEC_GPIO_0_BASE_ADDRESS
#define DT_GPIO_XEC_GPIO000_036_IRQ DT_MICROCHIP_XEC_GPIO_0_IRQ_0
#define DT_GPIO_XEC_GPIO000_036_IRQ_PRIORITY DT_MICROCHIP_XEC_GPIO_0_IRQ_0_PRIORITY