From 9631709ca43f93f41e46a5628ddd93265a748dc3 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Fri, 31 Jan 2020 10:34:01 +0100 Subject: [PATCH] soc: stm32h7: Move PWR init code in soc init function Move PWR init code out of clock control driver and put SMPS related function under SMPS condition as it is not supported by all soc variants of the series. Fixes #22363 Signed-off-by: Erwan Gouriou --- drivers/clock_control/clock_stm32_ll_h7.c | 5 ----- soc/arm/st_stm32/stm32h7/soc_m7.c | 8 ++++++++ 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/clock_control/clock_stm32_ll_h7.c b/drivers/clock_control/clock_stm32_ll_h7.c index 3ef7bfc1b8..ec36c28bb2 100644 --- a/drivers/clock_control/clock_stm32_ll_h7.c +++ b/drivers/clock_control/clock_stm32_ll_h7.c @@ -217,11 +217,6 @@ static int stm32_clock_control_init(struct device *dev) #if !defined(CONFIG_CPU_CORTEX_M4) #ifdef CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL - /* Power Configuration */ - LL_PWR_ConfigSupply(LL_PWR_DIRECT_SMPS_SUPPLY); - LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); - while (LL_PWR_IsActiveFlag_VOS() == 0) { - } #ifdef CONFIG_CLOCK_STM32_PLL_SRC_HSE diff --git a/soc/arm/st_stm32/stm32h7/soc_m7.c b/soc/arm/st_stm32/stm32h7/soc_m7.c index e4a0fdc29e..7088ab4804 100644 --- a/soc/arm/st_stm32/stm32h7/soc_m7.c +++ b/soc/arm/st_stm32/stm32h7/soc_m7.c @@ -85,6 +85,14 @@ static int stm32h7_init(struct device *arg) /* At reset, system core clock is set to 64 MHz from HSI */ SystemCoreClock = 64000000; + /* Power Configuration */ +#ifdef SMPS + LL_PWR_ConfigSupply(LL_PWR_DIRECT_SMPS_SUPPLY); +#endif + LL_PWR_SetRegulVoltageScaling(LL_PWR_REGU_VOLTAGE_SCALE1); + while (LL_PWR_IsActiveFlag_VOS() == 0) { + } + return 0; }