From 9656056b191cee544c60436dfa2745c4825f150d Mon Sep 17 00:00:00 2001 From: Tomasz Leman Date: Fri, 8 Sep 2023 15:47:10 +0200 Subject: [PATCH] dts: adsp: ace20: remove lp clock LP/HP RING OSC clocks were replaced by the ACE IPLL clock. If needed IPLL can be configured to work as low power clock. But right now ACE uses only WOVCRO and IPLL (configured to work as HP RING OSC clock). Signed-off-by: Tomasz Leman --- dts/xtensa/intel/intel_adsp_ace20_lnl.dtsi | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/dts/xtensa/intel/intel_adsp_ace20_lnl.dtsi b/dts/xtensa/intel/intel_adsp_ace20_lnl.dtsi index ad1259ea45..726e94bc27 100644 --- a/dts/xtensa/intel/intel_adsp_ace20_lnl.dtsi +++ b/dts/xtensa/intel/intel_adsp_ace20_lnl.dtsi @@ -95,11 +95,10 @@ clkctl: clkctl { compatible = "intel,adsp-shim-clkctl"; adsp-clkctl-clk-wovcro = <0>; - adsp-clkctl-clk-lpro = <1>; - adsp-clkctl-clk-ipll = <2>; - adsp-clkctl-freq-enc = <0xc 0x0 0x4>; - adsp-clkctl-freq-mask = <0x0 0x0 0x0>; - adsp-clkctl-freq-default = <2>; + adsp-clkctl-clk-ipll = <1>; + adsp-clkctl-freq-enc = <0xc 0x4>; + adsp-clkctl-freq-mask = <0x0 0x0>; + adsp-clkctl-freq-default = <1>; adsp-clkctl-freq-lowest = <0>; wovcro-supported; };