kconfig: Global whitespace/consistency cleanup
Clean up space errors and use a consistent style throughout the Kconfig files. This makes reading the Kconfig files more distraction-free, helps with grepping, and encourages the same style getting copied around everywhere (meaning another pass hopefully won't be needed). Go for the most common style: - Indent properties with a single tab, including for choices. Properties on choices work exactly the same syntactically as properties on symbols, so not sure how the no-indentation thing happened. - Indent help texts with a tab followed by two spaces - Put a space between 'config' and the symbol name, not a tab. This also helps when grepping for definitions. - Do '# A comment' instead of '#A comment' I tweaked Kconfiglib a bit to find most of the stuff. Some help texts were reflowed to 79 columns with 'gq' in Vim as well, though not all, because I was afraid I'd accidentally mess up formatting. Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This commit is contained in:
Ulf Magnusson
Kumar Gala
parent
9555f82d28
commit
975de21858
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@ -74,9 +74,9 @@ config LINKER_ORPHAN_SECTION_ERROR
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endchoice
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config CODE_DATA_RELOCATION
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bool "Relocate code/data sections"
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depends on ARM
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help
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bool "Relocate code/data sections"
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depends on ARM
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help
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When selected this will relocate .text, data and .bss sections from
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the specified files and places it in the required memory region. The
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files should be specified in the CMakeList.txt file with
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31
arch/Kconfig
31
arch/Kconfig
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@ -69,15 +69,14 @@ module-str = mpu
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source "subsys/logging/Kconfig.template.log_config"
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config BIG_ENDIAN
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bool
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help
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This option tells the build system that the target system is
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big-endian. Little-endian architecture is the default and
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should leave this option unselected. This option is selected
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by arch/$ARCH/Kconfig, soc/**/Kconfig, or boards/**/Kconfig
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and the user should generally avoid modifying it. The option
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is used to select linker script OUTPUT_FORMAT and command
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line option for gen_isr_tables.py.
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bool
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help
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This option tells the build system that the target system is big-endian.
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Little-endian architecture is the default and should leave this option
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unselected. This option is selected by arch/$ARCH/Kconfig,
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soc/**/Kconfig, or boards/**/Kconfig and the user should generally avoid
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modifying it. The option is used to select linker script OUTPUT_FORMAT
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and command line option for gen_isr_tables.py.
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config 64BIT
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bool
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@ -234,14 +233,14 @@ config DYNAMIC_OBJECTS
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bool "Allow kernel objects to be allocated at runtime"
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depends on USERSPACE
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help
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Enabling this option allows for kernel objects to be requested from
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the calling thread's resource pool, at a slight cost in performance
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due to the supplemental run-time tables required to validate such
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objects.
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Enabling this option allows for kernel objects to be requested from
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the calling thread's resource pool, at a slight cost in performance
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due to the supplemental run-time tables required to validate such
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objects.
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Objects allocated in this way can be freed with a supervisor-only
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API call, or when the number of references to that object drops to
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zero.
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Objects allocated in this way can be freed with a supervisor-only
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API call, or when the number of references to that object drops to
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zero.
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if ARCH_HAS_NOCACHE_MEMORY_SUPPORT
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@ -16,14 +16,14 @@ choice
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prompt "ARC core family"
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default CPU_ARCEM
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config CPU_ARCEM
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config CPU_ARCEM
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bool "ARC EM cores"
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select CPU_ARCV2
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select ATOMIC_OPERATIONS_C
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help
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This option signifies the use of an ARC EM CPU
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config CPU_ARCHS
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config CPU_ARCHS
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bool "ARC HS cores"
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select CPU_ARCV2
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select ATOMIC_OPERATIONS_BUILTIN
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@ -64,7 +64,7 @@ config FP_FPU_DA
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menu "ARCv2 Family Options"
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config CPU_ARCV2
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config CPU_ARCV2
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bool
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select ARCH_HAS_STACK_PROTECTION if ARC_HAS_STACK_CHECKING || ARC_MPU
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select ARCH_HAS_USERSPACE if ARC_MPU
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@ -74,7 +74,7 @@ config CPU_ARCV2
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help
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This option signifies the use of a CPU of the ARCv2 family.
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config NUM_IRQ_PRIO_LEVELS
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config NUM_IRQ_PRIO_LEVELS
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int "Number of supported interrupt priority levels"
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range 1 16
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help
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@ -83,7 +83,7 @@ config NUM_IRQ_PRIO_LEVELS
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The BSP must provide a valid default for proper operation.
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config NUM_IRQS
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config NUM_IRQS
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int "Upper limit of interrupt numbers/IDs used"
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range 17 256
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help
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@ -94,7 +94,7 @@ config NUM_IRQS
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The BSP must provide a valid default. This drives the size of the
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vector table.
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config RGF_NUM_BANKS
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config RGF_NUM_BANKS
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int "Number of General Purpose Register Banks"
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depends on CPU_ARCV2
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range 1 2
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@ -140,7 +140,7 @@ config ARC_HAS_STACK_CHECKING
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checking stack accesses and raising an exception when a stack
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overflow or underflow is detected.
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config ARC_CONNECT
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config ARC_CONNECT
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bool "ARC has ARC connect"
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select SCHED_IPI_SUPPORTED
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help
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@ -152,7 +152,7 @@ config ARC_STACK_CHECKING
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help
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Use ARC STACK_CHECKING to do stack protection
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config ARC_STACK_PROTECTION
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config ARC_STACK_PROTECTION
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bool
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default y if HW_STACK_PROTECTION
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select ARC_STACK_CHECKING if ARC_HAS_STACK_CHECKING
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@ -168,7 +168,7 @@ config ARC_STACK_PROTECTION
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selection of the ARC stack checking is
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prioritized over the MPU-based stack guard.
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config ARC_USE_UNALIGNED_MEM_ACCESS
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config ARC_USE_UNALIGNED_MEM_ACCESS
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bool "Enable unaligned access in HW"
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default n if CPU_ARCEM
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default y if CPU_ARCHS
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@ -178,7 +178,7 @@ config ARC_USE_UNALIGNED_MEM_ACCESS
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to support unaligned memory access which is then disabled by default.
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Enable unaligned access in hardware and make software to use it.
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config FAULT_DUMP
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config FAULT_DUMP
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int "Fault dump level"
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default 2
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range 0 2
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@ -193,7 +193,7 @@ config FAULT_DUMP
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0: Off.
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config XIP
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config XIP
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default y if !UART_NSIM
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config GEN_ISR_TABLES
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@ -111,7 +111,7 @@ config CPU_CORTEX_M_HAS_SPLIM
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In an ARMv8-M Mainline implementation with the Security Extension
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the MSPLIM, PSPLIM registers have additional Secure instances.
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In an ARMv8-M Baseline implementation with the Security Extension
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In an ARMv8-M Baseline implementation with the Security Extension
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the MSPLIM, PSPLIM registers have only Secure instances.
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config CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS
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@ -65,8 +65,8 @@ config EXTRA_EXCEPTION_INFO
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describing what that cause code means.
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choice
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prompt "Global Pointer options"
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default GP_GLOBAL
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prompt "Global Pointer options"
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default GP_GLOBAL
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config GP_NONE
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bool "No global pointer"
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@ -17,8 +17,10 @@ config QEMU_TARGET
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# Note: $BOARD_DIR might be a glob pattern
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choice
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prompt "Board Selection"
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prompt "Board Selection"
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source "$(BOARD_DIR)/Kconfig.board"
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endchoice
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@ -7,8 +7,8 @@
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if BOARD_BL654_DVK
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config BOARD_ENABLE_DCDC
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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endif # BOARD_BL654_DVK
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@ -77,7 +77,7 @@ config VL53L0X_XSHUT_GPIO_DEV_NAME
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config VL53L0X_XSHUT_GPIO_PIN_NUM
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default 6
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endif #VL53L0X
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endif # VL53L0X
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if LSM6DSL
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@ -107,7 +107,7 @@ config BT_HCI_ACL_FLOW_CONTROL
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config BT_HCI_VS_EXT
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default n
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endif #BT
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endif # BT
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if WIFI
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@ -117,6 +117,6 @@ config SPI
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config WIFI_ESWIFI
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default y
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endif #WIFI
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endif # WIFI
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endif # BOARD_DISCO_L475_IOT1
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@ -99,7 +99,6 @@ if !RTOS_TIMER
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# If RTOS timer is not enabled we use ARM Cortex-M
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# SYSTICK. SYSTICK frequency is 48MHz divided by
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# SOC_MEC1501_PROC_CLK_DIV.
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#
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 48000000
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@ -117,6 +116,5 @@ config PS2_XEC_0
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config PS2_XEC_1
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default y
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endif #PS2
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endif # PS2
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endif # BOARD_MEC1501MODULAR_ASSY6885
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@ -112,12 +112,12 @@ endif # RTOS_TIMER
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if PS2
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config PS2_XEC_0
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default y
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default y
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config PS2_XEC_1
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default y
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default y
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endif #PS2
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endif # PS2
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if SPI
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@ -7,9 +7,9 @@
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if BOARD_NRF52810_PCA10040
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config BOARD_ENABLE_DCDC
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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# BT_CTLR depends on BT. When BT is enabled we should default to also
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# enabling the controller.
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@ -7,8 +7,8 @@
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if BOARD_NRF52811_PCA10056
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config BOARD_ENABLE_DCDC
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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endif # BOARD_NRF52811_PCA10056
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@ -7,8 +7,8 @@
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if BOARD_NRF52840_BLIP
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config BOARD_ENABLE_DCDC
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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endif # BOARD_NRF52840_BLIP
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@ -12,7 +12,7 @@ config BOARD
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if ADC
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config ADC_0
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default y
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default y
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endif # ADC
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@ -7,8 +7,8 @@
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if BOARD_NRF52840_MDK
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config BOARD_ENABLE_DCDC
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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endif # BOARD_NRF52840_MDK
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@ -7,8 +7,8 @@
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if BOARD_NRF52840_PAPYR
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config BOARD_ENABLE_DCDC
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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endif # BOARD_NRF52840_PAPYR
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@ -12,7 +12,7 @@ config BOARD
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if ADC
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config ADC_0
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default y
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default y
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endif # ADC
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@ -7,8 +7,8 @@
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if BOARD_NRF52840_PCA10056
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config BOARD_ENABLE_DCDC
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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endif # BOARD_NRF52840_PCA10056
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@ -7,15 +7,15 @@
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if BOARD_NRF52840_PCA10059
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config BOARD_ENABLE_DCDC
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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config BOARD_HAS_NRF5_BOOTLOADER
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bool "Board has nRF5 bootloader"
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default y
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help
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If selected, applications are linked so that they can be loaded by
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Nordic nRF5 bootloader.
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If selected, applications are linked so that they can be loaded by Nordic
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nRF5 bootloader.
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endif # BOARD_NRF52840_PCA10059
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@ -23,7 +23,7 @@ if BOARD_HAS_NRF5_BOOTLOADER && !USE_CODE_PARTITION
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# so no override is necessary.
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config FLASH_LOAD_OFFSET
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default 0x1000
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default 0x1000
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endif # BOARD_HAS_NRF5_BOOTLOADER && !USE_CODE_PARTITION
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@ -7,9 +7,9 @@
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if BOARD_NRF52840_PCA10090
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config BOARD_ENABLE_DCDC
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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bool "Enable DCDC mode"
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select SOC_DCDC_NRF52X
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default y
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choice
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prompt "nRF9160 UART0 routing"
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@ -138,17 +138,17 @@ choice
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config BOARD_PCA10090_INTERFACE0_ARDUINO
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bool "Route to Arduino pins"
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help
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Pin 0: nRF9160 P0.17 connects to A3
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Pin 1: nRF9160 P0.18 connects to A4
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Pin 2: nRF9160 P0.19 connects to A5
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Pin 0: nRF9160 P0.17 connects to A3
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Pin 1: nRF9160 P0.18 connects to A4
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Pin 2: nRF9160 P0.19 connects to A5
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config BOARD_PCA10090_INTERFACE0_MCU
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bool "Route to nRF52840"
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help
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This connects the following pins on the nRF9160 to pins on the nRF52840:
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Pin 0: nRF9160 P0.17 connects to nRF52840 P0.17
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Pin 1: nRF9160 P0.18 connects to nRF52840 P0.20
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Pin 2: nRF9160 P0.19 connects to nRF52840 P0.15
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This connects the following pins on the nRF9160 to pins on the nRF52840:
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Pin 0: nRF9160 P0.17 connects to nRF52840 P0.17
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Pin 1: nRF9160 P0.18 connects to nRF52840 P0.20
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Pin 2: nRF9160 P0.19 connects to nRF52840 P0.15
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endchoice
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@ -159,16 +159,16 @@ choice
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config BOARD_PCA10090_INTERFACE1_TRACE
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bool "Route to TRACE interface"
|
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help
|
||||
Pin 3: nRF9160 P0.21 connects to TRACECLK
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Pin 4: nRF9160 P0.22 connects to TRACEDATA0
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Pin 5: nRF9160 P0.23 connects to TRACEDATA1
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Pin 3: nRF9160 P0.21 connects to TRACECLK
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Pin 4: nRF9160 P0.22 connects to TRACEDATA0
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Pin 5: nRF9160 P0.23 connects to TRACEDATA1
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config BOARD_PCA10090_INTERFACE1_MCU
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bool "Route to nRF52840"
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help
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Pin 3: nRF9160 P0.21 connects to nRF52840 P0.22
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Pin 4: nRF9160 P0.22 connects to nRF52840 P1.04
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Pin 5: nRF9160 P0.23 connects to nRF52840 P1.02
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Pin 3: nRF9160 P0.21 connects to nRF52840 P0.22
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Pin 4: nRF9160 P0.22 connects to nRF52840 P1.04
|
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Pin 5: nRF9160 P0.23 connects to nRF52840 P1.02
|
||||
|
||||
endchoice
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@ -179,25 +179,25 @@ choice
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config BOARD_PCA10090_INTERFACE2_COEX
|
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bool "Route to COEX interface"
|
||||
help
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||||
Pin 6: nRF9160 COEX0 connects to COEX0_PH
|
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Pin 7: nRF9160 COEX1 connects to COEX1_PH
|
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Pin 8: nRF9160 COEX2 connects to COEX2_PH
|
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Pin 6: nRF9160 COEX0 connects to COEX0_PH
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||||
Pin 7: nRF9160 COEX1 connects to COEX1_PH
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Pin 8: nRF9160 COEX2 connects to COEX2_PH
|
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|
||||
config BOARD_PCA10090_INTERFACE2_MCU
|
||||
bool "Route to nRF52840"
|
||||
help
|
||||
Pin 6: nRF9160 COEX0 connects to nRF52840 P1.13
|
||||
Pin 7: nRF9160 COEX1 connects to nRF52840 P1.11
|
||||
Pin 8: nRF9160 COEX2 connects to nRF52840 P1.15
|
||||
Pin 6: nRF9160 COEX0 connects to nRF52840 P1.13
|
||||
Pin 7: nRF9160 COEX1 connects to nRF52840 P1.11
|
||||
Pin 8: nRF9160 COEX2 connects to nRF52840 P1.15
|
||||
|
||||
endchoice
|
||||
|
||||
config BOARD_PCA10090_NRF52840_RESET
|
||||
bool "Enable GPIO reset line"
|
||||
help
|
||||
Let the nRF52840 be reset from the nRF9160 via a GPIO line.
|
||||
The GPIO line may only be one of the first 6 MCU interface pins.
|
||||
The line is active high.
|
||||
Let the nRF52840 be reset from the nRF9160 via a GPIO line.
|
||||
The GPIO line may only be one of the first 6 MCU interface pins.
|
||||
The line is active high.
|
||||
|
||||
if BOARD_PCA10090_NRF52840_RESET
|
||||
|
||||
|
|
@ -210,43 +210,43 @@ config BOARD_PCA10090_NRF52840_RESET_P0_17
|
|||
bool "P0.17"
|
||||
depends on BOARD_PCA10090_INTERFACE0_MCU
|
||||
help
|
||||
Pin P0.17 on nRF52840,
|
||||
connected to P0.17 on the nRF9160.
|
||||
Pin P0.17 on nRF52840,
|
||||
connected to P0.17 on the nRF9160.
|
||||
|
||||
config BOARD_PCA10090_NRF52840_RESET_P0_20
|
||||
bool "P0.20"
|
||||
depends on BOARD_PCA10090_INTERFACE0_MCU
|
||||
help
|
||||
Pin P0.20 on nRF52840,
|
||||
connected to P0.18 on the nRF9160.
|
||||
Pin P0.20 on nRF52840,
|
||||
connected to P0.18 on the nRF9160.
|
||||
|
||||
config BOARD_PCA10090_NRF52840_RESET_P0_15
|
||||
bool "P0.15"
|
||||
depends on BOARD_PCA10090_INTERFACE0_MCU
|
||||
help
|
||||
Pin P0.15 on nRF52840,
|
||||
connected to P0.19 on the nRF9160.
|
||||
Pin P0.15 on nRF52840,
|
||||
connected to P0.19 on the nRF9160.
|
||||
|
||||
config BOARD_PCA10090_NRF52840_RESET_P0_22
|
||||
bool "P0.22"
|
||||
depends on BOARD_PCA10090_INTERFACE1_MCU
|
||||
help
|
||||
Pin P0.22 on nRF52840,
|
||||
connected to P0.21 on the nRF9160.
|
||||
Pin P0.22 on nRF52840,
|
||||
connected to P0.21 on the nRF9160.
|
||||
|
||||
config BOARD_PCA10090_NRF52840_RESET_P1_04
|
||||
bool "P1.04"
|
||||
depends on BOARD_PCA10090_INTERFACE1_MCU
|
||||
help
|
||||
Pin P1.04 on nRF52840,
|
||||
connected to P0.22 on the nRF9160.
|
||||
Pin P1.04 on nRF52840,
|
||||
connected to P0.22 on the nRF9160.
|
||||
|
||||
config BOARD_PCA10090_NRF52840_RESET_P1_02
|
||||
bool "P1.02"
|
||||
depends on BOARD_PCA10090_INTERFACE1_MCU
|
||||
help
|
||||
Pin P1.02 on nRF52840,
|
||||
connected to P0.23 on the nRF9160.
|
||||
Pin P1.02 on nRF52840,
|
||||
connected to P0.23 on the nRF9160.
|
||||
|
||||
endchoice
|
||||
|
||||
|
|
|
|||
|
|
@ -7,21 +7,21 @@
|
|||
if BOARD_NRF9160_PCA10090 || BOARD_NRF9160_PCA10090NS
|
||||
|
||||
config BOARD_NRF52840_GPIO_RESET
|
||||
bool "Use nRF52840 PCA10090 GPIO reset pin"
|
||||
bool "Use nRF52840 PCA10090 GPIO reset pin"
|
||||
default y if BT_H4
|
||||
help
|
||||
Use a GPIO pin to reset the nRF52840 controller and let it wait
|
||||
until all bytes traveling to the H4 device have been received
|
||||
and drained, thus ensuring communication can begin correctly.
|
||||
help
|
||||
Use a GPIO pin to reset the nRF52840 controller and let it wait until all
|
||||
bytes traveling to the H4 device have been received and drained, thus
|
||||
ensuring communication can begin correctly.
|
||||
|
||||
if BOARD_NRF52840_GPIO_RESET
|
||||
|
||||
config BOARD_NRF52840_GPIO_RESET_PIN
|
||||
int "Reset pin"
|
||||
range 17 23
|
||||
default 23
|
||||
help
|
||||
GPIO pin on the nRF9160 used to reset the nRF52840.
|
||||
int "Reset pin"
|
||||
range 17 23
|
||||
default 23
|
||||
help
|
||||
GPIO pin on the nRF9160 used to reset the nRF52840.
|
||||
|
||||
endif
|
||||
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@ endif # I2C
|
|||
if SPI
|
||||
|
||||
config SPI_2
|
||||
default y
|
||||
default y
|
||||
|
||||
endif # SPI
|
||||
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@ endif # I2C
|
|||
if SPI
|
||||
|
||||
config SPI_2
|
||||
default y
|
||||
default y
|
||||
|
||||
endif # SPI
|
||||
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ endif # I2C
|
|||
if SPI
|
||||
|
||||
config SPI_2
|
||||
default y
|
||||
default y
|
||||
|
||||
endif # SPI
|
||||
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
if BOARD_QEMU_CORTEX_M3
|
||||
|
||||
config BUILD_OUTPUT_BIN
|
||||
default n
|
||||
default n
|
||||
|
||||
config BOARD
|
||||
default "qemu_cortex_m3"
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@ if PWM
|
|||
config PWM_STM32_2
|
||||
default y
|
||||
|
||||
endif #PWM
|
||||
endif # PWM
|
||||
|
||||
|
||||
endif # BOARD_STEVAL_FCU001V1
|
||||
|
|
|
|||
|
|
@ -27,4 +27,4 @@ config BOARD_TWR_KE18F_SPI_1_PCS2
|
|||
depends on SPI_1
|
||||
default y
|
||||
|
||||
endif #BOARD_TWR_KE18F
|
||||
endif # BOARD_TWR_KE18F
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
if BOARD_QEMU_NIOS2
|
||||
|
||||
config BUILD_OUTPUT_BIN
|
||||
default n
|
||||
default n
|
||||
|
||||
config BOARD
|
||||
default "qemu_nios2"
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ config NATIVE_POSIX_CONSOLE
|
|||
config UART_CONSOLE
|
||||
default y if SERIAL
|
||||
|
||||
endif #CONSOLE
|
||||
endif # CONSOLE
|
||||
|
||||
if DISPLAY
|
||||
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
if BOARD_QEMU_RISCV32
|
||||
|
||||
config BUILD_OUTPUT_BIN
|
||||
default n
|
||||
default n
|
||||
|
||||
config BOARD
|
||||
default "qemu_riscv32"
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
if BOARD_QEMU_RISCV64
|
||||
|
||||
config BUILD_OUTPUT_BIN
|
||||
default n
|
||||
default n
|
||||
|
||||
config BOARD
|
||||
default "qemu_riscv64"
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
if BOARD_QEMU_X86
|
||||
|
||||
config BUILD_OUTPUT_BIN
|
||||
default n
|
||||
default n
|
||||
|
||||
config BOARD
|
||||
default "qemu_x86"
|
||||
|
|
|
|||
|
|
@ -11,8 +11,8 @@ if BOARD_UP_SQUARED
|
|||
comment "UP Squared Board Options"
|
||||
|
||||
choice
|
||||
prompt "UP Squared SoC variant"
|
||||
default BOARD_UP_SQUARED_ATOM
|
||||
prompt "UP Squared SoC variant"
|
||||
default BOARD_UP_SQUARED_ATOM
|
||||
|
||||
config BOARD_UP_SQUARED_ATOM
|
||||
bool "Atom E3940"
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
if BOARD_QEMU_XTENSA
|
||||
|
||||
config BUILD_OUTPUT_BIN
|
||||
default n
|
||||
default n
|
||||
|
||||
config BOARD
|
||||
default "qemu_xtensa"
|
||||
|
|
|
|||
|
|
@ -34,4 +34,4 @@ config CAN_NET_INIT_PRIORITY
|
|||
Note that the priority needs to be lower than the net stack
|
||||
so that it can start before the networking sub-system.
|
||||
|
||||
endif #CAN_NET
|
||||
endif # CAN_NET
|
||||
|
|
|
|||
|
|
@ -13,18 +13,18 @@ menuconfig CLOCK_CONTROL_BEETLE
|
|||
depends on SOC_SERIES_BEETLE
|
||||
default y if SOC_SERIES_BEETLE
|
||||
help
|
||||
Enable driver for Reset & Clock Control subsystem found
|
||||
in STM32F4 family of MCUs
|
||||
Enable driver for Reset & Clock Control subsystem found
|
||||
in STM32F4 family of MCUs
|
||||
|
||||
config CLOCK_CONTROL_BEETLE_DEVICE_INIT_PRIORITY
|
||||
int "Clock Control Device Priority"
|
||||
default 1
|
||||
depends on CLOCK_CONTROL_BEETLE
|
||||
help
|
||||
This option controls the priority of clock control
|
||||
device initialization. Higher priority ensures that the device
|
||||
is initialized earlier in the startup cycle. If unsure, leave
|
||||
at default value 1
|
||||
This option controls the priority of clock control
|
||||
device initialization. Higher priority ensures that the device
|
||||
is initialized earlier in the startup cycle. If unsure, leave
|
||||
at default value 1
|
||||
|
||||
config ARM_CLOCK_CONTROL_DEV_NAME
|
||||
string "Clock Config Device name"
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@ config CLOCK_CONTROL_STM32_DEVICE_INIT_PRIORITY
|
|||
at default value 1
|
||||
|
||||
choice CLOCK_STM32_SYSCLK_SRC
|
||||
prompt "STM32 System Clock Source"
|
||||
prompt "STM32 System Clock Source"
|
||||
|
||||
config CLOCK_STM32_SYSCLK_SRC_HSE
|
||||
bool "HSE"
|
||||
|
|
@ -87,9 +87,9 @@ config CLOCK_STM32_MSI_RANGE
|
|||
Range 11: 48 MHz
|
||||
|
||||
choice
|
||||
prompt "STM32 PLL Clock Source"
|
||||
depends on CLOCK_STM32_SYSCLK_SRC_PLL
|
||||
default CLOCK_STM32_PLL_SRC_HSI
|
||||
prompt "STM32 PLL Clock Source"
|
||||
default CLOCK_STM32_PLL_SRC_HSI
|
||||
depends on CLOCK_STM32_SYSCLK_SRC_PLL
|
||||
|
||||
config CLOCK_STM32_PLL_SRC_MSI
|
||||
bool "MSI"
|
||||
|
|
@ -111,8 +111,8 @@ config CLOCK_STM32_PLL_SRC_PLL2
|
|||
bool "PLL2"
|
||||
depends on SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE
|
||||
help
|
||||
Use PLL2 as source of main PLL. This is equivalent of defining
|
||||
PLL2 as source PREDIV1SCR. If not selected, default source is HSE.
|
||||
Use PLL2 as source of main PLL. This is equivalent of defining
|
||||
PLL2 as source PREDIV1SCR. If not selected, default source is HSE.
|
||||
|
||||
endchoice
|
||||
|
||||
|
|
@ -190,8 +190,8 @@ endif # !SOC_SERIES_STM32H7X
|
|||
# Micro-controller Clock output configuration options
|
||||
|
||||
choice
|
||||
prompt "STM32 MCO1 Clock Source"
|
||||
default CLOCK_STM32_MCO1_SRC_NOCLOCK
|
||||
prompt "STM32 MCO1 Clock Source"
|
||||
default CLOCK_STM32_MCO1_SRC_NOCLOCK
|
||||
|
||||
config CLOCK_STM32_MCO1_SRC_NOCLOCK
|
||||
bool "NOCLOCK"
|
||||
|
|
@ -233,8 +233,8 @@ config CLOCK_STM32_MCO1_DIV
|
|||
allowed values: 1, 2, 3, 4, 5
|
||||
|
||||
choice
|
||||
prompt "STM32 MCO2 Clock Source"
|
||||
default CLOCK_STM32_MCO2_SRC_NOCLOCK
|
||||
prompt "STM32 MCO2 Clock Source"
|
||||
default CLOCK_STM32_MCO2_SRC_NOCLOCK
|
||||
|
||||
config CLOCK_STM32_MCO2_SRC_NOCLOCK
|
||||
bool "NOCLOCK"
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@ config CLOCK_STM32_PLL_PREDIV
|
|||
default 1
|
||||
range 1 16
|
||||
help
|
||||
PREDIV is PLLSCR clock signal prescaler, allowed values: 1 - 16.
|
||||
PREDIV is PLLSCR clock signal prescaler, allowed values: 1 - 16.
|
||||
|
||||
config CLOCK_STM32_PLL_PREDIV1
|
||||
int "PREDIV1 Prescaler"
|
||||
|
|
@ -21,12 +21,12 @@ config CLOCK_STM32_PLL_PREDIV1
|
|||
default 1
|
||||
range 1 16
|
||||
help
|
||||
PREDIV is PLLSCR clock signal prescaler, present on STM32F0 SoC having
|
||||
an HSE Oscillator available like the stm32f04xx, stm32f07xx,
|
||||
stm32f09xx and stm32f030xc parts. If configured on a non supported
|
||||
part, the HSI oscillator will be used a default PLL source and this
|
||||
config will be ignored.
|
||||
Allowed values: 1 - 16.
|
||||
PREDIV is PLLSCR clock signal prescaler, present on STM32F0 SoC having
|
||||
an HSE Oscillator available like the stm32f04xx, stm32f07xx,
|
||||
stm32f09xx and stm32f030xc parts. If configured on a non supported
|
||||
part, the HSI oscillator will be used a default PLL source and this
|
||||
config will be ignored.
|
||||
Allowed values: 1 - 16.
|
||||
|
||||
config CLOCK_STM32_PLL_MULTIPLIER
|
||||
int "PLL multiplier"
|
||||
|
|
@ -34,6 +34,6 @@ config CLOCK_STM32_PLL_MULTIPLIER
|
|||
default 6
|
||||
range 2 16
|
||||
help
|
||||
PLL multiplier, allowed values: 2-16. PLL output must not exceed 48MHz.
|
||||
PLL multiplier, allowed values: 2-16. PLL output must not exceed 48MHz.
|
||||
|
||||
endif # SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ config CLOCK_STM32_PLL_XTPRE
|
|||
bool "HSE to PLL /2 prescaler"
|
||||
depends on SOC_STM32F10X_DENSITY_DEVICE && CLOCK_STM32_PLL_SRC_HSE
|
||||
help
|
||||
Enable this option to enable /2 prescaler on HSE to PLL clock signal
|
||||
Enable this option to enable /2 prescaler on HSE to PLL clock signal
|
||||
|
||||
config CLOCK_STM32_PLL_MULTIPLIER
|
||||
int "PLL multiplier"
|
||||
|
|
@ -20,9 +20,9 @@ config CLOCK_STM32_PLL_MULTIPLIER
|
|||
range 2 16 if SOC_STM32F10X_DENSITY_DEVICE
|
||||
range 4 9 if SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE
|
||||
help
|
||||
PLL multiplier, PLL output must not exceed 72MHz. Allowed values:
|
||||
Density devices: 2-16
|
||||
Connectivity devices: 4 - 9 and 13 ( used for multiplication factor 6.5).
|
||||
PLL multiplier, PLL output must not exceed 72MHz. Allowed values:
|
||||
Density devices: 2-16
|
||||
Connectivity devices: 4 - 9 and 13 ( used for multiplication factor 6.5).
|
||||
|
||||
config CLOCK_STM32_PLL_PREDIV1
|
||||
int "PREDIV1 Prescaler"
|
||||
|
|
@ -30,6 +30,6 @@ config CLOCK_STM32_PLL_PREDIV1
|
|||
default 1
|
||||
range 1 16
|
||||
help
|
||||
PREDIV1 is PLL clock signal prescaler, allowed values: 1 - 16.
|
||||
PREDIV1 is PLL clock signal prescaler, allowed values: 1 - 16.
|
||||
|
||||
endif # SOC_SERIES_STM32F1X
|
||||
|
|
|
|||
|
|
@ -13,10 +13,10 @@ config CLOCK_STM32_PLL_M_DIVISOR
|
|||
default 8
|
||||
range 2 63
|
||||
help
|
||||
PLLM division factor needs to be set correctly to ensure that the VCO
|
||||
input frequency ranges from 1 to 2 MHz. It is recommended to select a
|
||||
frequency of 2 MHz to limit PLL jitter.
|
||||
Allowed values: 2-63
|
||||
PLLM division factor needs to be set correctly to ensure that the VCO
|
||||
input frequency ranges from 1 to 2 MHz. It is recommended to select a
|
||||
frequency of 2 MHz to limit PLL jitter.
|
||||
Allowed values: 2-63
|
||||
|
||||
config CLOCK_STM32_PLL_N_MULTIPLIER
|
||||
int "Multiplier factor for PLL VCO output clock"
|
||||
|
|
@ -25,10 +25,10 @@ config CLOCK_STM32_PLL_N_MULTIPLIER
|
|||
range 192 432 if SOC_STM32F401XE || SOC_SERIES_STM32F2X
|
||||
range 50 432
|
||||
help
|
||||
PLLN multiplier factor needs to be set correctly to ensure that the
|
||||
VCO output frequency is between 100 and 432 MHz, except on STM32F401
|
||||
where the frequency must be between 192 and 432 MHz.
|
||||
Allowed values: 50-432 (STM32F401: 192-432)
|
||||
PLLN multiplier factor needs to be set correctly to ensure that the
|
||||
VCO output frequency is between 100 and 432 MHz, except on STM32F401
|
||||
where the frequency must be between 192 and 432 MHz.
|
||||
Allowed values: 50-432 (STM32F401: 192-432)
|
||||
|
||||
config CLOCK_STM32_PLL_P_DIVISOR
|
||||
int "PLL division factor for main system clock"
|
||||
|
|
@ -36,8 +36,8 @@ config CLOCK_STM32_PLL_P_DIVISOR
|
|||
default 4
|
||||
range 2 8
|
||||
help
|
||||
PLLP division factor needs to be set correctly to not exceed 84MHz.
|
||||
Allowed values: 2, 4, 6, 8
|
||||
PLLP division factor needs to be set correctly to not exceed 84MHz.
|
||||
Allowed values: 2, 4, 6, 8
|
||||
|
||||
config CLOCK_STM32_PLL_Q_DIVISOR
|
||||
int "Division factor for OTG FS, SDIO and RNG clocks"
|
||||
|
|
@ -45,8 +45,8 @@ config CLOCK_STM32_PLL_Q_DIVISOR
|
|||
default 7
|
||||
range 2 15
|
||||
help
|
||||
The USB OTG FS requires a 48MHz clock to work correctly. SDIO and RNG
|
||||
need a frequency lower than or equal to 48 MHz to work correctly.
|
||||
Allowed values: 2-15
|
||||
The USB OTG FS requires a 48MHz clock to work correctly. SDIO and RNG
|
||||
need a frequency lower than or equal to 48 MHz to work correctly.
|
||||
Allowed values: 2-15
|
||||
|
||||
endif # SOC_SERIES_STM32F2X || SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X
|
||||
|
|
|
|||
|
|
@ -13,8 +13,8 @@ config CLOCK_STM32_PLL_N_MULTIPLIER
|
|||
default 8
|
||||
range 8 86
|
||||
help
|
||||
PLL multiplier, allowed values: 8-86
|
||||
PLL output must not exceed 56MHz(1.8V)/26MHz(1.2V).
|
||||
PLL multiplier, allowed values: 8-86
|
||||
PLL output must not exceed 56MHz(1.8V)/26MHz(1.2V).
|
||||
|
||||
config CLOCK_STM32_PLL_M_DIVISOR
|
||||
int "PLL divisor"
|
||||
|
|
|
|||
|
|
@ -13,8 +13,8 @@ config CLOCK_STM32_PLL_MULTIPLIER
|
|||
default 4
|
||||
range 3 48
|
||||
help
|
||||
PLL multiplier, allowed values: 3, 4, 6, 8, 12, 16, 24, 32, 48.
|
||||
PLL output must not exceed 96MHz(1.8V)/48MHz(1.5V)/24MHz(1.2V).
|
||||
PLL multiplier, allowed values: 3, 4, 6, 8, 12, 16, 24, 32, 48.
|
||||
PLL output must not exceed 96MHz(1.8V)/48MHz(1.5V)/24MHz(1.2V).
|
||||
|
||||
config CLOCK_STM32_PLL_DIVISOR
|
||||
int "PLL divisor"
|
||||
|
|
|
|||
|
|
@ -179,7 +179,7 @@ config IPM_CONSOLE_STACK_SIZE
|
|||
thread to print out incoming messages from the remote CPU. Specify the
|
||||
stack size for these threads here.
|
||||
|
||||
config UART_PIPE
|
||||
config UART_PIPE
|
||||
bool "Enable pipe UART driver"
|
||||
select UART_INTERRUPT_DRIVEN
|
||||
help
|
||||
|
|
|
|||
|
|
@ -25,4 +25,4 @@ config DUMMY_DISPLAY_Y_RES
|
|||
int "Y resolution for dummy display"
|
||||
default 240
|
||||
|
||||
endif #DUMMY_DISPLAY
|
||||
endif # DUMMY_DISPLAY
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@ menuconfig ILI9340
|
|||
bool "ILI9340 display driver"
|
||||
depends on SPI
|
||||
help
|
||||
Enable driver for ILI9340 display driver.
|
||||
Enable driver for ILI9340 display driver.
|
||||
|
||||
if ILI9340
|
||||
|
||||
|
|
@ -18,7 +18,7 @@ choice
|
|||
prompt "LCD"
|
||||
default ILI9340_LCD_ADAFRUIT_1480
|
||||
help
|
||||
Specify the type of LCD connected to the ILI9340 display controller.
|
||||
Specify the type of LCD connected to the ILI9340 display controller.
|
||||
|
||||
config ILI9340_LCD_ADAFRUIT_1480
|
||||
bool "Adafruit 2.2\" TFT 1480"
|
||||
|
|
@ -31,7 +31,7 @@ endchoice
|
|||
choice
|
||||
prompt "Color pixel format"
|
||||
help
|
||||
Specify the color pixel format of the ILI9340 display controller.
|
||||
Specify the color pixel format of the ILI9340 display controller.
|
||||
|
||||
config ILI9340_RGB888
|
||||
bool "RGB888"
|
||||
|
|
@ -41,4 +41,4 @@ config ILI9340_RGB565
|
|||
|
||||
endchoice
|
||||
|
||||
endif #ILI9340
|
||||
endif # ILI9340
|
||||
|
|
|
|||
|
|
@ -40,4 +40,4 @@ config SSD1306_REVERSE_MODE
|
|||
help
|
||||
SSD16XX reverse video mode.
|
||||
|
||||
endif #SSD1306
|
||||
endif # SSD1306
|
||||
|
|
|
|||
|
|
@ -63,6 +63,6 @@ config ST7789V_REVERSE_Y
|
|||
help
|
||||
Address pixels from bottom to top.
|
||||
|
||||
endif #ST7789V_RGB565
|
||||
endif # ST7789V_RGB565
|
||||
|
||||
endif #ST7789V
|
||||
endif # ST7789V
|
||||
|
|
|
|||
|
|
@ -8,4 +8,4 @@ config DMA_SAM0
|
|||
default y
|
||||
depends on SOC_FAMILY_SAM0
|
||||
help
|
||||
DMA driver for Atmel SAM0 series MCUs.
|
||||
DMA driver for Atmel SAM0 series MCUs.
|
||||
|
|
|
|||
|
|
@ -55,7 +55,7 @@ config ETH_ENC28J60_0_FULL_DUPLEX
|
|||
config ETH_ENC28J60_0_GPIO_SPI_CS
|
||||
bool "Manage SPI CS through a GPIO pin"
|
||||
help
|
||||
This option is useful if one needs to manage SPI CS through a GPIO
|
||||
pin to by-pass the SPI controller's CS logic.
|
||||
This option is useful if one needs to manage SPI CS through a GPIO
|
||||
pin to by-pass the SPI controller's CS logic.
|
||||
|
||||
endif #ETH_ENC28J60 && ETH_ENC28J60_0
|
||||
endif # ETH_ENC28J60 && ETH_ENC28J60_0
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@ config ETH_MCUX_TX_BUFFERS
|
|||
config ETH_MCUX_0
|
||||
bool "MCUX Ethernet port 0"
|
||||
help
|
||||
Include port 0 driver
|
||||
Include port 0 driver
|
||||
|
||||
choice ETH_MCUX_0_MAC_SELECT
|
||||
prompt "MAC address"
|
||||
|
|
|
|||
|
|
@ -104,7 +104,7 @@ config ETH_NATIVE_POSIX_VLAN_TAG_STRIP
|
|||
|
||||
if ! ETH_NATIVE_POSIX_RANDOM_MAC
|
||||
|
||||
config ETH_NATIVE_POSIX_MAC_ADDR
|
||||
config ETH_NATIVE_POSIX_MAC_ADDR
|
||||
string "MAC address for the interface"
|
||||
default ""
|
||||
help
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ menuconfig ETH_STM32_HAL
|
|||
select USE_STM32_HAL_ETH
|
||||
help
|
||||
Enable STM32 HAL based Ethernet driver. It is available for
|
||||
all Ethernet enabled variants of the F2, F4 and F7 series.
|
||||
all Ethernet enabled variants of the F2, F4 and F7 series.
|
||||
|
||||
if ETH_STM32_HAL
|
||||
|
||||
|
|
@ -90,10 +90,10 @@ config ETH_STM32_HAL_MII
|
|||
|
||||
config ETH_STM32_CARRIER_CHECK_RX_IDLE_TIMEOUT_MS
|
||||
int "Carrier check timeout period (ms)"
|
||||
default 500
|
||||
range 100 30000
|
||||
help
|
||||
Set the RX idle timeout period in milliseconds after which the
|
||||
default 500
|
||||
range 100 30000
|
||||
help
|
||||
Set the RX idle timeout period in milliseconds after which the
|
||||
PHY's carrier status is re-evaluated.
|
||||
|
||||
endif # ETH_STM32_HAL
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@ config SPI_NOR_CS_WAIT_DELAY
|
|||
int "Delay time in us"
|
||||
default 0
|
||||
help
|
||||
This is the wait delay (in us) to allow for CS switching to take effect
|
||||
This is the wait delay (in us) to allow for CS switching to take effect
|
||||
|
||||
config SPI_NOR_FLASH_LAYOUT_PAGE_SIZE
|
||||
int "Page size to use for FLASH_LAYOUT feature"
|
||||
|
|
|
|||
|
|
@ -11,6 +11,6 @@ config SOC_FLASH_SAM
|
|||
select FLASH_HAS_PAGE_LAYOUT
|
||||
select FLASH_HAS_DRIVER_ENABLED
|
||||
help
|
||||
Enable the Atmel SAM series internal flash driver.
|
||||
Enable the Atmel SAM series internal flash driver.
|
||||
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -11,13 +11,13 @@ menuconfig SOC_FLASH_SAM0
|
|||
select FLASH_HAS_PAGE_LAYOUT
|
||||
select FLASH_HAS_DRIVER_ENABLED
|
||||
help
|
||||
Enable the Atmel SAM0 series internal flash driver.
|
||||
Enable the Atmel SAM0 series internal flash driver.
|
||||
|
||||
config SOC_FLASH_SAM0_EMULATE_BYTE_PAGES
|
||||
bool "Emulate byte-sized pages"
|
||||
depends on SOC_FLASH_SAM0
|
||||
help
|
||||
Emulate a device with byte-sized pages by doing a
|
||||
read/modify/erase/write. Needed for NFFS.
|
||||
Emulate a device with byte-sized pages by doing a
|
||||
read/modify/erase/write. Needed for NFFS.
|
||||
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@ config SOC_FLASH_STM32
|
|||
select FLASH_HAS_PAGE_LAYOUT if SOC_SERIES_STM32WBX
|
||||
select FLASH_HAS_PAGE_LAYOUT if SOC_SERIES_STM32G4X
|
||||
help
|
||||
Enable STM32F0x, STM32F3x, STM32F4x, STM32F7x, STM32L4x, STM32WBx, STM32G0x or STM32G4x series flash driver.
|
||||
Enable STM32F0x, STM32F3x, STM32F4x, STM32F7x, STM32L4x, STM32WBx,
|
||||
STM32G0x or STM32G4x series flash driver.
|
||||
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -27,15 +27,15 @@ config SPI_FLASH_W25QXXDV_INIT_PRIORITY
|
|||
config SPI_FLASH_W25QXXDV_GPIO_SPI_CS
|
||||
bool "Manage SPI CS through a GPIO pin"
|
||||
help
|
||||
This option is useful if one needs to manage SPI CS through a GPIO
|
||||
pin to by-pass the SPI controller's CS logic.
|
||||
This option is useful if one needs to manage SPI CS through a GPIO
|
||||
pin to by-pass the SPI controller's CS logic.
|
||||
|
||||
config SPI_FLASH_W25QXXDV_GPIO_CS_WAIT_DELAY
|
||||
int "Delay time in us"
|
||||
default 0
|
||||
depends on SPI_FLASH_W25QXXDV_GPIO_SPI_CS
|
||||
depends on SPI_FLASH_W25QXXDV_GPIO_SPI_CS
|
||||
help
|
||||
This is the wait delay (in us) to allow for CS switching to take effect
|
||||
This is the wait delay (in us) to allow for CS switching to take effect
|
||||
|
||||
config SPI_FLASH_W25QXXDV_FLASH_SIZE
|
||||
int "Flash size in bytes"
|
||||
|
|
@ -48,7 +48,7 @@ config SPI_FLASH_W25QXXDV_DEVICE_ID
|
|||
default 0x00ef4015
|
||||
help
|
||||
This is the device ID of the flash chip to use, which is 0x00ef4015 for
|
||||
the W25QXXDV
|
||||
the W25QXXDV
|
||||
|
||||
config SPI_FLASH_W25QXXDV_PAGE_PROGRAM_SIZE
|
||||
int "Page Program Size in bytes"
|
||||
|
|
|
|||
|
|
@ -10,39 +10,38 @@ menuconfig GPIO_XEC
|
|||
depends on SOC_FAMILY_MEC
|
||||
select HAS_DTS_GPIO
|
||||
help
|
||||
Enable the Microchip XEC gpio driver.
|
||||
Enable the Microchip XEC gpio driver.
|
||||
|
||||
if GPIO_XEC
|
||||
|
||||
config GPIO_XEC_GPIO000_036
|
||||
bool "GPIO 000-036"
|
||||
help
|
||||
Enable GPIO 000-036 or what would be equivalent to PortA.
|
||||
Enable GPIO 000-036 or what would be equivalent to PortA.
|
||||
|
||||
config GPIO_XEC_GPIO040_076
|
||||
bool "GPIO 040-036"
|
||||
help
|
||||
Enable GPIO 040-076 or what would be equivalent to Port B
|
||||
Enable GPIO 040-076 or what would be equivalent to Port B
|
||||
|
||||
config GPIO_XEC_GPIO100_136
|
||||
bool "GPIO 100-136"
|
||||
help
|
||||
Enable GPIO 100-136 or what would be equivalent to Port C
|
||||
Enable GPIO 100-136 or what would be equivalent to Port C
|
||||
|
||||
config GPIO_XEC_GPIO140_176
|
||||
bool "GPIO 140-176"
|
||||
help
|
||||
Enable GPIO 140-176 or what would be equivalent to Port C
|
||||
Enable GPIO 140-176 or what would be equivalent to Port C
|
||||
|
||||
config GPIO_XEC_GPIO200_236
|
||||
bool "GPIO 200-236"
|
||||
help
|
||||
Enable GPIO 200-236 or what would be equivalent to Port D
|
||||
Enable GPIO 200-236 or what would be equivalent to Port D
|
||||
|
||||
config GPIO_XEC_GPIO240_276
|
||||
bool "GPIO 240-276"
|
||||
help
|
||||
Enable GPIO 240-276 or what would be equivalent to Port E
|
||||
Enable GPIO 240-276 or what would be equivalent to Port E
|
||||
|
||||
endif # GPIO_XEC
|
||||
|
||||
|
|
|
|||
|
|
@ -117,4 +117,4 @@ endchoice
|
|||
|
||||
endif # I2C_3 && !SPI_3 && !(SOC_SERIES_NRF91X && UART_3_NRF_UARTE)
|
||||
|
||||
endif #I2C_NRFX
|
||||
endif # I2C_NRFX
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ menuconfig I2C_XEC
|
|||
bool "XEC Microchip I2C driver"
|
||||
depends on SOC_FAMILY_MEC
|
||||
help
|
||||
Enable the Microchip XEC I2C driver.
|
||||
Enable the Microchip XEC I2C driver.
|
||||
|
||||
if I2C_XEC
|
||||
|
||||
|
|
@ -31,4 +31,4 @@ config I2C_XEC_2
|
|||
This tells the driver to configure the I2C device at boot, depending
|
||||
on the additional configuration options below.
|
||||
|
||||
endif #I2C_XEC
|
||||
endif # I2C_XEC
|
||||
|
|
|
|||
|
|
@ -21,8 +21,8 @@ config IEEE802154_CC2520_DRV_NAME
|
|||
config IEEE802154_CC2520_GPIO_SPI_CS
|
||||
bool "Manage SPI CS through a GPIO pin"
|
||||
help
|
||||
This option is useful if one needs to manage SPI CS through a GPIO
|
||||
pin to by-pass the SPI controller's CS logic.
|
||||
This option is useful if one needs to manage SPI CS through a GPIO
|
||||
pin to by-pass the SPI controller's CS logic.
|
||||
|
||||
config IEEE802154_CC2520_RX_STACK_SIZE
|
||||
int "Driver's internal RX thread stack size"
|
||||
|
|
|
|||
|
|
@ -76,7 +76,7 @@ config IOAPIC_MASK_RTE
|
|||
when the OS starts up, or a previous boot stage has done some IOAPIC
|
||||
configuration that needs to be preserved.
|
||||
|
||||
endif #LOAPIC
|
||||
endif # LOAPIC
|
||||
|
||||
config ARCV2_INTERRUPT_UNIT
|
||||
bool "ARCv2 Interrupt Unit"
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ config SAM0_EIC
|
|||
bool "External Interrupt Controller (EIC) Driver for SAM0 series devices"
|
||||
default y
|
||||
help
|
||||
Enable EIC driver for SAM0 series of devices. This is required for
|
||||
GPIO interrupt support.
|
||||
Enable EIC driver for SAM0 series of devices. This is required for
|
||||
GPIO interrupt support.
|
||||
|
||||
endif # SOC_FAMILY_SAM0
|
||||
|
|
|
|||
|
|
@ -9,36 +9,36 @@
|
|||
menuconfig SHARED_IRQ
|
||||
bool "Shared interrupt driver"
|
||||
help
|
||||
Include shared interrupt support in system. Shared interrupt
|
||||
support is NOT required in most systems. If in doubt answer no.
|
||||
Include shared interrupt support in system. Shared interrupt
|
||||
support is NOT required in most systems. If in doubt answer no.
|
||||
|
||||
config SHARED_IRQ_NUM_CLIENTS
|
||||
int "The number of clients per instance"
|
||||
depends on SHARED_IRQ
|
||||
default 5
|
||||
help
|
||||
Configures the maximum number of clients allowed per shared
|
||||
instance of the shared interrupt driver. To conserve RAM set
|
||||
this value to the lowest practical value.
|
||||
Configures the maximum number of clients allowed per shared
|
||||
instance of the shared interrupt driver. To conserve RAM set
|
||||
this value to the lowest practical value.
|
||||
|
||||
config SHARED_IRQ_INIT_PRIORITY
|
||||
int "Shared IRQ init priority"
|
||||
depends on SHARED_IRQ
|
||||
default 45
|
||||
help
|
||||
Shared IRQ are initialized on POST_KERNEL init level. They
|
||||
have to be initialized before any device that uses them.
|
||||
Shared IRQ are initialized on POST_KERNEL init level. They
|
||||
have to be initialized before any device that uses them.
|
||||
|
||||
config SHARED_IRQ_0
|
||||
bool "Shared interrupt instance 0"
|
||||
depends on SHARED_IRQ
|
||||
help
|
||||
Provide an instance of the shared interrupt driver when system
|
||||
configuration requires that multiple devices share an interrupt.
|
||||
Provide an instance of the shared interrupt driver when system
|
||||
configuration requires that multiple devices share an interrupt.
|
||||
|
||||
config SHARED_IRQ_1
|
||||
bool "Shared interrupt instance 1"
|
||||
depends on SHARED_IRQ
|
||||
help
|
||||
Provide an instance of the shared interrupt driver when system
|
||||
configuration requires that multiple devices share an interrupt.
|
||||
Provide an instance of the shared interrupt driver when system
|
||||
configuration requires that multiple devices share an interrupt.
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ config EXTI_STM32
|
|||
bool "External Interrupt/Event Controller (EXTI) Driver for STM32 family of MCUs"
|
||||
default y if SOC_FAMILY_STM32
|
||||
help
|
||||
Enable EXTI driver for STM32 line of MCUs
|
||||
Enable EXTI driver for STM32 line of MCUs
|
||||
|
||||
config EXTI_STM32_EXTI1_0_IRQ_PRI
|
||||
int "EXTI1:0 IRQ priority"
|
||||
|
|
@ -19,7 +19,7 @@ config EXTI_STM32_EXTI1_0_IRQ_PRI
|
|||
depends on SOC_SERIES_STM32F0X || SOC_SERIES_STM32L0X || SOC_SERIES_STM32G0X
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI1:0 interrupt
|
||||
IRQ priority of EXTI1:0 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI3_2_IRQ_PRI
|
||||
int "EXTI3:2 IRQ priority"
|
||||
|
|
@ -27,7 +27,7 @@ config EXTI_STM32_EXTI3_2_IRQ_PRI
|
|||
depends on SOC_SERIES_STM32F0X || SOC_SERIES_STM32L0X || SOC_SERIES_STM32G0X
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI3:2 interrupt
|
||||
IRQ priority of EXTI3:2 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI15_4_IRQ_PRI
|
||||
int "EXTI15:4 IRQ priority"
|
||||
|
|
@ -35,7 +35,7 @@ config EXTI_STM32_EXTI15_4_IRQ_PRI
|
|||
depends on SOC_SERIES_STM32F0X || SOC_SERIES_STM32L0X || SOC_SERIES_STM32G0X
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI15:4 interrupt
|
||||
IRQ priority of EXTI15:4 interrupt
|
||||
|
||||
if SOC_SERIES_STM32F0X!=y && SOC_SERIES_STM32L0X!=y && SOC_SERIES_STM32G0X!=y
|
||||
|
||||
|
|
@ -44,35 +44,35 @@ config EXTI_STM32_EXTI0_IRQ_PRI
|
|||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI0 interrupt
|
||||
IRQ priority of EXTI0 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI1_IRQ_PRI
|
||||
int "EXTI1 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI1 interrupt
|
||||
IRQ priority of EXTI1 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI2_IRQ_PRI
|
||||
int "EXTI2 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI2 interrupt
|
||||
IRQ priority of EXTI2 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI3_IRQ_PRI
|
||||
int "EXTI3 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI3 interrupt
|
||||
IRQ priority of EXTI3 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI4_IRQ_PRI
|
||||
int "EXTI4 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI4 interrupt
|
||||
IRQ priority of EXTI4 interrupt
|
||||
|
||||
if SOC_SERIES_STM32MP1X
|
||||
config EXTI_STM32_EXTI5_IRQ_PRI
|
||||
|
|
@ -80,77 +80,77 @@ config EXTI_STM32_EXTI5_IRQ_PRI
|
|||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI5 interrupt
|
||||
IRQ priority of EXTI5 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI6_IRQ_PRI
|
||||
int "EXTI6 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI6 interrupt
|
||||
IRQ priority of EXTI6 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI7_IRQ_PRI
|
||||
int "EXTI7 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI7 interrupt
|
||||
IRQ priority of EXTI7 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI8_IRQ_PRI
|
||||
int "EXTI8 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI8 interrupt
|
||||
IRQ priority of EXTI8 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI9_IRQ_PRI
|
||||
int "EXTI9 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI9 interrupt
|
||||
IRQ priority of EXTI9 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI10_IRQ_PRI
|
||||
int "EXTI10 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI10 interrupt
|
||||
IRQ priority of EXTI10 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI11_IRQ_PRI
|
||||
int "EXTI11 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI11 interrupt
|
||||
IRQ priority of EXTI11 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI12_IRQ_PRI
|
||||
int "EXTI12 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI12 interrupt
|
||||
IRQ priority of EXTI12 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI13_IRQ_PRI
|
||||
int "EXTI13 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI13 interrupt
|
||||
IRQ priority of EXTI13 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI14_IRQ_PRI
|
||||
int "EXTI14 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI14 interrupt
|
||||
IRQ priority of EXTI14 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI15_IRQ_PRI
|
||||
int "EXTI15 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI15 interrupt
|
||||
IRQ priority of EXTI15 interrupt
|
||||
|
||||
endif # SOC_SERIES_STM32MP1X
|
||||
|
||||
|
|
@ -160,14 +160,14 @@ config EXTI_STM32_EXTI9_5_IRQ_PRI
|
|||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI9:5 interrupt
|
||||
IRQ priority of EXTI9:5 interrupt
|
||||
|
||||
config EXTI_STM32_EXTI15_10_IRQ_PRI
|
||||
int "EXTI15:10 IRQ priority"
|
||||
depends on EXTI_STM32
|
||||
default 0
|
||||
help
|
||||
IRQ priority of EXTI15:10 interrupt
|
||||
IRQ priority of EXTI15:10 interrupt
|
||||
endif # SOC_SERIES_STM32MP1X!=y
|
||||
|
||||
endif # SOC_SERIES_STM32F0X!=y && SOC_SERIES_STM32L0X!=y && SOC_SERIES_STM32G0X!=y
|
||||
|
|
@ -178,7 +178,7 @@ config EXTI_STM32_PVD_IRQ_PRI
|
|||
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32F2X || SOC_SERIES_STM32G0X
|
||||
default 0
|
||||
help
|
||||
IRQ priority of RVD Through interrupt
|
||||
IRQ priority of RVD Through interrupt
|
||||
|
||||
config EXTI_STM32_OTG_FS_WKUP_IRQ_PRI
|
||||
int "USB OTG FS Wake Up IRQ priority"
|
||||
|
|
@ -186,7 +186,7 @@ config EXTI_STM32_OTG_FS_WKUP_IRQ_PRI
|
|||
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32F2X
|
||||
default 0
|
||||
help
|
||||
IRQ priority of USB OTG FS Wake interrupt
|
||||
IRQ priority of USB OTG FS Wake interrupt
|
||||
|
||||
config EXTI_STM32_TAMP_STAMP_IRQ_PRI
|
||||
int "Tamper and Timestamp IRQ priority"
|
||||
|
|
@ -194,7 +194,7 @@ config EXTI_STM32_TAMP_STAMP_IRQ_PRI
|
|||
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32F2X
|
||||
default 0
|
||||
help
|
||||
IRQ priority of Tamper and Timestamp interrupt
|
||||
IRQ priority of Tamper and Timestamp interrupt
|
||||
|
||||
config EXTI_STM32_RTC_WKUP_IRQ_PRI
|
||||
int "RTC Wake Up IRQ priority"
|
||||
|
|
@ -202,7 +202,7 @@ config EXTI_STM32_RTC_WKUP_IRQ_PRI
|
|||
depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X || SOC_SERIES_STM32F2X
|
||||
default 0
|
||||
help
|
||||
IRQ priority of RTC Wake Up interrupt
|
||||
IRQ priority of RTC Wake Up interrupt
|
||||
|
||||
config EXTI_STM32_LPTIM1_IRQ_PRI
|
||||
int "LPTIM1 IRQ priority"
|
||||
|
|
@ -210,6 +210,6 @@ config EXTI_STM32_LPTIM1_IRQ_PRI
|
|||
depends on SOC_SERIES_STM32F7X
|
||||
default 0
|
||||
help
|
||||
IRQ priority of LPTIM1 interrupt
|
||||
IRQ priority of LPTIM1 interrupt
|
||||
|
||||
endif # SOC_FAMILY_STM32
|
||||
|
|
|
|||
|
|
@ -25,4 +25,4 @@ config KSCAN_INIT_PRIORITY
|
|||
help
|
||||
Keyboard scan device driver initialization priority.
|
||||
|
||||
endif #KSCAN
|
||||
endif # KSCAN
|
||||
|
|
|
|||
|
|
@ -18,32 +18,32 @@ config KSCAN_XEC_COLUMN_SIZE
|
|||
int "KSCAN_XEC_COLUMN_SIZE"
|
||||
default 16
|
||||
help
|
||||
Adjust the value to your keyboard columns. The maximum
|
||||
column size for the Microchip XEC family is 18 (from 0 to 17).
|
||||
Adjust the value to your keyboard columns. The maximum
|
||||
column size for the Microchip XEC family is 18 (from 0 to 17).
|
||||
|
||||
config KSCAN_XEC_ROW_SIZE
|
||||
int "KSCAN_XEC_ROW_SIZE"
|
||||
default 8
|
||||
help
|
||||
Adjust the value to your keyboard rows. The maximum
|
||||
column size for the Microchip XEC family is 8 (from 0 to 7).
|
||||
Adjust the value to your keyboard rows. The maximum
|
||||
column size for the Microchip XEC family is 8 (from 0 to 7).
|
||||
|
||||
config KSCAN_XEC_DEBOUNCE_DOWN
|
||||
int "KSCAN_XEC_DEBOUNCE_DOWN"
|
||||
default 10
|
||||
help
|
||||
Determines the time in msecs for debouncing a key press.
|
||||
Determines the time in msecs for debouncing a key press.
|
||||
|
||||
config KSCAN_XEC_DEBOUNCE_UP
|
||||
int "KSCAN_XEC_DEBOUNCE_UP"
|
||||
default 20
|
||||
help
|
||||
Determines the time in msecs for debouncing a key release.
|
||||
Determines the time in msecs for debouncing a key release.
|
||||
|
||||
config KSCAN_XEC_POLL_PERIOD
|
||||
int "KSCAN_XEC_POLL_PERIOD"
|
||||
default 5
|
||||
help
|
||||
Defines the poll period in msecs between between matrix scans.
|
||||
Defines the poll period in msecs between between matrix scans.
|
||||
|
||||
endif #KSCAN_XEC
|
||||
endif # KSCAN_XEC
|
||||
|
|
|
|||
|
|
@ -56,4 +56,4 @@ config HT16K33_KEYSCAN_POLL_MSEC
|
|||
Keyscan poll interval in milliseconds. Polling is only used
|
||||
if no interrupt line is present.
|
||||
|
||||
endif #HT16K33_KEYSCAN
|
||||
endif # HT16K33_KEYSCAN
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
menuconfig LED_STRIP
|
||||
bool "LED strip drivers"
|
||||
help
|
||||
Include LED strip drivers in the system configuration.
|
||||
Include LED strip drivers in the system configuration.
|
||||
|
||||
if LED_STRIP
|
||||
|
||||
|
|
|
|||
|
|
@ -9,5 +9,5 @@ config APA102_STRIP
|
|||
depends on SPI
|
||||
select LED_STRIP_RGB_SCRATCH
|
||||
help
|
||||
Enable the LED strip driver for a chain of APA102 RGB LEDs.
|
||||
These are sold as DotStar by Adafruit and Superled by others.
|
||||
Enable the LED strip driver for a chain of APA102 RGB LEDs.
|
||||
These are sold as DotStar by Adafruit and Superled by others.
|
||||
|
|
|
|||
|
|
@ -8,12 +8,12 @@ config LPD880X_STRIP
|
|||
bool "Enable LPD880x SPI LED strip driver"
|
||||
depends on SPI
|
||||
help
|
||||
Enable LED strip driver for daisy chains of LPD880x
|
||||
(LPD8803, LPD8806, or compatible) devices.
|
||||
Enable LED strip driver for daisy chains of LPD880x
|
||||
(LPD8803, LPD8806, or compatible) devices.
|
||||
|
||||
Each LPD880x LED driver chip has some output channels
|
||||
(3 channels for LPD8803, 6 for LPD8806), whose PWM
|
||||
duty cycle can be set at 7 bit resolution via a
|
||||
reduced SPI interface (MOSI and CLK lines only).
|
||||
Each chip also includes data and clock out pins for
|
||||
daisy chaining LED strips.
|
||||
Each LPD880x LED driver chip has some output channels
|
||||
(3 channels for LPD8803, 6 for LPD8806), whose PWM
|
||||
duty cycle can be set at 7 bit resolution via a
|
||||
reduced SPI interface (MOSI and CLK lines only).
|
||||
Each chip also includes data and clock out pins for
|
||||
daisy chaining LED strips.
|
||||
|
|
|
|||
|
|
@ -12,14 +12,14 @@ menuconfig WS2812_STRIP
|
|||
bool "Enable WS2812 (and compatible) LED strip driver"
|
||||
depends on SPI
|
||||
help
|
||||
Enable LED strip driver for daisy chains of WS2812-ish
|
||||
(or WS2812B, WS2813, SK6812, or compatible) devices.
|
||||
These devices have a one-wire communications interface
|
||||
which encodes bits using pulses. Short pulses indicate
|
||||
zero bits, and long pulses indicate ones; refer to the
|
||||
chip datasheets for precise specifications. To implement
|
||||
this in a multitasking operating system, this driver
|
||||
generates the pulses using a SPI peripheral.
|
||||
Enable LED strip driver for daisy chains of WS2812-ish
|
||||
(or WS2812B, WS2813, SK6812, or compatible) devices.
|
||||
These devices have a one-wire communications interface
|
||||
which encodes bits using pulses. Short pulses indicate
|
||||
zero bits, and long pulses indicate ones; refer to the
|
||||
chip datasheets for precise specifications. To implement
|
||||
this in a multitasking operating system, this driver
|
||||
generates the pulses using a SPI peripheral.
|
||||
|
||||
if WS2812_STRIP
|
||||
|
||||
|
|
@ -27,33 +27,33 @@ config WS2812_STRIP_MAX_PIXELS
|
|||
int "Maximum number of pixels in a strip"
|
||||
default 12
|
||||
help
|
||||
Set this to the maximum number of pixels you need
|
||||
to control at once. There is an 8x memory penalty associated
|
||||
with each increment of this value, so it's worth optimizing.
|
||||
Set this to the maximum number of pixels you need
|
||||
to control at once. There is an 8x memory penalty associated
|
||||
with each increment of this value, so it's worth optimizing.
|
||||
|
||||
config WS2812_STRIP_ONE_FRAME
|
||||
hex "SPI frame to shift out to signal a one bit"
|
||||
default 0x7c if SOC_SERIES_STM32F4X
|
||||
default 0x70 if SOC_FAMILY_NRF
|
||||
help
|
||||
When shifted out at the configured clock frequency,
|
||||
this must generate a pulse whose width fits within the chipset
|
||||
specifications for T1H, and whose interpulse timing meets low
|
||||
times. It is recommended that the first and last bits in the
|
||||
frame be zero; this "encourages" SPI IPs to leave MOSI low
|
||||
between frames.
|
||||
When shifted out at the configured clock frequency,
|
||||
this must generate a pulse whose width fits within the chipset
|
||||
specifications for T1H, and whose interpulse timing meets low
|
||||
times. It is recommended that the first and last bits in the
|
||||
frame be zero; this "encourages" SPI IPs to leave MOSI low
|
||||
between frames.
|
||||
|
||||
config WS2812_STRIP_ZERO_FRAME
|
||||
hex "SPI frame to shift out to signal a zero bit"
|
||||
default 0x60 if SOC_SERIES_STM32F4X
|
||||
default 0x40 if SOC_FAMILY_NRF
|
||||
help
|
||||
When shifted out at the configured clock frequency,
|
||||
this must generate a pulse whose width fits within the chipset
|
||||
specifications for T0H, and whose interpulse timing meets low
|
||||
times. It is recommended that the first and last bits in the
|
||||
frame be zero; this "encourages" SPI IPs to leave MOSI low
|
||||
between frames.
|
||||
When shifted out at the configured clock frequency,
|
||||
this must generate a pulse whose width fits within the chipset
|
||||
specifications for T0H, and whose interpulse timing meets low
|
||||
times. It is recommended that the first and last bits in the
|
||||
frame be zero; this "encourages" SPI IPs to leave MOSI low
|
||||
between frames.
|
||||
|
||||
# By default, we use GRBW [sic] (and ignore W).
|
||||
comment "The following options determine channel data order on the wire."
|
||||
|
|
@ -63,32 +63,32 @@ config WS2812_RED_ORDER
|
|||
default 1
|
||||
range 0 3
|
||||
help
|
||||
If the red channel is shifted out first, specify 0.
|
||||
If second, specify 1, and so on.
|
||||
If the red channel is shifted out first, specify 0.
|
||||
If second, specify 1, and so on.
|
||||
|
||||
config WS2812_GRN_ORDER
|
||||
int "Order in which a green pixel should be shifted out"
|
||||
default 0
|
||||
range 0 3
|
||||
help
|
||||
If the green channel is shifted out first, specify 0.
|
||||
If second, specify 1, and so on.
|
||||
If the green channel is shifted out first, specify 0.
|
||||
If second, specify 1, and so on.
|
||||
|
||||
config WS2812_BLU_ORDER
|
||||
int "Order in which a blue pixel should be shifted out"
|
||||
default 2
|
||||
range 0 3
|
||||
help
|
||||
If the blue channel is shifted out first, specify 0.
|
||||
If second, specify 1, and so on.
|
||||
If the blue channel is shifted out first, specify 0.
|
||||
If second, specify 1, and so on.
|
||||
|
||||
config WS2812_HAS_WHITE_CHANNEL
|
||||
bool "Does the chip have a white channel on wire?"
|
||||
default y
|
||||
help
|
||||
If the chipset has a white channel, say y. White channels
|
||||
are not used by the driver, but must be declared if expected
|
||||
by the chip.
|
||||
If the chipset has a white channel, say y. White channels
|
||||
are not used by the driver, but must be declared if expected
|
||||
by the chip.
|
||||
|
||||
config WS2812_WHT_ORDER
|
||||
int "Order in which a white pixel should be shifted out"
|
||||
|
|
@ -96,7 +96,7 @@ config WS2812_WHT_ORDER
|
|||
range 0 3
|
||||
depends on WS2812_HAS_WHITE_CHANNEL
|
||||
help
|
||||
If the blue channel is shifted out first, specify 0.
|
||||
If second, specify 1, and so on.
|
||||
If the blue channel is shifted out first, specify 0.
|
||||
If second, specify 1, and so on.
|
||||
|
||||
endif # WS2812_STRIP
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@ config NET_PPP_VERIFY_FCS
|
|||
to disable this as it takes some time to verify the received
|
||||
packet.
|
||||
|
||||
config PPP_MAC_ADDR
|
||||
config PPP_MAC_ADDR
|
||||
string "MAC address for the interface"
|
||||
help
|
||||
Specify a MAC address for the PPP interface in the form of
|
||||
|
|
@ -63,7 +63,7 @@ menuconfig SLIP
|
|||
|
||||
if SLIP
|
||||
|
||||
config SLIP_DRV_NAME
|
||||
config SLIP_DRV_NAME
|
||||
string "SLIP Driver name"
|
||||
default "slip"
|
||||
help
|
||||
|
|
@ -75,7 +75,7 @@ module-str = Log level for slip driver
|
|||
module-help = Sets log level for slip driver.
|
||||
source "subsys/net/Kconfig.template.log_config.net"
|
||||
|
||||
config SLIP_STATISTICS
|
||||
config SLIP_STATISTICS
|
||||
bool "SLIP network connection statistics"
|
||||
help
|
||||
This option enables statistics support for SLIP driver.
|
||||
|
|
@ -87,8 +87,7 @@ config SLIP_TAP
|
|||
help
|
||||
In TAP the Ethernet frames are transferred over SLIP.
|
||||
|
||||
|
||||
config SLIP_MAC_ADDR
|
||||
config SLIP_MAC_ADDR
|
||||
string "MAC address for the interface"
|
||||
help
|
||||
Specify a MAC address for the SLIP interface in the form of
|
||||
|
|
|
|||
|
|
@ -8,9 +8,9 @@ config PINMUX_CC2650
|
|||
depends on GPIO
|
||||
depends on GPIO_CC2650
|
||||
help
|
||||
Enable pin multiplexer for CC2650 SoC.
|
||||
Enable pin multiplexer for CC2650 SoC.
|
||||
|
||||
For hardware reasons, the pinmux depends on the GPIO module
|
||||
being activated; it must initialize *before* the pinmux does.
|
||||
Please take care that the pinmux init priority value is *lower*
|
||||
that the GPIO driver init priority.
|
||||
For hardware reasons, the pinmux depends on the GPIO module
|
||||
being activated; it must initialize *before* the pinmux does.
|
||||
Please take care that the pinmux init priority value is *lower*
|
||||
that the GPIO driver init priority.
|
||||
|
|
|
|||
|
|
@ -9,15 +9,15 @@ config PINMUX_STM32
|
|||
bool "Pinmux driver for STM32 MCUs"
|
||||
depends on SOC_FAMILY_STM32
|
||||
help
|
||||
Enable pin multiplexer for STM32 MCUs
|
||||
Enable pin multiplexer for STM32 MCUs
|
||||
|
||||
config PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY
|
||||
int "Device initialization priority STM32 pinmux"
|
||||
depends on PINMUX_STM32
|
||||
default 2
|
||||
help
|
||||
This option controls the priority of pinmux device initialization.
|
||||
Higher priority ensures that the device is initialized earlier in
|
||||
the startup cycle. Note that the pinmux device needs to be initialized
|
||||
after clock control device, but possibly before all other devices.
|
||||
If unsure, leave at default value 2
|
||||
This option controls the priority of pinmux device initialization.
|
||||
Higher priority ensures that the device is initialized earlier in
|
||||
the startup cycle. Note that the pinmux device needs to be initialized
|
||||
after clock control device, but possibly before all other devices.
|
||||
If unsure, leave at default value 2
|
||||
|
|
|
|||
|
|
@ -9,14 +9,14 @@ menuconfig PINMUX_XEC
|
|||
bool "XEC Microchip Pinmux driver"
|
||||
depends on SOC_FAMILY_MEC
|
||||
help
|
||||
Enable the Microchip XEC pinmux driver.
|
||||
Enable the Microchip XEC pinmux driver.
|
||||
|
||||
if PINMUX_XEC
|
||||
|
||||
config PINMUX_XEC_GPIO000_036
|
||||
bool "Pinmux 000-036"
|
||||
help
|
||||
Enable Port 000-036 or what would be equivalent to Port A.
|
||||
Enable Port 000-036 or what would be equivalent to Port A.
|
||||
|
||||
config PINMUX_XEC_GPIO000_036_NAME
|
||||
string "Pinmux Port 000_036 driver name"
|
||||
|
|
@ -26,7 +26,7 @@ config PINMUX_XEC_GPIO000_036_NAME
|
|||
config PINMUX_XEC_GPIO040_076
|
||||
bool "Pinmux 040-036"
|
||||
help
|
||||
Enable Port 040-076 or what would be equivalent to Port B
|
||||
Enable Port 040-076 or what would be equivalent to Port B
|
||||
|
||||
config PINMUX_XEC_GPIO040_076_NAME
|
||||
string "Pinmux Port 040_076 driver name"
|
||||
|
|
@ -36,7 +36,7 @@ config PINMUX_XEC_GPIO040_076_NAME
|
|||
config PINMUX_XEC_GPIO100_136
|
||||
bool "Pinmux 100-136"
|
||||
help
|
||||
Enable Port 100-136 or what would be equivalent to Port C
|
||||
Enable Port 100-136 or what would be equivalent to Port C
|
||||
|
||||
config PINMUX_XEC_GPIO100_136_NAME
|
||||
string "Pinmux Port 100_136 driver name"
|
||||
|
|
@ -46,7 +46,7 @@ config PINMUX_XEC_GPIO100_136_NAME
|
|||
config PINMUX_XEC_GPIO140_176
|
||||
bool "Pinmux 140-176"
|
||||
help
|
||||
Enable Port 140-176 or what would be equivalent to Port C
|
||||
Enable Port 140-176 or what would be equivalent to Port C
|
||||
|
||||
config PINMUX_XEC_GPIO140_176_NAME
|
||||
string "Pinmux Port 140_176 driver name"
|
||||
|
|
@ -56,7 +56,7 @@ config PINMUX_XEC_GPIO140_176_NAME
|
|||
config PINMUX_XEC_GPIO200_236
|
||||
bool "Pinmux 200-236"
|
||||
help
|
||||
Enable Port 200-236 or what would be equivalent to Port D
|
||||
Enable Port 200-236 or what would be equivalent to Port D
|
||||
|
||||
config PINMUX_XEC_GPIO200_236_NAME
|
||||
string "Pinmux Port 200_236 driver name"
|
||||
|
|
@ -66,7 +66,7 @@ config PINMUX_XEC_GPIO200_236_NAME
|
|||
config PINMUX_XEC_GPIO240_276
|
||||
bool "Pinmux 240-276"
|
||||
help
|
||||
Enable Port 240-276 or what would be equivalent to Port E
|
||||
Enable Port 240-276 or what would be equivalent to Port E
|
||||
|
||||
config PINMUX_XEC_GPIO240_276_NAME
|
||||
string "Pinmux Port 200_276 driver name"
|
||||
|
|
@ -74,4 +74,3 @@ config PINMUX_XEC_GPIO240_276_NAME
|
|||
default "port200_276"
|
||||
|
||||
endif # PINMUX_XEC
|
||||
|
||||
|
|
|
|||
|
|
@ -27,4 +27,4 @@ config PS2_INIT_PRIORITY
|
|||
There isn't any critical component relying on this priority at
|
||||
the moment.
|
||||
|
||||
endif #PS2
|
||||
endif # PS2
|
||||
|
|
|
|||
|
|
@ -16,11 +16,11 @@ if PS2_XEC
|
|||
config PS2_XEC_0
|
||||
bool "PS2_XEC_0"
|
||||
help
|
||||
Enable PS2 0.
|
||||
Enable PS2 0.
|
||||
|
||||
config PS2_XEC_1
|
||||
bool "PS2_XEC_1"
|
||||
help
|
||||
Enable PS2 1.
|
||||
Enable PS2 1.
|
||||
|
||||
endif #PS2_XEC
|
||||
endif # PS2_XEC
|
||||
|
|
|
|||
|
|
@ -69,4 +69,4 @@ config ADT7420_THREAD_STACK_SIZE
|
|||
help
|
||||
Stack size of thread used by the driver to handle interrupts.
|
||||
|
||||
endif #ADT7420
|
||||
endif # ADT7420
|
||||
|
|
|
|||
|
|
@ -220,4 +220,4 @@ config ADXL372_THREAD_STACK_SIZE
|
|||
help
|
||||
Stack size of thread used by the driver to handle interrupts.
|
||||
|
||||
endif #ADXL372
|
||||
endif # ADXL372
|
||||
|
|
|
|||
|
|
@ -52,4 +52,4 @@ config AMG88XX_THREAD_STACK_SIZE
|
|||
help
|
||||
Stack size of thread used by the driver to handle interrupts.
|
||||
|
||||
endif #if AMG88XX
|
||||
endif # AMG88XX
|
||||
|
|
|
|||
|
|
@ -18,6 +18,6 @@ config IAQ_CORE_MAX_READ_RETRIES
|
|||
int "Number of read retries"
|
||||
default 4
|
||||
help
|
||||
Number of retries when reading failed or device not ready.
|
||||
Number of retries when reading failed or device not ready.
|
||||
|
||||
endif # AMS_IAQ_CORE
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ menuconfig BME280
|
|||
depends on I2C || SPI
|
||||
default n
|
||||
help
|
||||
Enable driver for BME280 I2C-based or SPI-based temperature and pressure sensor.
|
||||
Enable driver for BME280 I2C-based or SPI-based temperature and pressure sensor.
|
||||
|
||||
if BME280
|
||||
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ menuconfig BME680
|
|||
bool "BME680 sensor"
|
||||
depends on I2C
|
||||
help
|
||||
Enable driver for BME680 I2C-based based temperature, pressure, humidity and gas sensor.
|
||||
Enable driver for BME680 I2C-based based temperature, pressure, humidity and gas sensor.
|
||||
|
||||
if BME680
|
||||
|
||||
|
|
|
|||
|
|
@ -17,19 +17,19 @@ config ENS210_CRC_CHECK
|
|||
bool "Enable CRC Check"
|
||||
default y
|
||||
help
|
||||
Check the crc value after data reading.
|
||||
Check the crc value after data reading.
|
||||
|
||||
config ENS210_MAX_STAT_RETRIES
|
||||
int "Number of status read retries"
|
||||
default 4
|
||||
help
|
||||
Number of retries when status reading failed or device not ready.
|
||||
Number of retries when status reading failed or device not ready.
|
||||
|
||||
config ENS210_MAX_READ_RETRIES
|
||||
int "Number of value reading retries"
|
||||
default 4
|
||||
help
|
||||
Number of retries when value reading failed, value not valid
|
||||
or crc not ok.
|
||||
Number of retries when value reading failed, value not valid
|
||||
or crc not ok.
|
||||
|
||||
endif # ENS210
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@ config LSM6DSL_EXT0_LPS22HB
|
|||
|
||||
endchoice
|
||||
|
||||
endif #LSM6DSL_SENSORHUB
|
||||
endif # LSM6DSL_SENSORHUB
|
||||
|
||||
menu "Attributes"
|
||||
|
||||
|
|
|
|||
|
|
@ -98,7 +98,7 @@ config LSM6DSO_EXT_HTS221
|
|||
config LSM6DSO_EXT_LPS22HB
|
||||
bool "Enable LPS22HB as external sensor"
|
||||
|
||||
endif #LSM6DSO_SENSORHUB
|
||||
endif # LSM6DSO_SENSORHUB
|
||||
|
||||
menu "Attributes"
|
||||
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@ menuconfig MCP9808
|
|||
bool "MCP9808 temperature sensor"
|
||||
depends on I2C
|
||||
help
|
||||
Enable driver for MCP9808 temperature sensor.
|
||||
Enable driver for MCP9808 temperature sensor.
|
||||
|
||||
if MCP9808
|
||||
|
||||
|
|
@ -18,19 +18,18 @@ config MCP9808_DEV_NAME
|
|||
string "MCP9808 device name"
|
||||
default "MCP9808"
|
||||
|
||||
|
||||
config MCP9808_I2C_ADDR
|
||||
hex "MCP9808 I2C slave address"
|
||||
default 0x18
|
||||
help
|
||||
Specify the I2C slave address for the MCP9808.
|
||||
Specify the I2C slave address for the MCP9808.
|
||||
|
||||
config MCP9808_I2C_DEV_NAME
|
||||
string "I2C master where MCP9808 is connected"
|
||||
default "I2C_0"
|
||||
help
|
||||
Specify the device name of the I2C master device to which MCP9808 is
|
||||
connected.
|
||||
Specify the device name of the I2C master device to which MCP9808 is
|
||||
connected.
|
||||
|
||||
choice
|
||||
prompt "MCP9808 trigger mode"
|
||||
|
|
|
|||
|
|
@ -10,4 +10,4 @@ config MS5837
|
|||
bool "MS5837 pressure and temperature sensor"
|
||||
depends on I2C && HAS_DTS_I2C
|
||||
help
|
||||
Enable driver for MS5837 pressure and temperature sensor.
|
||||
Enable driver for MS5837 pressure and temperature sensor.
|
||||
|
|
|
|||
|
|
@ -39,7 +39,7 @@ module-str = spi
|
|||
source "subsys/logging/Kconfig.template.log_config"
|
||||
|
||||
|
||||
config SPI_0
|
||||
config SPI_0
|
||||
bool "SPI port 0"
|
||||
help
|
||||
Enable SPI controller port 0.
|
||||
|
|
|
|||
|
|
@ -97,7 +97,7 @@ config TSC_CYCLES_PER_SEC
|
|||
value of CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC will be used instead;
|
||||
many MCUs these values are the same.
|
||||
|
||||
endif #LOAPIC_TIMER
|
||||
endif # LOAPIC_TIMER
|
||||
|
||||
menuconfig ARCV2_TIMER
|
||||
bool "ARC Timer"
|
||||
|
|
|
|||
|
|
@ -23,31 +23,31 @@ config WIFI_SIMPLELINK_MAX_PACKET_SIZE
|
|||
# MTU (ipv4) per: http://www.ti.com/lit/ug/swru455d/swru455d.pdf:
|
||||
default 1472
|
||||
help
|
||||
Set the maximum size of a network packet going through the chip.
|
||||
This sets the size of each buffer, in each buffer pool.
|
||||
Do not modify it unless you know what you are doing.
|
||||
Set the maximum size of a network packet going through the chip.
|
||||
This sets the size of each buffer, in each buffer pool.
|
||||
Do not modify it unless you know what you are doing.
|
||||
|
||||
config WIFI_SIMPLELINK_SCAN_COUNT
|
||||
int "Number of entries in network scan table: Max: 30"
|
||||
default 20
|
||||
help
|
||||
The number of results to request on a Wi-Fi scan operation.
|
||||
Actual number returned may be less. Maximum is 30.
|
||||
The number of results to request on a Wi-Fi scan operation.
|
||||
Actual number returned may be less. Maximum is 30.
|
||||
|
||||
config WIFI_SIMPLELINK_MAX_SCAN_RETRIES
|
||||
int "Number of retries to get network scan table"
|
||||
default 10
|
||||
help
|
||||
The number of times, separated by a one second interval, to retry
|
||||
a request for the network list.
|
||||
The number of times, separated by a one second interval, to retry
|
||||
a request for the network list.
|
||||
|
||||
config WIFI_SIMPLELINK_FAST_CONNECT_TIMEOUT
|
||||
int "Time (in seconds) to wait for fast connect on startup"
|
||||
default 7
|
||||
help
|
||||
SimpleLink uses the "FastConnect" feature to reconnect to the
|
||||
previously connected AP on startup. Should the Wi-Fi connection
|
||||
timeout, the SimpleLink driver will fail to initialize,
|
||||
and LOG an error.
|
||||
SimpleLink uses the "FastConnect" feature to reconnect to the
|
||||
previously connected AP on startup. Should the Wi-Fi connection
|
||||
timeout, the SimpleLink driver will fail to initialize,
|
||||
and LOG an error.
|
||||
|
||||
endif # WIFI_SIMPLELINK
|
||||
|
|
|
|||
|
|
@ -43,23 +43,23 @@ config WIFI_WINC1500_BUF_CTR
|
|||
int "Number of buffer per-buffer pool"
|
||||
default 1
|
||||
help
|
||||
Set the number of buffer the driver will have access to in each of
|
||||
its buffer pools.
|
||||
Set the number of buffer the driver will have access to in each of
|
||||
its buffer pools.
|
||||
|
||||
config WIFI_WINC1500_MAX_PACKET_SIZE
|
||||
int "Maximum size of a packet, in bytes"
|
||||
default 1500
|
||||
help
|
||||
Set the maximum size of a network packet going through the chip.
|
||||
This sets the size of each buffer, in each buffer pools.
|
||||
Do not modify it unless you know what you are doing.
|
||||
Set the maximum size of a network packet going through the chip.
|
||||
This sets the size of each buffer, in each buffer pools.
|
||||
Do not modify it unless you know what you are doing.
|
||||
|
||||
config WIFI_WINC1500_OFFLOAD_MAX_SOCKETS
|
||||
int "Maximum number of sockets that can be managed"
|
||||
default 2
|
||||
help
|
||||
Set the number of sockets that can be managed through the driver
|
||||
and the chip.
|
||||
Set the number of sockets that can be managed through the driver
|
||||
and the chip.
|
||||
|
||||
choice
|
||||
bool "In which region is the chip running?"
|
||||
|
|
|
|||
|
|
@ -100,22 +100,22 @@ config NUM_METAIRQ_PRIORITIES
|
|||
int "Number of very-high priority 'preemptor' threads"
|
||||
default 0
|
||||
help
|
||||
This defines a set of priorities at the (numerically) lowest
|
||||
end of the range which have "meta-irq" behavior. Runnable
|
||||
threads at these priorities will always be scheduled before
|
||||
threads at lower priorities, EVEN IF those threads are
|
||||
otherwise cooperative and/or have taken a scheduler lock.
|
||||
Making such a thread runnable in any way thus has the effect
|
||||
of "interrupting" the current task and running the meta-irq
|
||||
thread synchronously, like an exception or system call. The
|
||||
intent is to use these priorities to implement "interrupt
|
||||
bottom half" or "tasklet" behavior, allowing driver
|
||||
subsystems to return from interrupt context but be guaranteed
|
||||
that user code will not be executed (on the current CPU)
|
||||
until the remaining work is finished. As this breaks the
|
||||
"promise" of non-preemptibility granted by the current API
|
||||
for cooperative threads, this tool probably shouldn't be used
|
||||
from application code.
|
||||
This defines a set of priorities at the (numerically) lowest
|
||||
end of the range which have "meta-irq" behavior. Runnable
|
||||
threads at these priorities will always be scheduled before
|
||||
threads at lower priorities, EVEN IF those threads are
|
||||
otherwise cooperative and/or have taken a scheduler lock.
|
||||
Making such a thread runnable in any way thus has the effect
|
||||
of "interrupting" the current task and running the meta-irq
|
||||
thread synchronously, like an exception or system call. The
|
||||
intent is to use these priorities to implement "interrupt
|
||||
bottom half" or "tasklet" behavior, allowing driver
|
||||
subsystems to return from interrupt context but be guaranteed
|
||||
that user code will not be executed (on the current CPU)
|
||||
until the remaining work is finished. As this breaks the
|
||||
"promise" of non-preemptibility granted by the current API
|
||||
for cooperative threads, this tool probably shouldn't be used
|
||||
from application code.
|
||||
|
||||
config SCHED_DEADLINE
|
||||
bool "Enable earliest-deadline-first scheduling"
|
||||
|
|
|
|||
|
|
@ -314,7 +314,7 @@ config LVGL_OBJ_LIST_FOCUS_TIME
|
|||
int "List focus time"
|
||||
default 100
|
||||
help
|
||||
List focus animation time in milliseconds
|
||||
List focus animation time in milliseconds
|
||||
|
||||
endif
|
||||
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
#
|
||||
|
||||
config POSIX_MAX_FDS
|
||||
config POSIX_MAX_FDS
|
||||
int "Maximum number of open file descriptors"
|
||||
default 16 if POSIX_API
|
||||
default 4
|
||||
|
|
@ -65,20 +65,20 @@ config POSIX_MQUEUE
|
|||
This enabled POSIX message queue related APIs.
|
||||
|
||||
if POSIX_MQUEUE
|
||||
config MSG_COUNT_MAX
|
||||
config MSG_COUNT_MAX
|
||||
int "Maximum number of messages in message queue"
|
||||
default 16
|
||||
help
|
||||
Mention maximum number of messages in message queue in POSIX compliant
|
||||
application.
|
||||
|
||||
config MSG_SIZE_MAX
|
||||
config MSG_SIZE_MAX
|
||||
int "Maximum size of a message"
|
||||
default 16
|
||||
help
|
||||
Mention maximum size of message in bytes.
|
||||
|
||||
config MQUEUE_NAMELEN_MAX
|
||||
config MQUEUE_NAMELEN_MAX
|
||||
int "Maximum size of a name length"
|
||||
default 16
|
||||
range 2 255
|
||||
|
|
@ -95,7 +95,7 @@ config POSIX_FS
|
|||
This enables POSIX style file system related APIs.
|
||||
|
||||
if POSIX_FS
|
||||
config POSIX_MAX_OPEN_FILES
|
||||
config POSIX_MAX_OPEN_FILES
|
||||
int "Maximum number of open file descriptors"
|
||||
default 16
|
||||
help
|
||||
|
|
@ -109,9 +109,9 @@ if POSIX_API
|
|||
# The name of this option is mandated by zephyr_interface_library_named
|
||||
# cmake directive.
|
||||
config APP_LINK_WITH_POSIX_SUBSYS
|
||||
bool "Make POSIX headers available to application"
|
||||
default y
|
||||
help
|
||||
Add POSIX subsystem header files to the 'app' include path.
|
||||
bool "Make POSIX headers available to application"
|
||||
default y
|
||||
help
|
||||
Add POSIX subsystem header files to the 'app' include path.
|
||||
|
||||
endif # POSIX_API
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
# Copyright (c) 2017 STMicroelectronics
|
||||
|
||||
config HAS_STLIB
|
||||
bool
|
||||
bool
|
||||
|
||||
config HAS_STMEMSC
|
||||
bool
|
||||
|
|
|
|||
|
|
@ -4,9 +4,9 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
config HAS_STM32CUBE
|
||||
bool
|
||||
select HAS_CMSIS_CORE
|
||||
depends on SOC_FAMILY_STM32
|
||||
bool
|
||||
select HAS_CMSIS_CORE
|
||||
depends on SOC_FAMILY_STM32
|
||||
|
||||
if HAS_STM32CUBE
|
||||
|
||||
|
|
|
|||
|
|
@ -7,8 +7,8 @@
|
|||
if SOC_ARC_EMSDP
|
||||
|
||||
choice
|
||||
prompt "ARC EM Software Development Platform Core Selection"
|
||||
default SOC_EMSDP_EM11D
|
||||
prompt "ARC EM Software Development Platform Core Selection"
|
||||
default SOC_EMSDP_EM11D
|
||||
|
||||
config SOC_EMSDP_EM4
|
||||
bool "Synopsys ARC EM4 of EMSDP"
|
||||
|
|
@ -46,4 +46,4 @@ config SOC_EMSDP_EM11D
|
|||
|
||||
endchoice
|
||||
|
||||
endif #SOC_ARC_EMSDP
|
||||
endif # SOC_ARC_EMSDP
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue