soc: npcx7: add comments for macro funcs used for device tree files.
This CL adds more comments for each macro functions used for device tree file for better explanations. It also changes all hex values in soc.c to lower case. Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This commit is contained in:
parent
e42a3a5a96
commit
99c208f36a
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@ -808,7 +808,7 @@ static const struct npcx_alt espi_alts[] = DT_NPCX_ALT_ITEMS_LIST(0);
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static const struct espi_npcx_config espi_npcx_config = {
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.base = DT_INST_REG_ADDR(0),
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.espi_rst_wui = DT_NPCX_ESPI_WUI_ITEM(espi_rst_wui),
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.espi_rst_wui = DT_NPCX_WUI_ITEM_BY_NAME(0, espi_rst_wui),
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.clk_cfg = DT_NPCX_CLK_CFG_ITEM(0),
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.alts_size = ARRAY_SIZE(espi_alts),
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.alts_list = espi_alts,
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@ -157,7 +157,7 @@ struct host_sub_npcx_config host_sub_cfg = {
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.inst_kbc = (struct kbc_reg *)DT_INST_REG_ADDR_BY_NAME(0, kbc),
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.inst_pm_acpi = (struct pmch_reg *)DT_INST_REG_ADDR_BY_NAME(0, pm_acpi),
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.inst_pm_hcmd = (struct pmch_reg *)DT_INST_REG_ADDR_BY_NAME(0, pm_hcmd),
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.host_acc_wui = DT_NPCX_ESPI_WUI_ITEM(host_acc_wui),
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.host_acc_wui = DT_NPCX_WUI_ITEM_BY_NAME(0, host_acc_wui),
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.clks_size = ARRAY_SIZE(host_dev_clk_cfg),
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.clks_list = host_dev_clk_cfg,
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};
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@ -23,7 +23,7 @@ struct uart_npcx_config {
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/* clock configuration */
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struct npcx_clk_cfg clk_cfg;
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/* int-mux configuration */
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const struct npcx_wui wui_map;
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const struct npcx_wui uart_rx_wui;
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/* pinmux configuration */
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const uint8_t alts_size;
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const struct npcx_alt *alts_list;
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@ -343,11 +343,11 @@ static int uart_npcx_init(const struct device *dev)
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* Configure the UART wake-up event triggered from a falling edge
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* on CR_SIN pin. No need for callback function.
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*/
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soc_miwu_interrupt_configure(&config->wui_map,
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soc_miwu_interrupt_configure(&config->uart_rx_wui,
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NPCX_MIWU_MODE_EDGE, NPCX_MIWU_TRIG_LOW);
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/* Enable irq of interrupt-input module */
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soc_miwu_irq_enable(&config->wui_map);
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soc_miwu_irq_enable(&config->uart_rx_wui);
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#endif
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@ -390,6 +390,7 @@ static int uart_npcx_init(const struct device *dev)
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NPCX_UART_IRQ_CONFIG_FUNC_INIT(inst) \
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}, \
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.clk_cfg = DT_NPCX_CLK_CFG_ITEM(inst), \
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.uart_rx_wui = DT_NPCX_WUI_ITEM_BY_NAME(0, uart_rx), \
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.alts_size = ARRAY_SIZE(uart_alts##inst), \
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.alts_list = uart_alts##inst, \
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}; \
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@ -75,7 +75,7 @@
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interrupts = <33 0>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL1 4>;
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pinctrl = <&alta_uart1_sl1>; /* PIN10.11 */
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wui_map = <&wui_cr_sin1>;
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uart_rx = <&wui_cr_sin1>;
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status = "disabled";
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label = "UART_1";
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};
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@ -86,7 +86,7 @@
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interrupts = <32 0>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL7 6>;
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pinctrl = <&alta_uart2_sl>; /* PIN75.86 */
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wui_map = <&wui_cr_sin2>;
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uart_rx = <&wui_cr_sin2>;
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status = "disabled";
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label = "UART_2";
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};
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@ -16,14 +16,14 @@ properties:
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type: phandles
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required: true
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description: configurations of pinmux controllers
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wui_map:
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uart_rx:
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type: phandle
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required: true
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description: mapping item between wui and source device
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description: mapping item between wui and uart rx START signal
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description: |
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Mapping table between Wake-Up Input (WUI) and its source device.
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Mapping table between Wake-Up Input (WUI) and uart rx START signal.
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For example the WUI mapping on NPCX7 UART1 would be
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wui_map = <&wui_cr_sin1>;
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uart_rx = <&wui_cr_sin1>;
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required: true
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@ -7,9 +7,23 @@
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#ifndef _NUVOTON_NPCX_SOC_DT_H_
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#define _NUVOTON_NPCX_SOC_DT_H_
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/*
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* Construct a npcx_clk_cfg item from clocks prop which type is 'phandle-array'
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* to handle "clock-cells" in current driver device
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/**
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* @brief Construct a npcx_clk_cfg item from first item in 'clocks' prop which
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* type is 'phandle-array' to handle "clock-cells" in current driver.
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*
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* Example devicetree fragment:
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* / {
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* uart1: serial@400c4000 {
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* clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL1 4>;
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* ...
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* };
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* };
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*
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* Example usage: *
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* const struct npcx_clk_cfg clk_cfg = DT_NPCX_CLK_CFG_ITEM(inst);
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @return npcx_clk_cfg item.
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*/
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#define DT_NPCX_CLK_CFG_ITEM(inst) \
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{ \
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@ -18,7 +32,13 @@
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.bit = DT_PHA(DT_DRV_INST(inst), clocks, bit), \
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}
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/* Construct a npcx_clk_cfg structure from clocks property at index 'i' */
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/**
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* @brief Construct a npcx_clk_cfg structure from 'clocks' property at index 'i'
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @param i index of clocks prop which type is 'phandle-array'
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* @return npcx_clk_cfg item from 'clocks' property at index 'i'
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*/
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#define DT_NPCX_CLK_CFG_ITEM_BY_IDX(inst, i) \
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{ \
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.bus = DT_CLOCKS_CELL_BY_IDX(DT_DRV_INST(inst), i, bus), \
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@ -26,24 +46,68 @@
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.bit = DT_CLOCKS_CELL_BY_IDX(DT_DRV_INST(inst), i, bit), \
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},
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/* Length of npcx_clk_cfg structures in clocks property */
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/**
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* @brief Length of 'clocks' property which type is 'phandle-array'
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @return length of 'clocks' property which type is 'phandle-array'
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*/
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#define DT_NPCX_CLK_CFG_ITEMS_LEN(inst) DT_INST_PROP_LEN(inst, clocks)
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/* Macro function to construct a list of npcx_clk_cfg items by UTIL_LISTIFY */
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#define DT_NPCX_CLK_CFG_ITEMS_FUC(idx, inst) \
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DT_NPCX_CLK_CFG_ITEM_BY_IDX(inst, idx)
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/**
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* @brief Macro function to construct npcx_clk_cfg item in UTIL_LISTIFY
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* extension.
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*
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* @param child child index in UTIL_LISTIFY extension.
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @return macro function to construct a npcx_clk_cfg structure.
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*/
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#define DT_NPCX_CLK_CFG_ITEMS_FUC(child, inst) \
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DT_NPCX_CLK_CFG_ITEM_BY_IDX(inst, child)
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/**
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* @brief Macro function to construct a list of npcx_clk_cfg items by
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* UTIL_LISTIFY func
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*
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* Example devicetree fragment:
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* / {
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* host_sub: lpc@400c1000 {
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* clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 3>,
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* <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 4>,
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* <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 5>,
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* <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 6>,
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* <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 7>;
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* ...
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* };
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* Example usage: *
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* const struct npcx_clk_cfg clk_cfg[] = DT_NPCX_CLK_CFG_ITEMS_LIST(0);
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @return an array of npcx_clk_cfg items.
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*/
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#define DT_NPCX_CLK_CFG_ITEMS_LIST(inst) { \
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UTIL_LISTIFY(DT_NPCX_CLK_CFG_ITEMS_LEN(inst), \
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DT_NPCX_CLK_CFG_ITEMS_FUC, \
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inst) \
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}
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/* Get phandle from "pinctrl" prop which type is 'phandles' at index 'i' */
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/**
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* @brief Get phandle from 'pinctrl' prop which type is 'phandles' at index 'i'
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @param i index of pinctrl prop which type is 'phandles'
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* @return phandle from 'pinctrl' prop at index 'i'
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*/
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#define DT_PHANDLE_FROM_PINCTRL(inst, i) \
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DT_INST_PHANDLE_BY_IDX(inst, pinctrl, i)
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/* Construct a npcx_alt structure from pinctrl property at index 'i' */
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/**
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* @brief Construct a npcx_alt structure from 'pinctrl' property at index 'i'
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @param i index of pinctrl prop which type is 'phandles'
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* @return npcx_alt item from 'pinctrl' property at index 'i'
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*/
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#define DT_NPCX_ALT_ITEM_BY_IDX(inst, i) \
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{ \
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.group = DT_PHA(DT_PHANDLE_FROM_PINCTRL(inst, i), alts, group), \
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@ -51,36 +115,98 @@
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.inverted = DT_PHA(DT_PHANDLE_FROM_PINCTRL(inst, i), alts, inv), \
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},
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/* Length of npcx_alt structures in pinctrl property */
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/**
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* @brief Length of npcx_alt structures in 'pinctrl' property
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @return length of 'pinctrl' property which type is 'phandles'
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*/
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#define DT_NPCX_ALT_ITEMS_LEN(inst) DT_INST_PROP_LEN(inst, pinctrl)
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/* Macro function to construct a list of npcx_alt items by UTIL_LISTIFY */
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#define DT_NPCX_ALT_ITEMS_FUC(idx, inst) DT_NPCX_ALT_ITEM_BY_IDX(inst, idx)
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/**
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* @brief Macro function to construct npcx_alt item in UTIL_LISTIFY extension.
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*
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* @param child child index in UTIL_LISTIFY extension.
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @return macro function to construct a npcx_alt structure.
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*/
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#define DT_NPCX_ALT_ITEMS_FUC(child, inst) DT_NPCX_ALT_ITEM_BY_IDX(inst, child)
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/**
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* @brief Macro function to construct a list of npcx_alt items by UTIL_LISTIFY
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* func
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*
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* Example devicetree fragment:
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* / {
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* uart1: serial@400c4000 {
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* pinctrl = <&alta_uart1_sl1>;
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* ...
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* };
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*
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* host_sub: lpc@400c1000 {
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* pinctrl = <&altb_rxd_sl &altb_txd_sl
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* &altb_rts_sl &altb_cts_sl
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* &altb_ri_sl &altb_dtr_bout_sl
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* &altb_dcd_sl &altb_dsr_sl>;
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* ...
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* };
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* };
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*
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* Example usage: *
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* const struct npcx_alt uart_alts[] = DT_NPCX_ALT_ITEMS_LIST(inst);
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* const struct npcx_alt host_uart_alts[] = DT_NPCX_ALT_ITEMS_LIST(inst);
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @return an array of npcx_alt items.
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*/
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#define DT_NPCX_ALT_ITEMS_LIST(inst) { \
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UTIL_LISTIFY(DT_NPCX_ALT_ITEMS_LEN(inst), \
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DT_NPCX_ALT_ITEMS_FUC, \
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inst) \
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}
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/* Get phandle from "wui_map" prop */
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#define DT_PHANDLE_FROM_WUI_MAP(inst) \
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DT_INST_PHANDLE(inst, wui_map)
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/**
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* @brief Get phandle from "name" property which contains wui information.
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @param name property 'name' which type is 'phandle' and contains wui info.
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* @return phandle from 'name' property.
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*/
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#define DT_PHANDLE_FROM_WUI_NAME(inst, name) \
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DT_INST_PHANDLE(inst, name)
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/* Construct a npcx_wui structure from wui_map property */
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#define DT_NPCX_WUI_ITEM(inst) \
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/**
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* @brief Construct a npcx_wui structure from 'name' property
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @param name property 'name'which type is 'phandle' and contains wui info.
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* @return npcx_wui item from 'name' property.
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*/
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#define DT_NPCX_WUI_ITEM_BY_NAME(inst, name) \
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{ \
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.table = DT_PROP(DT_PHANDLE(DT_PHANDLE_FROM_WUI_MAP(inst), \
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.table = DT_PROP(DT_PHANDLE(DT_PHANDLE_FROM_WUI_NAME(inst, name), \
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miwus), index), \
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.group = DT_PHA(DT_PHANDLE_FROM_WUI_MAP(inst), miwus, group), \
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.bit = DT_PHA(DT_PHANDLE_FROM_WUI_MAP(inst), miwus, bit), \
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},
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.group = DT_PHA(DT_PHANDLE_FROM_WUI_NAME(inst, name), miwus, group), \
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.bit = DT_PHA(DT_PHANDLE_FROM_WUI_NAME(inst, name), miwus, bit), \
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}
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/* Get phandle from "wui_maps" prop which type is 'phandles' at index 'i' */
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/**
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* @brief Get phandle from 'wui_maps' prop which type is 'phandles' at index 'i'
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @param i index of 'wui_maps' prop which type is 'phandles'
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* @return phandle from 'wui_maps' prop at index 'i'
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*/
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#define DT_PHANDLE_FROM_WUI_MAPS(inst, i) \
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DT_INST_PHANDLE_BY_IDX(inst, wui_maps, i)
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/* Construct a npcx_wui structure from wui_maps property at index 'i' */
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/**
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* @brief Construct a npcx_wui structure from wui_maps property at index 'i'
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @param i index of 'wui_maps' prop which type is 'phandles'
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* @return npcx_wui item at index 'i'
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*/
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#define DT_NPCX_WUI_ITEM_BY_IDX(inst, i) \
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{ \
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.table = DT_PROP(DT_PHANDLE(DT_PHANDLE_FROM_WUI_MAPS(inst, i), \
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@ -89,27 +215,80 @@
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.bit = DT_PHA(DT_PHANDLE_FROM_WUI_MAPS(inst, i), miwus, bit), \
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},
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/* Length of npcx_wui structures in pinctrl property */
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/**
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* @brief Length of npcx_wui structures in 'wui_maps' property
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @return length of 'wui_maps' prop which type is 'phandles'
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*/
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#define DT_NPCX_WUI_ITEMS_LEN(inst) DT_INST_PROP_LEN(inst, wui_maps)
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/* Macro function to construct a list of npcx_wui items by UTIL_LISTIFY */
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#define DT_NPCX_WUI_ITEMS_FUC(idx, inst) DT_NPCX_WUI_ITEM_BY_IDX(inst, idx)
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/**
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* @brief Macro function to construct a list of npcx_wui items by UTIL_LISTIFY
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*
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* @param child child index in UTIL_LISTIFY extension.
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @return macro function to construct a npcx_wui structure.
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*/
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#define DT_NPCX_WUI_ITEMS_FUC(child, inst) DT_NPCX_WUI_ITEM_BY_IDX(inst, child)
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/**
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* @brief Macro function to construct a list of npcx_wui items by UTIL_LISTIFY
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* func.
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*
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* Example devicetree fragment:
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* / {
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* uart1: serial@400c4000 {
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* uart_rx = <&wui_cr_sin1>;
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* ...
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* };
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*
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* gpio0: gpio@40081000 {
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* wui_maps = <&wui_io00 &wui_io01 &wui_io02 &wui_io03
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* &wui_io04 &wui_io05 &wui_io06 &wui_io07>;
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* ...
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* };
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* };
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*
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* Example usage: *
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* const struct npcx_wui wui_map = DT_PHANDLE_FROM_WUI_NAME(inst, uart_rx);
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* const struct npcx_wui wui_maps[] = DT_NPCX_WUI_ITEMS_LIST(inst);
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*
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* @param inst instance number for compatible defined in DT_DRV_COMPAT.
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* @return an array of npcx_wui items.
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*/
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#define DT_NPCX_WUI_ITEMS_LIST(inst) { \
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UTIL_LISTIFY(DT_NPCX_WUI_ITEMS_LEN(inst), \
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DT_NPCX_WUI_ITEMS_FUC, \
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inst) \
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}
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/* Get a node from path '/npcx_miwus_map/map_miwu(0/1/2)_groups' */
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/**
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* @brief Get a node from path '/npcx_miwus_map/map_miwu(0/1/2)_groups'
|
||||
*
|
||||
* @param i index of npcx miwu devices
|
||||
* @return node identifier with that path.
|
||||
*/
|
||||
#define DT_NODE_FROM_MIWU_MAP(i) DT_PATH(npcx7_miwus_int_map, \
|
||||
map_miwu##i##_groups)
|
||||
|
||||
/* Get the index prop from parent MIWU device node */
|
||||
/**
|
||||
* @brief Get the index prop from parent MIWU device node.
|
||||
*
|
||||
* @param child index in UTIL_LISTIFY extension.
|
||||
* @return 'index' prop value of the node which compatible type is
|
||||
* "nuvoton,npcx-miwu".
|
||||
*/
|
||||
#define DT_MIWU_IRQ_TABLE_IDX(child) \
|
||||
DT_PROP(DT_PHANDLE(DT_PARENT(child), parent), index)
|
||||
|
||||
/* Functiosn for DT_FOREACH_CHILD to generate a IRQ_CONNECT implementation */
|
||||
/**
|
||||
* @brief Macro function for DT_FOREACH_CHILD to generate a IRQ_CONNECT
|
||||
* implementation.
|
||||
*
|
||||
* @param child index in UTIL_LISTIFY extension.
|
||||
* @return implementation to initialize interrupts of MIWU groups and enable
|
||||
* them.
|
||||
*/
|
||||
#define DT_MIWU_IRQ_CONNECT_IMPL_CHILD_FUNC(child) \
|
||||
{ \
|
||||
IRQ_CONNECT(DT_PROP(child, irq), \
|
||||
|
@ -120,13 +299,29 @@
|
|||
irq_enable(DT_PROP(child, irq)); \
|
||||
}
|
||||
|
||||
/* Get a child node from path '/npcx7_espi_vws_map/name' */
|
||||
/**
|
||||
* @brief Get a child node from path '/npcx7_espi_vws_map/name'.
|
||||
*
|
||||
* @param name a path which name is /npcx7_espi_vws_map/'name'.
|
||||
* @return child node identifier with that path.
|
||||
*/
|
||||
#define DT_NODE_FROM_VWTABLE(name) DT_CHILD(DT_PATH(npcx7_espi_vws_map), name)
|
||||
|
||||
/* Get a handle from wui_map property of child node */
|
||||
/**
|
||||
* @brief Get phandle from wui_map property of child node with that path.
|
||||
*
|
||||
* @param name path which name is /npcx7_espi_vws_map/'name'.
|
||||
* @return phandle from "wui_map" prop of child node with that path.
|
||||
*/
|
||||
#define DT_PHANDLE_VW_WUI(name) DT_PHANDLE(DT_NODE_FROM_VWTABLE(name), wui_map)
|
||||
|
||||
/* Construct a npcx_wui structure from wui_map property of vw table by name */
|
||||
/**
|
||||
* @brief Construct a npcx_wui structure from wui_map property of a child node
|
||||
* with that path.
|
||||
*
|
||||
* @param name a path which name is /npcx7_espi_vws_map/'name'.
|
||||
* @return npcx_wui item with that path.
|
||||
*/
|
||||
#define DT_NPCX_VW_WUI_ITEM(name) \
|
||||
{ \
|
||||
.table = DT_PROP(DT_PHANDLE(DT_PHANDLE_VW_WUI(name), miwus), index),\
|
||||
|
@ -134,7 +329,14 @@
|
|||
.bit = DT_PHA(DT_PHANDLE_VW_WUI(name), miwus, bit), \
|
||||
}
|
||||
|
||||
/* Construct a npcx espi device configuration for vw input signal by name */
|
||||
/**
|
||||
* @brief Construct a npcx espi device configuration of vw input signal from
|
||||
* a child node with that path.
|
||||
*
|
||||
* @signal vw input signal name.
|
||||
* @param name a path which name is /npcx7_espi_vws_map/'name'.
|
||||
* @return npcx_vw_in_config item with that path.
|
||||
*/
|
||||
#define DT_NPCX_VW_IN_CONF(signal, name) \
|
||||
{ \
|
||||
.sig = signal, \
|
||||
|
@ -143,7 +345,14 @@
|
|||
.vw_wui = DT_NPCX_VW_WUI_ITEM(name), \
|
||||
}
|
||||
|
||||
/* Construct a npcx espi device configuration for vw output signal by name */
|
||||
/**
|
||||
* @brief Construct a npcx espi device configuration of vw output signal from
|
||||
* a child node with that path.
|
||||
*
|
||||
* @signal vw output signal name.
|
||||
* @param name a path which name is /npcx7_espi_vws_map/'name'.
|
||||
* @return npcx_vw_in_config item with that path.
|
||||
*/
|
||||
#define DT_NPCX_VW_OUT_CONF(signal, name) \
|
||||
{ \
|
||||
.sig = signal, \
|
||||
|
@ -151,17 +360,4 @@
|
|||
.bitmask = DT_PROP_BY_IDX(DT_NODE_FROM_VWTABLE(name), vw_reg, 1), \
|
||||
}
|
||||
|
||||
/* Get phandle from "name" prop */
|
||||
#define DT_PHANDLE_FROM_WUI_NAME(name) \
|
||||
DT_INST_PHANDLE(0, name)
|
||||
|
||||
/* Construct a npcx_wui structure from wui_map property */
|
||||
#define DT_NPCX_ESPI_WUI_ITEM(name) \
|
||||
{ \
|
||||
.table = DT_PROP(DT_PHANDLE(DT_PHANDLE_FROM_WUI_NAME(name), \
|
||||
miwus), index), \
|
||||
.group = DT_PHA(DT_PHANDLE_FROM_WUI_NAME(name), miwus, group), \
|
||||
.bit = DT_PHA(DT_PHANDLE_FROM_WUI_NAME(name), miwus, bit), \
|
||||
}
|
||||
|
||||
#endif /* _NUVOTON_NPCX_SOC_DT_H_ */
|
||||
|
|
|
@ -35,11 +35,11 @@ NPCX_REG_OFFSET_CHECK(pmc_reg, PWDWN_CTL7, 0x024);
|
|||
NPCX_REG_SIZE_CHECK(scfg_reg, 0x02F);
|
||||
NPCX_REG_OFFSET_CHECK(scfg_reg, DEV_CTL4, 0x006);
|
||||
NPCX_REG_OFFSET_CHECK(scfg_reg, DEVALT0, 0x010);
|
||||
NPCX_REG_OFFSET_CHECK(scfg_reg, LV_GPIO_CTL0, 0x02A);
|
||||
NPCX_REG_OFFSET_CHECK(scfg_reg, LV_GPIO_CTL0, 0x02a);
|
||||
|
||||
/* UART register structure check */
|
||||
NPCX_REG_SIZE_CHECK(uart_reg, 0x027);
|
||||
NPCX_REG_OFFSET_CHECK(uart_reg, UPSR, 0x00E);
|
||||
NPCX_REG_OFFSET_CHECK(uart_reg, UPSR, 0x00e);
|
||||
NPCX_REG_OFFSET_CHECK(uart_reg, UFTSTS, 0x020);
|
||||
NPCX_REG_OFFSET_CHECK(uart_reg, UFRCTL, 0x026);
|
||||
|
||||
|
@ -51,51 +51,51 @@ NPCX_REG_OFFSET_CHECK(gpio_reg, PLOCK_CTL, 0x007);
|
|||
NPCX_REG_SIZE_CHECK(espi_reg, 0x500);
|
||||
NPCX_REG_OFFSET_CHECK(espi_reg, FLASHCFG, 0x034);
|
||||
NPCX_REG_OFFSET_CHECK(espi_reg, VWEVMS, 0x140);
|
||||
NPCX_REG_OFFSET_CHECK(espi_reg, VWCTL, 0x2FC);
|
||||
NPCX_REG_OFFSET_CHECK(espi_reg, VWCTL, 0x2fc);
|
||||
NPCX_REG_OFFSET_CHECK(espi_reg, OOBTXBUF, 0x380);
|
||||
NPCX_REG_OFFSET_CHECK(espi_reg, OOBCTL_DIRECT, 0x3FC);
|
||||
NPCX_REG_OFFSET_CHECK(espi_reg, OOBCTL_DIRECT, 0x3fc);
|
||||
NPCX_REG_OFFSET_CHECK(espi_reg, FLASHTXBUF, 0x480);
|
||||
NPCX_REG_OFFSET_CHECK(espi_reg, FLASHCTL_DIRECT, 0x4FC);
|
||||
NPCX_REG_OFFSET_CHECK(espi_reg, FLASHCTL_DIRECT, 0x4fc);
|
||||
|
||||
/* MSWC register structure check */
|
||||
NPCX_REG_SIZE_CHECK(mswc_reg, 0x030);
|
||||
NPCX_REG_OFFSET_CHECK(mswc_reg, HCBAL, 0x008);
|
||||
NPCX_REG_OFFSET_CHECK(mswc_reg, HCBAH, 0x00A);
|
||||
NPCX_REG_OFFSET_CHECK(mswc_reg, SRID_CR, 0x01C);
|
||||
NPCX_REG_OFFSET_CHECK(mswc_reg, HCBAH, 0x00a);
|
||||
NPCX_REG_OFFSET_CHECK(mswc_reg, SRID_CR, 0x01c);
|
||||
NPCX_REG_OFFSET_CHECK(mswc_reg, SID_CR, 0x020);
|
||||
NPCX_REG_OFFSET_CHECK(mswc_reg, VW_SLPST1, 0x2E);
|
||||
NPCX_REG_OFFSET_CHECK(mswc_reg, VW_SLPST1, 0x02e);
|
||||
|
||||
/* SHM register structure check */
|
||||
NPCX_REG_SIZE_CHECK(shm_reg, 0x050);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, IMA_WIN_SIZE, 0x005);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, WIN_SIZE, 0x007);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, IMA_SEM, 0x00B);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, SHCFG, 0x00E);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, IMA_SEM, 0x00b);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, SHCFG, 0x00e);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, WIN1_WR_PROT, 0x010);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, IMA_WR_PROT, 0x016);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, WIN_BASE1, 0x020);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, WIN_BASE2, 0x024);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, RST_CFG, 0x03A);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, RST_CFG, 0x03a);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, DP80BUF, 0x040);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, DP80CTL, 0x044);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, HOFS_STS, 0x048);
|
||||
NPCX_REG_OFFSET_CHECK(shm_reg, COFS1, 0x04C);
|
||||
|
||||
/* KBC register structure check */
|
||||
NPCX_REG_SIZE_CHECK(kbc_reg, 0x00C);
|
||||
NPCX_REG_OFFSET_CHECK(kbc_reg, HIKMDI, 0x00A);
|
||||
NPCX_REG_OFFSET_CHECK(kbc_reg, SHIKMDI, 0x00B);
|
||||
NPCX_REG_SIZE_CHECK(kbc_reg, 0x00c);
|
||||
NPCX_REG_OFFSET_CHECK(kbc_reg, HIKMDI, 0x00a);
|
||||
NPCX_REG_OFFSET_CHECK(kbc_reg, SHIKMDI, 0x00b);
|
||||
|
||||
/* PMCH register structure check */
|
||||
NPCX_REG_SIZE_CHECK(pmch_reg, 0x012);
|
||||
NPCX_REG_OFFSET_CHECK(pmch_reg, HIPMDO, 0x002);
|
||||
NPCX_REG_OFFSET_CHECK(pmch_reg, HIPMDOC, 0x006);
|
||||
NPCX_REG_OFFSET_CHECK(pmch_reg, HIPMDOM, 0x008);
|
||||
NPCX_REG_OFFSET_CHECK(pmch_reg, HIPMDIC, 0x00A);
|
||||
NPCX_REG_OFFSET_CHECK(pmch_reg, HIPMDIC, 0x00a);
|
||||
NPCX_REG_OFFSET_CHECK(pmch_reg, HIPMIE, 0x010);
|
||||
|
||||
/* C2H register structure check */
|
||||
NPCX_REG_SIZE_CHECK(c2h_reg, 0x00C);
|
||||
NPCX_REG_SIZE_CHECK(c2h_reg, 0x00c);
|
||||
NPCX_REG_OFFSET_CHECK(c2h_reg, LKSIOHA, 0x004);
|
||||
NPCX_REG_OFFSET_CHECK(c2h_reg, CRSMAE, 0x008);
|
||||
NPCX_REG_OFFSET_CHECK(c2h_reg, SIBCTRL, 0x00A);
|
||||
NPCX_REG_OFFSET_CHECK(c2h_reg, SIBCTRL, 0x00a);
|
||||
|
|
Loading…
Reference in a new issue