drivers: clock_control: stm32: clock_control_on
Make clock_control_on for STM32 behave the same as the HAL, delaying after enabling peripheral clocks. Otherwise it may return before the clock is actually enabled, causing subsequent writes to peripheral registers to be silently ignored. Signed-off-by: Kevin ORourke <kevin.orourke@ferroamp.se>
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@ -200,6 +200,7 @@ static inline int stm32_clock_control_on(const struct device *dev,
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clock_control_subsys_t sub_system)
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{
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struct stm32_pclken *pclken = (struct stm32_pclken *)(sub_system);
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volatile int temp;
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ARG_UNUSED(dev);
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@ -210,6 +211,11 @@ static inline int stm32_clock_control_on(const struct device *dev,
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sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus,
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pclken->enr);
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/* Delay after enabling the clock, to allow it to become active.
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* See (for example) RM0440 7.2.17
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*/
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temp = sys_read32(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus);
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UNUSED(temp);
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return 0;
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}
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@ -145,6 +145,7 @@ static inline int stm32_clock_control_on(const struct device *dev,
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clock_control_subsys_t sub_system)
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{
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struct stm32_pclken *pclken = (struct stm32_pclken *)(sub_system);
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volatile int temp;
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ARG_UNUSED(dev);
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@ -155,6 +156,9 @@ static inline int stm32_clock_control_on(const struct device *dev,
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sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus,
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pclken->enr);
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/* Delay after enabling the clock, to allow it to become active */
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temp = sys_read32(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus);
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UNUSED(temp);
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return 0;
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}
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@ -360,6 +360,7 @@ static inline int stm32_clock_control_on(const struct device *dev,
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clock_control_subsys_t sub_system)
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{
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struct stm32_pclken *pclken = (struct stm32_pclken *)(sub_system);
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volatile int temp;
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ARG_UNUSED(dev);
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@ -371,6 +372,11 @@ static inline int stm32_clock_control_on(const struct device *dev,
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z_stm32_hsem_lock(CFG_HW_RCC_SEMID, HSEM_LOCK_DEFAULT_RETRY);
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sys_set_bits(STM32H7_BUS_CLK_REG + pclken->bus, pclken->enr);
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/* Delay after enabling the clock, to allow it to become active.
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* See RM0433 8.5.10 "Clock enabling delays"
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*/
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temp = sys_read32(STM32H7_BUS_CLK_REG + pclken->bus);
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UNUSED(temp);
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z_stm32_hsem_unlock(CFG_HW_RCC_SEMID);
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@ -149,6 +149,7 @@ static inline int stm32_clock_control_on(const struct device *dev,
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clock_control_subsys_t sub_system)
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{
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struct stm32_pclken *pclken = (struct stm32_pclken *)(sub_system);
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volatile int temp;
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ARG_UNUSED(dev);
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@ -159,6 +160,9 @@ static inline int stm32_clock_control_on(const struct device *dev,
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sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus,
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pclken->enr);
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/* Delay after enabling the clock, to allow it to become active */
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temp = sys_read32(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus);
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UNUSED(temp);
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return 0;
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}
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@ -62,6 +62,7 @@ static inline int stm32_clock_control_on(const struct device *dev,
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clock_control_subsys_t sub_system)
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{
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struct stm32_pclken *pclken = (struct stm32_pclken *)(sub_system);
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volatile int temp;
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ARG_UNUSED(dev);
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@ -72,6 +73,10 @@ static inline int stm32_clock_control_on(const struct device *dev,
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sys_set_bits(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus,
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pclken->enr);
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/* Delay after enabling the clock, to allow it to become active */
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temp = sys_read32(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus);
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UNUSED(temp);
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return 0;
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}
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