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intel_adsp: ace20_lnl: Change LNL core count to 5

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The ACE 2.0 LNL platform has 5 HIFI4 cores. Change number
of cores to enable 5th core on the platform.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
This commit is contained in:
Jaroslaw Stelter 2023-05-11 14:19:29 +02:00 committed by Anas Nashif
parent edaac6d8d2
commit 9c0dd7e3be
3 changed files with 10 additions and 3 deletions
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7
dts/xtensa/intel/intel_adsp_ace20_lnl.dtsi
View file

@ -42,6 +42,13 @@
cpu-power-states = <&d0i3 &d3>;
};
cpu4: cpu@4 {
device_type = "cpu";
compatible = "cdns,tensilica-xtensa-lx7";
reg = <4>;
cpu-power-states = <&d0i3 &d3>;
};
};
power-states {

4
kernel/Kconfig
View file

@ -874,7 +874,7 @@ config SMP_BOOT_DELAY
config MP_NUM_CPUS
int "Number of CPUs/cores"
default MP_MAX_NUM_CPUS
range 1 4
range 1 5
help
Number of multiprocessing-capable cores available to the
multicpu API and SMP features.
@ -882,7 +882,7 @@ config MP_NUM_CPUS
config MP_MAX_NUM_CPUS
int "Maximum number of CPUs/cores"
default 1
range 1 4
range 1 5
help
Maximum number of multiprocessing-capable cores available to the
multicpu API and SMP features.

2
soc/xtensa/intel_adsp/ace/Kconfig.defconfig.ace20_lnl
View file

@ -9,6 +9,6 @@ config SOC
default "intel_ace20_lnl"
config MP_MAX_NUM_CPUS
default 4
default 5
endif