drivers: stm32: SPI: cannot send several buffers if frame size is 16 bits
First `spi_context_buffers_setup` must use a `dfs` of 1 or 2 depending on the frame size. Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
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3003777810
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9eed160a06
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@ -270,12 +270,13 @@ static inline void spi_context_unlock_unconditionally(struct spi_context *ctx)
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static inline void *spi_context_get_next_buf(const struct spi_buf **current,
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size_t *count,
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size_t *buf_len)
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size_t *buf_len,
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uint8_t dfs)
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{
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/* This loop skips zero-length buffers in the set, if any. */
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while (*count) {
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if (((*current)->len) != 0) {
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*buf_len = (*current)->len;
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if (((*current)->len / dfs) != 0) {
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*buf_len = (*current)->len / dfs;
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return (*current)->buf;
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}
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++(*current);
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@ -298,13 +299,13 @@ void spi_context_buffers_setup(struct spi_context *ctx,
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ctx->tx_count = ctx->current_tx ? tx_bufs->count : 0;
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ctx->tx_buf = (const uint8_t *)
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spi_context_get_next_buf(&ctx->current_tx, &ctx->tx_count,
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&ctx->tx_len);
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&ctx->tx_len, dfs);
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ctx->current_rx = rx_bufs ? rx_bufs->buffers : NULL;
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ctx->rx_count = ctx->current_rx ? rx_bufs->count : 0;
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ctx->rx_buf = (uint8_t *)
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spi_context_get_next_buf(&ctx->current_rx, &ctx->rx_count,
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&ctx->rx_len);
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&ctx->rx_len, dfs);
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ctx->sync_status = 0;
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@ -340,7 +341,7 @@ void spi_context_update_tx(struct spi_context *ctx, uint8_t dfs, uint32_t len)
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ctx->tx_buf = (const uint8_t *)
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spi_context_get_next_buf(&ctx->current_tx,
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&ctx->tx_count,
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&ctx->tx_len);
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&ctx->tx_len, dfs);
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} else if (ctx->tx_buf) {
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ctx->tx_buf += dfs * len;
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}
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@ -387,7 +388,7 @@ void spi_context_update_rx(struct spi_context *ctx, uint8_t dfs, uint32_t len)
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ctx->rx_buf = (uint8_t *)
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spi_context_get_next_buf(&ctx->current_rx,
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&ctx->rx_count,
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&ctx->rx_len);
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&ctx->rx_len, dfs);
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} else if (ctx->rx_buf) {
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ctx->rx_buf += dfs * len;
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}
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@ -628,7 +628,11 @@ static int transceive(const struct device *dev,
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}
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/* Set buffers info */
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if (SPI_WORD_SIZE_GET(config->operation) == 8) {
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spi_context_buffers_setup(&data->ctx, tx_bufs, rx_bufs, 1);
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} else {
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spi_context_buffers_setup(&data->ctx, tx_bufs, rx_bufs, 2);
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}
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_spi_fifo)
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/* Flush RX buffer */
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@ -729,7 +733,11 @@ static int transceive_dma(const struct device *dev,
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}
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/* Set buffers info */
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if (SPI_WORD_SIZE_GET(config->operation) == 8) {
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spi_context_buffers_setup(&data->ctx, tx_bufs, rx_bufs, 1);
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} else {
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spi_context_buffers_setup(&data->ctx, tx_bufs, rx_bufs, 2);
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}
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
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/* set request before enabling (else SPI CFG1 reg is write protected) */
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