drivers: gpio: gpio_mcux_lpc: Use arbitrary amount of IRQ
Zephyr implementation is limited to 4 IRQ per GPIO bank when up to 8 is theoritically possible. It is now possible to use until 8 IRQ per GPIO bank. This can be achieved with minimal effort in a device tree overlay: &gpio0 { interrupts = <4 2>,<5 2>,<6 2>,<7 2>,<32 2>,<33 2>; }; &gpio1 { interrupts = <34 2>,<35 2>; }; Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
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@ -411,8 +411,9 @@ static const clock_ip_name_t gpio_clock_names[] = GPIO_CLOCKS;
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data->isr_list[data->isr_list_idx++] = DT_INST_IRQ_BY_IDX(n, m, irq); \
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} while (false)
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#define GPIO_MCUX_LPC_IRQ(n, m) \
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COND_CODE_1(DT_INST_IRQ_HAS_IDX(n, m), (GPIO_MCUX_LPC_IRQ_CONNECT(n, m)), ())
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#define GPIO_MCUX_LPC_IRQ(idx, inst) \
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COND_CODE_1(DT_INST_IRQ_HAS_IDX(inst, idx), \
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(GPIO_MCUX_LPC_IRQ_CONNECT(inst, idx)), ())
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#define GPIO_MCUX_LPC(n) \
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@ -441,10 +442,7 @@ static const clock_ip_name_t gpio_clock_names[] = GPIO_CLOCKS;
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{ \
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gpio_mcux_lpc_init(dev); \
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\
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GPIO_MCUX_LPC_IRQ(n, 0); \
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GPIO_MCUX_LPC_IRQ(n, 1); \
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GPIO_MCUX_LPC_IRQ(n, 2); \
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GPIO_MCUX_LPC_IRQ(n, 3); \
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LISTIFY(8, GPIO_MCUX_LPC_IRQ, (;), n) \
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\
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return 0; \
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}
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