From a1b77fd589dbe7284c17b029f251426a724abd47 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 27 May 2020 11:26:57 -0500 Subject: [PATCH] zephyr: replace zephyr integer types with C99 types git grep -l 'u\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g" git grep -l 's\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g" Signed-off-by: Kumar Gala --- arch/arc/core/arc_connect.c | 104 +- arch/arc/core/arc_smp.c | 4 +- arch/arc/core/cache.c | 12 +- arch/arc/core/fault.c | 34 +- arch/arc/core/irq_manage.c | 4 +- arch/arc/core/mpu/arc_core_mpu.c | 4 +- arch/arc/core/mpu/arc_mpu.c | 8 +- arch/arc/core/mpu/arc_mpu_v2_internal.h | 48 +- arch/arc/core/mpu/arc_mpu_v3_internal.h | 122 +-- arch/arc/core/secureshield/arc_sjli.c | 6 +- .../core/secureshield/secure_sys_services.c | 6 +- arch/arc/core/thread.c | 66 +- arch/arc/core/timestamp.c | 10 +- arch/arc/core/vector_table.c | 60 +- arch/arc/include/kernel_arch_data.h | 148 +-- arch/arc/include/kernel_arch_func.h | 4 +- arch/arc/include/v2/cache.h | 4 +- arch/arc/include/v2/irq.h | 2 +- arch/arm/core/aarch32/cortex_a_r/fault.c | 20 +- .../aarch32/cortex_m/cmse/arm_core_cmse.c | 34 +- arch/arm/core/aarch32/cortex_m/fault.c | 60 +- .../core/aarch32/cortex_m/mpu/arm_core_mpu.c | 46 +- .../aarch32/cortex_m/mpu/arm_core_mpu_dev.h | 14 +- arch/arm/core/aarch32/cortex_m/mpu/arm_mpu.c | 32 +- .../cortex_m/mpu/arm_mpu_v7_internal.h | 54 +- .../cortex_m/mpu/arm_mpu_v8_internal.h | 58 +- arch/arm/core/aarch32/cortex_m/mpu/nxp_mpu.c | 80 +- .../core/aarch32/cortex_m/tz/arm_core_tz.c | 24 +- arch/arm/core/aarch32/fatal.c | 10 +- arch/arm/core/aarch32/irq_manage.c | 10 +- arch/arm/core/aarch32/thread.c | 48 +- arch/arm/core/aarch64/arm_mmu.c | 74 +- arch/arm/core/aarch64/fatal.c | 6 +- arch/arm/core/aarch64/irq_manage.c | 4 +- arch/arm/core/aarch64/thread.c | 26 +- arch/arm/include/aarch32/cortex_m/cmse.h | 26 +- arch/arm/include/aarch32/cortex_m/stack.h | 4 +- arch/arm/include/aarch32/cortex_m/tz.h | 28 +- arch/arm/include/aarch32/kernel_arch_func.h | 4 +- arch/common/gen_isr_tables.py | 10 +- arch/common/isr_tables.c | 8 +- arch/common/sw_isr_common.c | 2 +- arch/common/timing_info_bench.c | 50 +- arch/nios2/core/cache.c | 12 +- arch/nios2/core/crt0.S | 2 +- arch/nios2/core/fatal.c | 4 +- arch/nios2/core/irq_manage.c | 10 +- arch/nios2/core/thread.c | 4 +- arch/nios2/include/kernel_arch_func.h | 2 +- arch/posix/core/irq.c | 2 +- arch/posix/core/swap.c | 2 +- arch/riscv/core/irq_manage.c | 2 +- arch/x86/core/acpi.c | 6 +- arch/x86/core/fatal.c | 6 +- arch/x86/core/ia32/excstub.S | 2 +- arch/x86/core/ia32/fatal.c | 18 +- arch/x86/core/ia32/float.c | 4 +- arch/x86/core/ia32/irq_manage.c | 10 +- arch/x86/core/ia32/thread.c | 14 +- arch/x86/core/ia32/userspace.S | 4 +- arch/x86/core/intel64/cpu.c | 46 +- arch/x86/core/intel64/irq.c | 4 +- arch/x86/core/multiboot.c | 10 +- arch/x86/core/pcie.c | 12 +- arch/x86/core/reboot_rst_cnt.c | 2 +- arch/x86/core/spec_ctrl.c | 10 +- arch/x86/core/userspace.c | 2 +- arch/x86/core/x86_mmu.c | 76 +- arch/x86/include/intel64/kernel_arch_data.h | 6 +- arch/x86/include/kernel_arch_func.h | 2 +- arch/xtensa/core/irq_manage.c | 6 +- arch/xtensa/core/xtensa-asm2.c | 6 +- boards/arc/em_starterkit/pmodmux.c | 2 +- boards/arm/lpcxpresso54114/pinmux.c | 14 +- boards/arm/lpcxpresso55s16/pinmux.c | 16 +- boards/arm/lpcxpresso55s69/pinmux.c | 10 +- boards/arm/mimxrt1050_evk/pinmux.c | 8 +- boards/arm/mimxrt1060_evk/pinmux.c | 8 +- boards/arm/mimxrt1064_evk/pinmux.c | 8 +- .../mm_swiftio/mmswiftio_flexspi_nor_config.h | 102 +- .../arm/mm_swiftio/mmswiftio_sdram_ini_dcd.c | 4 +- boards/arm/mm_swiftio/pinmux.c | 8 +- boards/arm/mps2_an385/pinmux.c | 6 +- boards/arm/mps2_an521/pinmux.c | 6 +- boards/arm/nrf9160dk_nrf52840/board.c | 14 +- boards/arm/qemu_cortex_m0/nrf_timer_timer.c | 28 +- boards/arm/thingy52_nrf52832/board.c | 2 +- boards/arm/v2m_beetle/pinmux.c | 4 +- boards/arm/v2m_musca/pinmux.c | 2 +- boards/arm/v2m_musca_b1/pinmux.c | 2 +- boards/posix/native_posix/board_irq.h | 2 +- boards/posix/native_posix/cmdline_common.c | 16 +- boards/posix/native_posix/hw_models_top.c | 20 +- boards/posix/native_posix/hw_models_top.h | 4 +- boards/posix/native_posix/irq_ctrl.c | 40 +- boards/posix/native_posix/native_rtc.c | 12 +- boards/posix/native_posix/native_rtc.h | 6 +- boards/posix/native_posix/sdl_events.c | 2 +- boards/posix/native_posix/timer_model.c | 66 +- boards/posix/native_posix/timer_model.h | 16 +- boards/posix/nrf52_bsim/board_irq.h | 2 +- boards/posix/nrf52_bsim/irq_handler.c | 2 +- boards/posix/nrf52_bsim/k_busy_wait.c | 2 +- boards/posix/nrf52_bsim/main.c | 2 +- boards/posix/nrf52_bsim/radio_sim_nrfxx.h | 44 +- doc/guides/documentation/index.rst | 16 +- doc/guides/dts/howtos.rst | 6 +- doc/guides/tracing/index.rst | 4 +- doc/reference/drivers/index.rst | 2 +- .../kernel/data_passing/mailboxes.rst | 2 +- .../kernel/data_passing/message_queues.rst | 6 +- doc/reference/kernel/other/interrupts.rst | 8 +- doc/reference/kernel/other/ring_buffers.rst | 32 +- doc/reference/kernel/threads/index.rst | 4 +- doc/reference/kernel/timing/clocks.rst | 6 +- doc/reference/logging/index.rst | 2 +- doc/reference/networking/can_api.rst | 2 +- doc/reference/networking/coap.rst | 6 +- doc/reference/networking/lwm2m.rst | 2 +- doc/reference/networking/mqtt.rst | 6 +- doc/reference/networking/net_buf.rst | 16 +- doc/reference/networking/net_mgmt.rst | 4 +- doc/reference/networking/net_pkt.rst | 2 +- doc/reference/power_management/index.rst | 8 +- doc/reference/shell/index.rst | 2 +- doc/reference/usermode/memory_domain.rst | 10 +- doc/reference/usermode/syscalls.rst | 2 +- drivers/adc/adc_common.c | 8 +- drivers/adc/adc_context.h | 6 +- drivers/adc/adc_lmp90xxx.c | 122 +-- drivers/adc/adc_mchp_xec.c | 46 +- drivers/adc/adc_mcp320x.c | 28 +- drivers/adc/adc_mcux_adc12.c | 18 +- drivers/adc/adc_mcux_adc16.c | 18 +- drivers/adc/adc_nrfx_adc.c | 12 +- drivers/adc/adc_nrfx_saadc.c | 14 +- drivers/adc/adc_sam0.c | 58 +- drivers/adc/adc_sam_afec.c | 26 +- drivers/adc/adc_shell.c | 40 +- drivers/adc/adc_stm32.c | 70 +- drivers/audio/decimation/pdm_decim_fir.h | 2 +- .../pdm_decim_int32_02_4288_5100_010_095.c | 2 +- .../pdm_decim_int32_02_4375_5100_010_095.c | 2 +- .../pdm_decim_int32_03_3850_5100_010_095.c | 2 +- .../pdm_decim_int32_03_4375_5100_010_095.c | 2 +- .../pdm_decim_int32_04_4375_5100_010_095.c | 2 +- .../pdm_decim_int32_05_4331_5100_010_095.c | 2 +- .../pdm_decim_int32_06_4156_5100_010_095.c | 2 +- .../pdm_decim_int32_08_4156_5380_010_090.c | 2 +- drivers/audio/intel_dmic.c | 152 +-- drivers/audio/intel_dmic.h | 8 +- drivers/audio/mpxxdtyy-i2s.c | 10 +- drivers/audio/mpxxdtyy.c | 34 +- drivers/audio/mpxxdtyy.h | 6 +- drivers/audio/tlv320dac310x.c | 34 +- drivers/audio/tlv320dac310x.h | 4 +- drivers/bluetooth/hci/h4.c | 18 +- drivers/bluetooth/hci/h5.c | 54 +- drivers/bluetooth/hci/ipm_stm32wb.c | 32 +- drivers/bluetooth/hci/rpmsg.c | 16 +- drivers/bluetooth/hci/rpmsg_nrf53.c | 12 +- drivers/bluetooth/hci/spi.c | 40 +- drivers/bluetooth/hci/userchan.c | 6 +- drivers/bluetooth/util.h | 2 +- drivers/can/can_common.c | 4 +- drivers/can/can_handlers.c | 4 +- drivers/can/can_loopback.c | 4 +- drivers/can/can_mcp2515.c | 122 +-- drivers/can/can_mcp2515.h | 24 +- drivers/can/can_mcux_flexcan.c | 34 +- drivers/can/can_net.c | 18 +- drivers/can/can_shell.c | 22 +- drivers/can/can_stm32.c | 80 +- drivers/can/can_stm32.h | 12 +- drivers/can/socket_can_generic.h | 2 +- drivers/clock_control/beetle_clock_control.c | 46 +- .../clock_control/clock_control_mcux_ccm.c | 6 +- .../clock_control/clock_control_mcux_mcg.c | 4 +- .../clock_control/clock_control_mcux_pcc.c | 6 +- .../clock_control/clock_control_mcux_scg.c | 4 +- .../clock_control/clock_control_mcux_sim.c | 4 +- .../clock_control/clock_control_rv32m1_pcc.c | 6 +- drivers/clock_control/clock_stm32_ll_common.c | 14 +- drivers/clock_control/clock_stm32_ll_h7.c | 16 +- drivers/clock_control/clock_stm32_ll_mp1.c | 2 +- drivers/clock_control/nrf_clock_calibration.c | 14 +- drivers/clock_control/nrf_power_clock.c | 10 +- drivers/console/gsm_mux.c | 114 +- drivers/console/gsm_mux.h | 8 +- drivers/console/ipm_console_receiver.c | 8 +- drivers/console/native_posix_console.c | 10 +- drivers/console/uart_console.c | 20 +- drivers/console/uart_mcumgr.c | 10 +- drivers/console/uart_mux.c | 18 +- drivers/console/uart_mux_internal.h | 4 +- drivers/console/uart_pipe.c | 8 +- drivers/counter/counter_cmos.c | 26 +- drivers/counter/counter_gecko_rtcc.c | 42 +- drivers/counter/counter_handlers.c | 38 +- drivers/counter/counter_imx_epit.c | 10 +- drivers/counter/counter_ll_stm32_rtc.c | 24 +- drivers/counter/counter_mchp_xec.c | 20 +- drivers/counter/counter_mcux_gpt.c | 22 +- drivers/counter/counter_mcux_lptmr.c | 14 +- drivers/counter/counter_mcux_rtc.c | 22 +- drivers/counter/counter_nrfx_rtc.c | 78 +- drivers/counter/counter_nrfx_timer.c | 56 +- drivers/counter/counter_sam0_tc32.c | 38 +- drivers/counter/dualtimer_cmsdk_apb.h | 36 +- drivers/counter/maxim_ds3231.c | 188 ++-- drivers/counter/timer_cmsdk_apb.h | 10 +- drivers/counter/timer_dtmr_cmsdk_apb.c | 10 +- drivers/counter/timer_tmr_cmsdk_apb.c | 10 +- drivers/crypto/crypto_ataes132a.c | 78 +- drivers/crypto/crypto_ataes132a_priv.h | 66 +- drivers/crypto/crypto_mtls_shim.c | 16 +- drivers/crypto/crypto_nrf_ecb.c | 6 +- drivers/crypto/crypto_stm32.c | 44 +- drivers/crypto/crypto_stm32_priv.h | 2 +- drivers/crypto/crypto_tc_shim.c | 12 +- drivers/dac/dac_handlers.c | 2 +- drivers/dac/dac_mcux_dac.c | 2 +- drivers/dac/dac_mcux_dac32.c | 2 +- drivers/dac/dac_shell.c | 12 +- drivers/dac/dac_stm32.c | 8 +- drivers/display/display_dummy.c | 12 +- drivers/display/display_framebuf.c | 28 +- drivers/display/display_ili9340.c | 28 +- drivers/display/display_ili9340.h | 2 +- .../display/display_ili9340_adafruit_1480.c | 2 +- drivers/display/display_ili9340_seeed_tftv2.c | 4 +- drivers/display/display_mcux_elcdif.c | 26 +- drivers/display/display_sdl.c | 78 +- drivers/display/display_st7789v.c | 72 +- drivers/display/gd7965.c | 30 +- drivers/display/grove_lcd_rgb.c | 54 +- drivers/display/mb_display.c | 36 +- drivers/display/ssd1306.c | 48 +- drivers/display/ssd16xx.c | 66 +- drivers/dma/dma_dw.c | 34 +- drivers/dma/dma_dw.h | 12 +- drivers/dma/dma_handlers.c | 4 +- drivers/dma/dma_nios2_msgdma.c | 16 +- drivers/dma/dma_sam0.c | 20 +- drivers/dma/dma_sam_xdmac.c | 22 +- drivers/dma/dma_sam_xdmac.h | 66 +- drivers/dma/dma_stm32.c | 48 +- drivers/dma/dma_stm32.h | 52 +- drivers/dma/dma_stm32_v1.c | 46 +- drivers/dma/dma_stm32_v2.c | 22 +- drivers/dma/dmamux_stm32.c | 10 +- drivers/dma/dmamux_stm32.h | 18 +- drivers/eeprom/eeprom_at2x.c | 40 +- drivers/eeprom/eeprom_shell.c | 20 +- drivers/eeprom/eeprom_simulator.c | 4 +- drivers/eeprom/eeprom_stm32.c | 8 +- drivers/entropy/entropy_cc13xx_cc26xx.c | 14 +- drivers/entropy/entropy_esp32.c | 8 +- drivers/entropy/entropy_gecko_trng.c | 16 +- drivers/entropy/entropy_handlers.c | 6 +- drivers/entropy/entropy_litex.c | 14 +- drivers/entropy/entropy_mcux_rng.c | 4 +- drivers/entropy/entropy_mcux_rnga.c | 12 +- drivers/entropy/entropy_mcux_trng.c | 4 +- drivers/entropy/entropy_nrf5.c | 46 +- drivers/entropy/entropy_rv32m1_trng.c | 4 +- drivers/entropy/entropy_sam.c | 20 +- drivers/entropy/entropy_stm32.c | 12 +- drivers/entropy/fake_entropy_native_posix.c | 8 +- drivers/espi/espi_handlers.c | 18 +- drivers/espi/espi_mchp_xec.c | 120 +-- drivers/ethernet/eth.h | 4 +- drivers/ethernet/eth_e1000.c | 10 +- drivers/ethernet/eth_e1000_priv.h | 36 +- drivers/ethernet/eth_enc28j60.c | 100 +- drivers/ethernet/eth_enc28j60_priv.h | 14 +- drivers/ethernet/eth_enc424j600.c | 86 +- drivers/ethernet/eth_enc424j600_priv.h | 16 +- drivers/ethernet/eth_gecko.c | 54 +- drivers/ethernet/eth_gecko_priv.h | 8 +- drivers/ethernet/eth_liteeth.c | 22 +- drivers/ethernet/eth_mcux.c | 56 +- drivers/ethernet/eth_native_posix.c | 18 +- drivers/ethernet/eth_sam_gmac.c | 178 ++-- drivers/ethernet/eth_sam_gmac_priv.h | 30 +- drivers/ethernet/eth_smsc911x.c | 88 +- drivers/ethernet/eth_smsc911x_priv.h | 6 +- drivers/ethernet/eth_stellaris.c | 26 +- drivers/ethernet/eth_stellaris_priv.h | 10 +- drivers/ethernet/eth_stm32_hal.c | 44 +- drivers/ethernet/eth_stm32_hal_priv.h | 2 +- drivers/ethernet/phy_gecko.c | 40 +- drivers/ethernet/phy_gecko.h | 6 +- drivers/ethernet/phy_sam_gmac.c | 40 +- drivers/ethernet/phy_sam_gmac.h | 6 +- drivers/flash/flash_gecko.c | 16 +- drivers/flash/flash_handlers.c | 2 +- drivers/flash/flash_page_layout.c | 4 +- drivers/flash/flash_sam.c | 12 +- drivers/flash/flash_sam0.c | 18 +- drivers/flash/flash_shell.c | 28 +- drivers/flash/flash_simulator.c | 20 +- drivers/flash/flash_stm32.c | 6 +- drivers/flash/flash_stm32.h | 4 +- drivers/flash/flash_stm32f0x.c | 14 +- drivers/flash/flash_stm32f1x.c | 14 +- drivers/flash/flash_stm32f3x.c | 12 +- drivers/flash/flash_stm32f4x.c | 20 +- drivers/flash/flash_stm32f7x.c | 16 +- drivers/flash/flash_stm32g0x.c | 16 +- drivers/flash/flash_stm32g4x.c | 16 +- drivers/flash/flash_stm32l4x.c | 18 +- drivers/flash/flash_stm32wbx.c | 20 +- drivers/flash/nrf_qspi_nor.c | 20 +- drivers/flash/soc_flash_mcux.c | 10 +- drivers/flash/soc_flash_nios2_qspi.c | 56 +- drivers/flash/soc_flash_nrf.c | 88 +- drivers/flash/soc_flash_rv32m1.c | 12 +- drivers/flash/spi_flash_at45.c | 50 +- drivers/flash/spi_flash_w25qxxdv.c | 40 +- drivers/flash/spi_nor.c | 16 +- drivers/flash/spi_nor.h | 4 +- drivers/gpio/gpio_cc13xx_cc26xx.c | 26 +- drivers/gpio/gpio_cc32xx.c | 26 +- drivers/gpio/gpio_cmsdk_ahb.c | 16 +- drivers/gpio/gpio_cmsdk_ahb.h | 36 +- drivers/gpio/gpio_dw.c | 136 +-- drivers/gpio/gpio_dw.h | 8 +- drivers/gpio/gpio_esp32.c | 70 +- drivers/gpio/gpio_gecko.c | 16 +- drivers/gpio/gpio_ht16k33.c | 6 +- drivers/gpio/gpio_imx.c | 12 +- drivers/gpio/gpio_intel_apl.c | 50 +- drivers/gpio/gpio_litex.c | 20 +- drivers/gpio/gpio_mchp_xec.c | 70 +- drivers/gpio/gpio_mcp23s17.c | 46 +- drivers/gpio/gpio_mcp23s17.h | 28 +- drivers/gpio/gpio_mcux.c | 26 +- drivers/gpio/gpio_mcux_igpio.c | 18 +- drivers/gpio/gpio_mcux_lpc.c | 48 +- drivers/gpio/gpio_mmio32.c | 22 +- drivers/gpio/gpio_nrfx.c | 86 +- drivers/gpio/gpio_pca95xx.c | 66 +- drivers/gpio/gpio_rv32m1.c | 26 +- drivers/gpio/gpio_sam.c | 22 +- drivers/gpio/gpio_sam0.c | 8 +- drivers/gpio/gpio_shell.c | 30 +- drivers/gpio/gpio_sifive.c | 4 +- drivers/gpio/gpio_stellaris.c | 44 +- drivers/gpio/gpio_stm32.c | 18 +- drivers/gpio/gpio_stm32.h | 6 +- drivers/gpio/gpio_sx1509b.c | 68 +- drivers/gpio/gpio_utils.h | 4 +- drivers/hwinfo/hwinfo_esp32.c | 20 +- drivers/hwinfo/hwinfo_handlers.c | 4 +- drivers/hwinfo/hwinfo_imxrt.c | 4 +- drivers/hwinfo/hwinfo_litex.c | 8 +- drivers/hwinfo/hwinfo_mcux_sim.c | 6 +- drivers/hwinfo/hwinfo_nrf.c | 4 +- drivers/hwinfo/hwinfo_sam.c | 8 +- drivers/hwinfo/hwinfo_sam0.c | 12 +- drivers/hwinfo/hwinfo_shell.c | 2 +- drivers/hwinfo/hwinfo_stm32.c | 4 +- drivers/hwinfo/hwinfo_weak_impl.c | 2 +- drivers/i2c/i2c-priv.h | 2 +- drivers/i2c/i2c_bitbang.c | 18 +- drivers/i2c/i2c_bitbang.h | 8 +- drivers/i2c/i2c_cc13xx_cc26xx.c | 42 +- drivers/i2c/i2c_cc32xx.c | 34 +- drivers/i2c/i2c_dw.c | 32 +- drivers/i2c/i2c_dw.h | 20 +- drivers/i2c/i2c_dw_registers.h | 258 ++--- drivers/i2c/i2c_esp32.c | 64 +- drivers/i2c/i2c_gecko.c | 20 +- drivers/i2c/i2c_gpio.c | 8 +- drivers/i2c/i2c_handlers.c | 16 +- drivers/i2c/i2c_imx.c | 36 +- drivers/i2c/i2c_litex.c | 20 +- drivers/i2c/i2c_ll_stm32.c | 20 +- drivers/i2c/i2c_ll_stm32.h | 20 +- drivers/i2c/i2c_ll_stm32_v1.c | 70 +- drivers/i2c/i2c_ll_stm32_v2.c | 46 +- drivers/i2c/i2c_mchp_xec.c | 48 +- drivers/i2c/i2c_mcux.c | 16 +- drivers/i2c/i2c_mcux_flexcomm.c | 16 +- drivers/i2c/i2c_mcux_lpi2c.c | 18 +- drivers/i2c/i2c_nios2.c | 10 +- drivers/i2c/i2c_nrfx_twi.c | 18 +- drivers/i2c/i2c_nrfx_twim.c | 14 +- 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.../winc1500/wifi_winc1500_nm_bsp_internal.h | 2 +- .../winc1500/wifi_winc1500_nm_bus_wrapper.c | 18 +- include/arch/arc/arch.h | 6 +- include/arch/arc/arch_inlines.h | 2 +- include/arch/arc/syscall.h | 60 +- include/arch/arc/thread.h | 12 +- include/arch/arc/v2/arc_connect.h | 88 +- include/arch/arc/v2/arcv2_irq_unit.h | 2 +- include/arch/arc/v2/asm_inline_gcc.h | 2 +- include/arch/arc/v2/aux_regs.h | 4 +- include/arch/arc/v2/ffs.h | 4 +- include/arch/arc/v2/irq.h | 2 +- include/arch/arc/v2/misc.h | 4 +- include/arch/arc/v2/mpu/arc_core_mpu.h | 8 +- include/arch/arc/v2/mpu/arc_mpu.h | 8 +- include/arch/arc/v2/secureshield/arc_secure.h | 90 +- include/arch/arc/v2/sys_io.h | 72 +- include/arch/arm/aarch32/arch.h | 2 +- include/arch/arm/aarch32/cortex_a_r/sys_io.h | 34 +- include/arch/arm/aarch32/cortex_m/cmsis.h | 6 +- .../arch/arm/aarch32/cortex_m/mpu/arm_mpu.h | 4 +- .../arm/aarch32/cortex_m/mpu/arm_mpu_v7m.h | 6 +- .../arm/aarch32/cortex_m/mpu/arm_mpu_v8m.h | 12 +- .../arch/arm/aarch32/cortex_m/mpu/nxp_mpu.h | 14 +- include/arch/arm/aarch32/error.h | 2 +- include/arch/arm/aarch32/exc.h | 6 +- include/arch/arm/aarch32/irq.h | 2 +- include/arch/arm/aarch32/misc.h | 4 +- include/arch/arm/aarch32/syscall.h | 60 +- include/arch/arm/aarch32/thread.h | 26 +- include/arch/arm/aarch64/arm_mmu.h | 8 +- include/arch/arm/aarch64/cpu.h | 2 +- include/arch/arm/aarch64/exc.h | 6 +- include/arch/arm/aarch64/irq.h | 2 +- include/arch/arm/aarch64/misc.h | 4 +- include/arch/arm/aarch64/sys_io.h | 34 +- include/arch/arm/aarch64/thread.h | 28 +- include/arch/arm/aarch64/timer.h | 8 +- include/arch/common/ffs.h | 4 +- include/arch/common/sys_io.h | 34 +- include/arch/nios2/arch.h | 40 +- include/arch/nios2/nios2.h | 22 +- include/arch/nios2/thread.h | 26 +- include/arch/posix/arch.h | 6 +- include/arch/posix/thread.h | 4 +- include/arch/riscv/arch.h | 6 +- include/arch/riscv/exp.h | 4 +- include/arch/riscv/thread.h | 8 +- include/arch/x86/acpi.h | 34 +- include/arch/x86/arch.h | 74 +- include/arch/x86/ia32/arch.h | 14 +- include/arch/x86/ia32/segmentation.h | 164 +-- include/arch/x86/ia32/sys_io.h | 6 +- include/arch/x86/ia32/syscall.h | 14 +- include/arch/x86/ia32/thread.h | 2 +- include/arch/x86/intel64/thread.h | 70 +- include/arch/x86/memmap.h | 4 +- include/arch/x86/mmustructs.h | 44 +- include/arch/x86/msr.h | 18 +- include/arch/x86/multiboot.h | 38 +- include/arch/xtensa/arch.h | 8 +- include/arch/xtensa/arch_inlines.h | 2 +- include/arch/xtensa/exc.h | 2 +- include/arch/xtensa/irq.h | 6 +- include/arch/xtensa/thread.h | 4 +- include/audio/codec.h | 2 +- include/audio/dmic.h | 54 +- include/bluetooth/a2dp-codec.h | 6 +- include/bluetooth/a2dp.h | 8 +- include/bluetooth/addr.h | 4 +- include/bluetooth/avdtp.h | 14 +- include/bluetooth/bluetooth.h | 98 +- include/bluetooth/buf.h | 6 +- include/bluetooth/conn.h | 96 +- include/bluetooth/controller.h | 2 +- include/bluetooth/crypto.h | 20 +- include/bluetooth/gatt.h | 142 +-- include/bluetooth/hci.h | 976 +++++++++--------- include/bluetooth/hci_raw.h | 8 +- include/bluetooth/hci_vs.h | 244 ++--- include/bluetooth/hfp_hf.h | 18 +- include/bluetooth/l2cap.h | 26 +- include/bluetooth/mesh/access.h | 70 +- include/bluetooth/mesh/cdb.h | 48 +- include/bluetooth/mesh/cfg_cli.h | 226 ++-- include/bluetooth/mesh/cfg_srv.h | 40 +- include/bluetooth/mesh/health_cli.h | 34 +- include/bluetooth/mesh/health_srv.h | 18 +- include/bluetooth/mesh/main.h | 42 +- include/bluetooth/rfcomm.h | 12 +- include/bluetooth/sdp.h | 28 +- include/bluetooth/services/bas.h | 4 +- include/bluetooth/services/hrs.h | 2 +- include/bluetooth/testing.h | 16 +- include/bluetooth/uuid.h | 10 +- include/canbus/isotp.h | 52 +- include/console/tty.h | 20 +- include/crypto/cipher.h | 10 +- include/crypto/cipher_structs.h | 34 +- include/data/json.h | 8 +- include/data/jwt.h | 4 +- include/device.h | 10 +- include/devicetree.h | 2 +- include/dfu/flash_img.h | 6 +- include/dfu/mcuboot.h | 16 +- include/disk/disk_access.h | 20 +- include/display/cfb.h | 14 +- include/display/framebuf.h | 6 +- include/display/grove_lcd.h | 20 +- include/display/mb_display.h | 10 +- include/drivers/adc.h | 36 +- include/drivers/adc/lmp90xxx.h | 8 +- include/drivers/bluetooth/hci_driver.h | 12 +- include/drivers/can.h | 62 +- include/drivers/clock_control.h | 4 +- .../drivers/clock_control/arm_clock_control.h | 2 +- .../clock_control/stm32_clock_control.h | 4 +- include/drivers/console/console.h | 4 +- include/drivers/console/ipm_console.h | 2 +- include/drivers/console/uart_console.h | 4 +- include/drivers/console/uart_mcumgr.h | 4 +- include/drivers/console/uart_pipe.h | 6 +- include/drivers/counter.h | 102 +- include/drivers/dac.h | 10 +- include/drivers/display.h | 56 +- include/drivers/dma.h | 98 +- include/drivers/entropy.h | 24 +- include/drivers/espi.h | 48 +- include/drivers/flash.h | 4 +- include/drivers/gna.h | 32 +- include/drivers/gpio.h | 16 +- include/drivers/gpio/gpio_mmio32.h | 6 +- include/drivers/hwinfo.h | 4 +- include/drivers/i2c.h | 88 +- include/drivers/i2c/slave/eeprom.h | 4 +- include/drivers/i2s.h | 12 +- include/drivers/ieee802154/cc1200.h | 10 +- include/drivers/interrupt_controller/ioapic.h | 2 +- include/drivers/interrupt_controller/loapic.h | 16 +- .../drivers/interrupt_controller/sam0_eic.h | 4 +- .../drivers/interrupt_controller/sysapic.h | 2 +- include/drivers/ipm.h | 16 +- include/drivers/kscan.h | 2 +- include/drivers/led.h | 36 +- include/drivers/led/ht16k33.h | 6 +- include/drivers/led_strip.h | 12 +- include/drivers/lora.h | 26 +- include/drivers/pcie/msi.h | 6 +- include/drivers/pcie/pcie.h | 14 +- include/drivers/peci.h | 12 +- include/drivers/pinmux.h | 18 +- include/drivers/ps2.h | 14 +- include/drivers/pwm.h | 54 +- include/drivers/rtc/maxim_ds3231.h | 24 +- include/drivers/sensor.h | 24 +- include/drivers/sensor/ccs811.h | 20 +- include/drivers/spi.h | 10 +- include/drivers/timer/system_timer.h | 8 +- include/drivers/uart.h | 78 +- include/drivers/usb/usb_dc.h | 42 +- include/drivers/video.h | 34 +- include/drivers/watchdog.h | 12 +- include/fs/fcb.h | 22 +- include/fs/littlefs.h | 12 +- include/fs/nvs.h | 22 +- include/init.h | 2 +- include/irq.h | 2 +- include/irq_nextlevel.h | 10 +- include/kernel.h | 160 +-- include/kernel_structs.h | 10 +- include/kernel_version.h | 2 +- include/linker/intlist.ld | 2 +- include/logging/log.h | 4 +- include/logging/log_backend.h | 24 +- include/logging/log_core.h | 48 +- include/logging/log_ctrl.h | 26 +- include/logging/log_frontend.h | 6 +- include/logging/log_instance.h | 8 +- include/logging/log_msg.h | 50 +- include/logging/log_output.h | 20 +- include/mempool_sys.h | 6 +- include/mgmt/serial.h | 6 +- include/mgmt/smp_shell.h | 4 +- include/net/buf.h | 124 +-- include/net/can.h | 32 +- include/net/coap.h | 86 +- include/net/coap_link_format.h | 2 +- include/net/dns_resolve.h | 24 +- include/net/ethernet.h | 38 +- include/net/ethernet_mgmt.h | 8 +- include/net/ethernet_vlan.h | 12 +- include/net/gptp.h | 52 +- include/net/hostname.h | 4 +- include/net/http_client.h | 14 +- include/net/http_parser.h | 20 +- include/net/http_parser_url.h | 10 +- include/net/ieee802154.h | 40 +- include/net/ieee802154_mgmt.h | 26 +- include/net/ieee802154_radio.h | 18 +- include/net/lldp.h | 20 +- include/net/lwm2m.h | 74 +- include/net/mqtt.h | 70 +- include/net/net_config.h | 2 +- include/net/net_context.h | 32 +- include/net/net_event.h | 2 +- include/net/net_if.h | 128 +-- include/net/net_ip.h | 166 +-- include/net/net_linkaddr.h | 20 +- include/net/net_mgmt.h | 38 +- include/net/net_offload.h | 10 +- include/net/net_pkt.h | 266 ++--- include/net/net_stats.h | 18 +- include/net/net_timeout.h | 8 +- include/net/openthread.h | 6 +- include/net/ppp.h | 76 +- include/net/ptp_time.h | 44 +- include/net/sntp.h | 14 +- include/net/socket_net_mgmt.h | 8 +- include/net/socket_select.h | 2 +- include/net/tftp.h | 4 +- include/net/trickle.h | 20 +- include/net/websocket.h | 12 +- include/net/wifi_mgmt.h | 18 +- include/posix/posix_types.h | 18 +- include/posix/pthread_key.h | 2 +- include/posix/sys/eventfd.h | 2 +- include/posix/time.h | 2 +- include/power/power.h | 2 +- include/random/rand32.h | 2 +- include/shared_irq.h | 6 +- include/shell/shell.h | 38 +- include/shell/shell_fprintf.h | 2 +- include/shell/shell_history.h | 6 +- include/shell/shell_log_backend.h | 8 +- include/shell/shell_telnet.h | 2 +- include/shell/shell_types.h | 16 +- include/shell/shell_uart.h | 2 +- include/stats/stats.h | 32 +- include/storage/flash_map.h | 12 +- include/storage/stream_flash.h | 8 +- include/sw_isr_table.h | 4 +- include/sys/arch_interface.h | 28 +- include/sys/atomic.h | 2 +- include/sys/base64.h | 4 +- include/sys/byteorder.h | 80 +- include/sys/crc.h | 20 +- include/sys/math_extras.h | 20 +- include/sys/math_extras_impl.h | 60 +- include/sys/mempool.h | 4 +- include/sys/mempool_base.h | 22 +- include/sys/notify.h | 6 +- include/sys/onoff.h | 8 +- include/sys/ring_buffer.h | 60 +- include/sys/sflist.h | 14 +- include/sys/speculation.h | 6 +- include/sys/sys_heap.h | 10 +- include/sys/sys_io.h | 28 +- include/sys/time_units.h | 184 ++-- include/sys/timeutil.h | 2 +- include/sys/util.h | 26 +- include/sys_clock.h | 26 +- include/timeout_q.h | 6 +- include/toolchain/gcc.h | 2 +- include/toolchain/zephyr_stdint.h | 2 +- include/tracing/tracing_format.h | 10 +- include/usb/bos.h | 34 +- include/usb/class/usb_audio.h | 4 +- include/usb/class/usb_cdc.h | 72 +- include/usb/class/usb_dfu.h | 12 +- include/usb/class/usb_hid.h | 32 +- include/usb/class/usb_msc.h | 22 +- include/usb/usb_common.h | 96 +- include/usb/usb_device.h | 52 +- include/usb/usbstruct.h | 4 +- kernel/Kconfig | 2 +- kernel/device.c | 8 +- kernel/idle.c | 8 +- kernel/include/kernel_arch_interface.h | 2 +- kernel/include/kernel_internal.h | 10 +- kernel/include/ksched.h | 12 +- kernel/init.c | 28 +- kernel/kheap.c | 2 +- kernel/mailbox.c | 2 +- kernel/mem_domain.c | 14 +- kernel/mem_slab.c | 4 +- kernel/mempool_sys.c | 6 +- kernel/msg_q.c | 10 +- kernel/mutex.c | 4 +- kernel/pipes.c | 6 +- kernel/poll.c | 18 +- kernel/queue.c | 14 +- kernel/sched.c | 30 +- kernel/stack.c | 14 +- kernel/thread.c | 44 +- kernel/timeout.c | 34 +- kernel/timer.c | 12 +- kernel/userspace.c | 6 +- kernel/version.c | 2 +- lib/cmsis_rtos_v1/cmsis_msgq.c | 2 +- lib/cmsis_rtos_v1/cmsis_signal.c | 12 +- lib/cmsis_rtos_v1/cmsis_thread.c | 12 +- lib/cmsis_rtos_v1/cmsis_timer.c | 2 +- lib/cmsis_rtos_v2/event_flags.c | 16 +- lib/cmsis_rtos_v2/kernel.c | 6 +- lib/cmsis_rtos_v2/thread.c | 24 +- lib/cmsis_rtos_v2/thread_flags.c | 14 +- lib/cmsis_rtos_v2/wrapper.h | 10 +- lib/gui/lvgl/lvgl.c | 14 +- lib/gui/lvgl/lvgl_display.h | 8 +- lib/gui/lvgl/lvgl_display_16bit.c | 8 +- lib/gui/lvgl/lvgl_display_24bit.c | 8 +- lib/gui/lvgl/lvgl_display_32bit.c | 8 +- lib/gui/lvgl/lvgl_display_mono.c | 10 +- lib/gui/lvgl/lvgl_fs.c | 14 +- lib/libc/newlib/libc-hooks.c | 2 +- lib/os/base64.c | 14 +- lib/os/crc16_sw.c | 14 +- lib/os/crc32_sw.c | 6 +- lib/os/crc7_sw.c | 6 +- lib/os/crc8_sw.c | 10 +- lib/os/dec.c | 8 +- lib/os/heap-validate.c | 20 +- lib/os/heap.c | 8 +- lib/os/heap.h | 18 +- lib/os/hex.c | 10 +- lib/os/json.c | 12 +- lib/os/mempool.c | 28 +- lib/os/notify.c | 2 +- lib/os/onoff.c | 24 +- lib/os/ring_buffer.c | 52 +- lib/os/timeutil.c | 20 +- lib/posix/clock.c | 10 +- lib/posix/mqueue.c | 20 +- lib/posix/pthread.c | 16 +- lib/posix/pthread_common.c | 4 +- lib/posix/pthread_cond.c | 4 +- lib/posix/pthread_mutex.c | 4 +- lib/posix/pthread_rwlock.c | 28 +- lib/posix/semaphore.c | 10 +- lib/posix/timer.c | 16 +- lib/updatehub/updatehub.c | 14 +- lib/updatehub/updatehub_device.c | 2 +- .../code_relocation/src/main.c | 2 +- .../code_relocation/src/test_file1.c | 10 +- .../code_relocation/src/test_file2.c | 2 +- .../code_relocation/src/test_file3.c | 4 +- .../zephyr/hello_world_driver.c | 2 +- samples/basic/blinky_pwm/src/main.c | 6 +- samples/basic/button/src/main.c | 2 +- samples/basic/fade_led/src/main.c | 4 +- samples/basic/rgb_led/src/main.c | 6 +- samples/basic/servo_motor/src/main.c | 2 +- samples/basic/threads/src/main.c | 6 +- samples/bluetooth/central/src/main.c | 6 +- samples/bluetooth/central_hr/src/main.c | 18 +- samples/bluetooth/central_ht/src/main.c | 26 +- samples/bluetooth/eddystone/src/main.c | 102 +- samples/bluetooth/handsfree/src/main.c | 14 +- samples/bluetooth/hci_pwr_ctrl/src/main.c | 34 +- samples/bluetooth/hci_rpmsg/src/main.c | 20 +- samples/bluetooth/hci_spi/src/main.c | 12 +- samples/bluetooth/hci_uart/src/main.c | 14 +- samples/bluetooth/ipsp/src/main.c | 4 +- samples/bluetooth/mesh/src/board.h | 4 +- samples/bluetooth/mesh/src/main.c | 4 +- samples/bluetooth/mesh/src/microbit.c | 6 +- samples/bluetooth/mesh_demo/src/board.h | 14 +- samples/bluetooth/mesh_demo/src/main.c | 24 +- samples/bluetooth/mesh_demo/src/microbit.c | 18 +- samples/bluetooth/mesh_provisioner/src/main.c | 26 +- samples/bluetooth/peripheral/src/cts.c | 18 +- samples/bluetooth/peripheral/src/main.c | 48 +- samples/bluetooth/peripheral_csc/src/main.c | 84 +- samples/bluetooth/peripheral_dis/src/main.c | 4 +- samples/bluetooth/peripheral_esp/src/main.c | 80 +- samples/bluetooth/peripheral_hids/src/hog.c | 32 +- samples/bluetooth/peripheral_hids/src/main.c | 4 +- samples/bluetooth/peripheral_hr/src/main.c | 8 +- samples/bluetooth/peripheral_ht/src/hts.c | 20 +- samples/bluetooth/peripheral_ht/src/main.c | 6 +- .../bluetooth/peripheral_sc_only/src/main.c | 4 +- samples/bluetooth/scan_adv/src/main.c | 4 +- .../bluetooth/st_ble_sensor/src/button_svc.c | 4 +- samples/bluetooth/st_ble_sensor/src/main.c | 14 +- .../boards/96b_argonkey/microphone/src/main.c | 8 +- samples/boards/arc_secure_services/src/main.c | 4 +- .../line_follower_robot/src/main.c | 2 +- samples/boards/bbc_microbit/pong/src/ble.c | 40 +- samples/boards/bbc_microbit/pong/src/main.c | 14 +- samples/boards/bbc_microbit/pong/src/pong.h | 4 +- samples/boards/bbc_microbit/sound/src/main.c | 4 +- .../intel_s1000_crb/audio/src/audio_core.c | 30 +- .../intel_s1000_crb/audio/src/audio_core.h | 12 +- .../intel_s1000_crb/audio/src/audio_driver.c | 14 +- .../intel_s1000_crb/audio/src/tuning_driver.c | 22 +- .../intel_s1000_crb/audio/src/usb_transport.c | 38 +- .../intel_s1000_crb/audio/src/usb_transport.h | 12 +- .../intel_s1000_crb/dmic/src/dmic_sample.c | 2 +- .../intel_s1000_crb/i2s/src/i2s_sample.c | 10 +- .../power_management/src/power_mgmt.c | 20 +- .../power_management/src/power_mgmt.h | 4 +- samples/boards/nrf/battery/src/battery.c | 16 +- samples/boards/nrf/battery/src/battery.h | 4 +- samples/boards/nrf/battery/src/main.c | 2 +- samples/boards/nrf/mesh/onoff-app/src/main.c | 34 +- .../src/app_gpio.c | 2 +- .../onoff_level_lighting_vnd_app/src/main.c | 10 +- .../src/mesh/ble_mesh.c | 6 +- .../src/mesh/device_composition.c | 300 +++--- .../src/mesh/device_composition.h | 56 +- .../src/mesh/publisher.c | 4 +- .../src/mesh/state_binding.c | 62 +- .../src/mesh/state_binding.h | 12 +- .../src/mesh/transition.c | 10 +- .../src/mesh/transition.h | 18 +- .../src/storage.c | 10 +- .../src/storage.h | 4 +- samples/boards/nrf/nrfx/src/main.c | 2 +- .../boards/olimex_stm32_e407/ccm/src/main.c | 14 +- .../boards/reel_board/mesh_badge/src/board.h | 6 +- .../boards/reel_board/mesh_badge/src/main.c | 10 +- .../boards/reel_board/mesh_badge/src/mesh.c | 40 +- .../boards/reel_board/mesh_badge/src/mesh.h | 14 +- .../reel_board/mesh_badge/src/reel_board.c | 44 +- .../cc13x2_cc26x2/system_off/src/ext_flash.c | 6 +- .../ti/cc13x2_cc26x2/system_off/src/main.c | 2 +- .../boards/up_squared/gpio_counter/src/main.c | 10 +- samples/display/cfb/src/main.c | 8 +- samples/display/grove_display/src/main.c | 8 +- samples/display/lvgl/src/main.c | 2 +- samples/drivers/can/src/main.c | 10 +- samples/drivers/counter/alarm/src/main.c | 10 +- .../drivers/counter/maxim_ds3231/src/main.c | 80 +- samples/drivers/crypto/src/main.c | 66 +- samples/drivers/current_sensing/src/main.c | 16 +- samples/drivers/display/src/main.c | 36 +- samples/drivers/entropy/src/main.c | 2 +- samples/drivers/espi/src/main.c | 64 +- samples/drivers/flash_shell/src/main.c | 16 +- samples/drivers/ht16k33/src/main.c | 2 +- samples/drivers/i2c_fujitsu_fram/src/main.c | 16 +- samples/drivers/kscan/src/main.c | 10 +- samples/drivers/kscan_touch/src/main.c | 2 +- samples/drivers/lcd_hd44780/src/main.c | 28 +- .../drivers/led_apa102c_bitbang/src/main.c | 4 +- samples/drivers/led_lp5562/src/main.c | 8 +- samples/drivers/lora/receive/src/main.c | 6 +- samples/drivers/peci/src/main.c | 20 +- samples/drivers/ps2/src/main.c | 6 +- samples/drivers/soc_flash_nrf/src/main.c | 22 +- samples/drivers/spi_flash/src/main.c | 12 +- samples/drivers/spi_flash_at45/src/main.c | 8 +- samples/drivers/spi_fujitsu_fram/src/main.c | 20 +- samples/mpu/mpu_test/src/main.c | 22 +- samples/net/cloud/google_iot_mqtt/src/dhcp.c | 2 +- samples/net/cloud/google_iot_mqtt/src/main.c | 4 +- .../net/cloud/google_iot_mqtt/src/protocol.c | 24 +- samples/net/cloud/mqtt_azure/src/main.c | 24 +- samples/net/dhcpv4_client/src/main.c | 2 +- samples/net/dns_resolve/src/main.c | 8 +- samples/net/gptp/src/main.c | 8 +- samples/net/gsm_modem/src/main.c | 2 +- samples/net/ipv4_autoconf/src/main.c | 2 +- samples/net/lldp/src/main.c | 18 +- samples/net/lwm2m_client/src/lwm2m-client.c | 52 +- samples/net/mqtt_publisher/src/main.c | 16 +- samples/net/promiscuous_mode/src/main.c | 6 +- samples/net/sockets/can/src/main.c | 4 +- samples/net/sockets/civetweb/src/main.c | 2 +- .../net/sockets/coap_client/src/coap-client.c | 54 +- .../net/sockets/coap_server/src/coap-server.c | 254 ++--- samples/net/sockets/echo_client/src/common.h | 12 +- .../net/sockets/echo_client/src/echo-client.c | 2 +- samples/net/sockets/echo_client/src/tcp.c | 2 +- samples/net/sockets/echo_client/src/udp.c | 2 +- samples/net/sockets/echo_client/src/vlan.c | 2 +- samples/net/sockets/echo_server/src/common.h | 4 +- .../net/sockets/echo_server/src/echo-server.c | 2 +- samples/net/sockets/echo_server/src/vlan.c | 2 +- samples/net/sockets/http_client/src/main.c | 6 +- samples/net/sockets/net_mgmt/src/main.c | 2 +- samples/net/sockets/packet/src/packet.c | 2 +- samples/net/sockets/sntp_client/src/main.c | 4 +- .../net/sockets/websocket_client/src/main.c | 20 +- samples/net/telnet/src/telnet.c | 2 +- samples/net/wpan_serial/src/main.c | 44 +- samples/net/wpanusb/src/wpanusb.c | 20 +- samples/net/wpanusb/src/wpanusb.h | 10 +- samples/net/zperf/src/shell_utils.c | 18 +- samples/net/zperf/src/shell_utils.h | 12 +- samples/net/zperf/src/zperf.h | 20 +- samples/net/zperf/src/zperf_internal.h | 60 +- samples/net/zperf/src/zperf_session.c | 2 +- samples/net/zperf/src/zperf_session.h | 20 +- samples/net/zperf/src/zperf_shell.c | 34 +- samples/net/zperf/src/zperf_tcp_receiver.c | 16 +- samples/net/zperf/src/zperf_tcp_uploader.c | 12 +- samples/net/zperf/src/zperf_udp_receiver.c | 24 +- samples/net/zperf/src/zperf_udp_uploader.c | 26 +- samples/nfc/nfc_hello/src/main.c | 14 +- samples/philosophers/src/main.c | 10 +- samples/philosophers/src/phil_obj_abstract.h | 6 +- .../cmsis_rtos_v1/philosophers/src/main.c | 10 +- .../timer_synchronization/src/main.c | 8 +- .../cmsis_rtos_v2/philosophers/src/main.c | 10 +- .../timer_synchronization/src/main.c | 6 +- samples/scheduler/metairq_dispatch/src/main.c | 34 +- samples/scheduler/metairq_dispatch/src/main.h | 10 +- .../scheduler/metairq_dispatch/src/msgdev.c | 24 +- samples/sensor/adt7420/src/main.c | 2 +- samples/sensor/apds9960/src/main.c | 2 +- samples/sensor/bmg160/src/main.c | 4 +- samples/sensor/ccs811/src/main.c | 2 +- samples/sensor/dht/src/main.c | 2 +- samples/sensor/fxos8700-hid/src/main.c | 26 +- samples/sensor/hmc5883l/src/main.c | 4 +- samples/sensor/isl29035/src/main.c | 2 +- samples/sensor/lsm303dlhc/src/main.c | 4 +- samples/sensor/max44009/src/main.c | 2 +- samples/sensor/mcp9808/src/main.c | 2 +- samples/sensor/mpu6050/src/main.c | 2 +- samples/shields/lmp90100_evb/rtd/src/main.c | 2 +- .../x_nucleo_iks02a1/microphone/src/main.c | 8 +- samples/smp/pi/src/main.c | 4 +- samples/subsys/canbus/canopen/src/main.c | 16 +- samples/subsys/canbus/isotp/src/main.c | 4 +- samples/subsys/console/echo/src/main.c | 2 +- samples/subsys/console/getchar/src/main.c | 2 +- samples/subsys/fs/fat_fs/src/main.c | 10 +- samples/subsys/fs/littlefs/src/main.c | 2 +- samples/subsys/ipc/ipm_imx/src/main.c | 4 +- .../ipc/ipm_mcux/remote/src/main_remote.c | 2 +- samples/subsys/ipc/ipm_mcux/src/main_master.c | 2 +- .../subsys/ipc/ipm_mhu_dual_core/src/main.c | 6 +- samples/subsys/ipc/openamp/remote/src/main.c | 10 +- samples/subsys/ipc/openamp/src/main.c | 14 +- .../ipc/openamp_rsc_table/src/main_remote.c | 2 +- .../logger/src/ext_log_system_adapter.c | 2 +- samples/subsys/logging/logger/src/main.c | 14 +- .../logging/logger/src/sample_instance.c | 2 +- .../logging/logger/src/sample_instance.h | 2 +- samples/subsys/logging/syst/src/main.c | 24 +- .../mgmt/mcumgr/smp_svr/src/bluetooth.c | 4 +- samples/subsys/mgmt/mcumgr/smp_svr/src/udp.c | 2 +- samples/subsys/nvs/src/main.c | 4 +- .../subsys/power/device_pm/src/dummy_driver.c | 14 +- .../subsys/power/device_pm/src/dummy_driver.h | 4 +- .../subsys/power/device_pm/src/dummy_parent.c | 14 +- .../subsys/power/device_pm/src/dummy_parent.h | 2 +- samples/subsys/settings/src/main.c | 26 +- .../shell/shell_module/src/dynamic_cmd.c | 12 +- samples/subsys/shell/shell_module/src/main.c | 2 +- samples/subsys/usb/cdc_acm/src/main.c | 8 +- .../subsys/usb/cdc_acm_composite/src/main.c | 12 +- samples/subsys/usb/hid-cdc/src/main.c | 56 +- samples/subsys/usb/hid-mouse/src/main.c | 40 +- samples/subsys/usb/hid/src/main.c | 12 +- samples/subsys/usb/webusb/src/main.c | 30 +- samples/subsys/usb/webusb/src/webusb.c | 12 +- .../psa_level_1/src/psa_attestation.c | 14 +- .../psa_level_1/src/psa_attestation.h | 4 +- .../psa_level_1/src/psa_crypto.c | 10 +- .../tfm_integration/psa_level_1/src/tfm_ipc.c | 10 +- .../psa_level_1/src/util_app_cfg.c | 2 +- .../psa_level_1/src/util_app_cfg.h | 6 +- .../psa_level_1/src/util_sformat.c | 10 +- .../psa_level_1/src/util_sformat.h | 6 +- samples/tfm_integration/tfm_ipc/src/main.c | 16 +- .../prod_consumer/src/sample_driver_foo.c | 2 +- scripts/coccinelle/int_ms_to_timeout.cocci | 12 +- scripts/coccinelle/irq_lock.cocci | 6 +- .../unsigned_lesser_than_zero.cocci | 4 +- scripts/gen_cfb_font_header.py | 2 +- scripts/gen_kobject_list.py | 6 +- scripts/gen_relocate_app.py | 4 +- scripts/gen_syscalls.py | 6 +- soc/arc/snps_arc_hsdk/soc.c | 4 +- soc/arc/snps_nsim/soc.c | 4 +- soc/arm/arm/beetle/soc.c | 2 +- soc/arm/arm/beetle/soc_registers.h | 102 +- soc/arm/arm/mps2/soc.c | 10 +- soc/arm/arm/mps2/soc.h | 2 +- soc/arm/arm/mps2/soc_registers.h | 22 +- soc/arm/arm/musca_a/soc.c | 10 +- soc/arm/arm/musca_a/soc.h | 2 +- soc/arm/arm/musca_b1/soc.c | 10 +- soc/arm/arm/musca_b1/soc.h | 2 +- soc/arm/atmel_sam/common/soc_gpio.c | 14 +- soc/arm/atmel_sam/common/soc_gpio.h | 10 +- soc/arm/atmel_sam/common/soc_pmc.c | 6 +- soc/arm/atmel_sam/common/soc_pmc.h | 6 +- soc/arm/atmel_sam/sam3x/soc.c | 4 +- soc/arm/atmel_sam/sam4e/soc.c | 4 +- soc/arm/atmel_sam/sam4s/soc.c | 4 +- soc/arm/atmel_sam/same70/soc.c | 6 +- soc/arm/atmel_sam/samv71/soc.c | 6 +- soc/arm/atmel_sam0/common/soc_samd2x.c | 12 +- soc/arm/atmel_sam0/common/soc_samd5x.c | 12 +- soc/arm/bcm_vk/valkyrie/soc.c | 2 +- soc/arm/bcm_vk/viper/soc.c | 2 +- soc/arm/infineon_xmc/4xxx/soc.c | 2 +- soc/arm/microchip_mec/mec1501/device_power.c | 14 +- soc/arm/microchip_mec/mec1501/power.c | 2 +- soc/arm/microchip_mec/mec1501/soc.c | 10 +- soc/arm/nordic_nrf/nrf51/soc.c | 4 +- soc/arm/nordic_nrf/nrf52/soc.c | 4 +- soc/arm/nordic_nrf/nrf53/soc.c | 6 +- soc/arm/nordic_nrf/nrf91/soc.c | 4 +- soc/arm/nordic_nrf/validate_base_addresses.c | 2 +- soc/arm/nxp_imx/mcimx7_m4/soc_clk_freq.c | 10 +- soc/arm/nxp_imx/mcimx7_m4/soc_clk_freq.h | 18 +- soc/arm/nxp_imx/rt/soc.c | 4 +- soc/arm/nxp_imx/rt/soc.h | 8 +- soc/arm/nxp_kinetis/flash_configuration.c | 2 +- soc/arm/nxp_kinetis/k2x/soc.c | 2 +- soc/arm/nxp_kinetis/k6x/soc.c | 2 +- soc/arm/nxp_kinetis/k8x/soc.c | 2 +- soc/arm/nxp_kinetis/ke1xf/soc.c | 2 +- soc/arm/nxp_kinetis/kwx/soc_kw4xz.c | 2 +- soc/arm/nxp_lpc/lpc54xxx/soc.c | 2 +- soc/arm/st_stm32/stm32f0/soc.c | 2 +- soc/arm/st_stm32/stm32f1/soc.c | 2 +- soc/arm/st_stm32/stm32f2/soc.c | 2 +- soc/arm/st_stm32/stm32f3/soc.c | 2 +- soc/arm/st_stm32/stm32f4/soc.c | 2 +- soc/arm/st_stm32/stm32f7/soc.c | 2 +- soc/arm/st_stm32/stm32g0/soc.c | 2 +- soc/arm/st_stm32/stm32g4/soc.c | 2 +- soc/arm/st_stm32/stm32h7/soc_m4.c | 2 +- soc/arm/st_stm32/stm32h7/soc_m7.c | 2 +- soc/arm/st_stm32/stm32l0/soc.c | 2 +- soc/arm/st_stm32/stm32l1/soc.c | 2 +- soc/arm/st_stm32/stm32l4/soc.c | 2 +- soc/arm/st_stm32/stm32l5/soc.c | 2 +- soc/arm/st_stm32/stm32mp1/soc.c | 2 +- soc/arm/st_stm32/stm32wb/soc.c | 2 +- soc/arm/ti_lm3s6965/soc_config.c | 4 +- soc/arm/ti_simplelink/cc13x2_cc26x2/power.c | 6 +- soc/arm/ti_simplelink/cc32xx/soc.h | 2 +- soc/posix/inf_clock/posix_board_if.h | 2 +- soc/riscv/litex-vexriscv/soc.h | 40 +- soc/riscv/openisa_rv32m1/soc.c | 2 +- soc/riscv/openisa_rv32m1/soc.h | 6 +- soc/riscv/openisa_rv32m1/soc_context.h | 12 +- soc/riscv/riscv-privilege/common/soc_common.h | 8 +- .../riscv-privilege/common/soc_common_irq.c | 6 +- soc/x86/apollo_lake/cpu.c | 2 +- soc/xtensa/esp32/esp32-mp.c | 2 +- soc/xtensa/esp32/soc.c | 12 +- soc/xtensa/esp32/soc.h | 12 +- soc/xtensa/intel_apl_adsp/soc.c | 6 +- soc/xtensa/intel_apl_adsp/soc.h | 66 +- soc/xtensa/intel_apl_adsp/soc_mp.c | 18 +- soc/xtensa/intel_s1000/soc.c | 10 +- soc/xtensa/intel_s1000/soc.h | 80 +- soc/xtensa/intel_s1000/soc_mp.c | 12 +- .../intel_s1000/xcc/log_minimal_fixes.c | 14 +- subsys/bluetooth/common/log.c | 2 +- subsys/bluetooth/common/log.h | 2 +- subsys/bluetooth/common/rpa.c | 16 +- subsys/bluetooth/common/rpa.h | 4 +- subsys/bluetooth/controller/Kconfig | 2 +- subsys/bluetooth/controller/crypto/crypto.c | 8 +- subsys/bluetooth/controller/hal/ccm.h | 10 +- subsys/bluetooth/controller/hal/cntr.h | 8 +- subsys/bluetooth/controller/hal/debug.h | 2 +- subsys/bluetooth/controller/hal/ecb.h | 24 +- subsys/bluetooth/controller/hal/ticker.h | 6 +- subsys/bluetooth/controller/hci/hci.c | 426 ++++---- subsys/bluetooth/controller/hci/hci_driver.c | 18 +- .../bluetooth/controller/hci/hci_internal.h | 24 +- .../bluetooth/controller/hci/hci_user_ext.h | 2 +- .../controller/hci/nordic/hci_vendor.c | 6 +- .../controller/hci/nordic/hci_vendor.h | 2 +- .../controller/hci/openisa/hci_vendor.h | 2 +- subsys/bluetooth/controller/include/ll.h | 150 +-- .../controller/include/ll_settings.h | 8 +- subsys/bluetooth/controller/ll_sw/ll_addr.c | 10 +- .../bluetooth/controller/ll_sw/ll_settings.c | 10 +- subsys/bluetooth/controller/ll_sw/ll_test.h | 6 +- subsys/bluetooth/controller/ll_sw/ll_tx_pwr.c | 10 +- subsys/bluetooth/controller/ll_sw/lll.h | 80 +- subsys/bluetooth/controller/ll_sw/lll_chan.c | 58 +- subsys/bluetooth/controller/ll_sw/lll_chan.h | 8 +- subsys/bluetooth/controller/ll_sw/lll_conn.h | 98 +- .../bluetooth/controller/ll_sw/lll_filter.h | 58 +- .../controller/ll_sw/nordic/hal/nrf5/cntr.c | 10 +- .../controller/ll_sw/nordic/hal/nrf5/ecb.c | 38 +- .../controller/ll_sw/nordic/hal/nrf5/mayfly.c | 8 +- .../ll_sw/nordic/hal/nrf5/radio/radio.c | 220 ++-- .../ll_sw/nordic/hal/nrf5/radio/radio.h | 102 +- .../ll_sw/nordic/hal/nrf5/radio/radio_nrf51.h | 40 +- .../nordic/hal/nrf5/radio/radio_nrf52810.h | 76 +- .../nordic/hal/nrf5/radio/radio_nrf52811.h | 88 +- .../nordic/hal/nrf5/radio/radio_nrf52820.h | 76 +- .../nordic/hal/nrf5/radio/radio_nrf52832.h | 78 +- .../nordic/hal/nrf5/radio/radio_nrf52833.h | 86 +- .../nordic/hal/nrf5/radio/radio_nrf52840.h | 98 +- .../nordic/hal/nrf5/radio/radio_nrf5340.h | 50 +- .../nordic/hal/nrf5/radio/radio_nrf5_ppi.h | 116 +-- .../controller/ll_sw/nordic/hal/nrf5/ticker.c | 10 +- .../controller/ll_sw/nordic/hal/nrf5/ticker.h | 8 +- .../controller/ll_sw/nordic/lll/lll.c | 58 +- .../controller/ll_sw/nordic/lll/lll_adv.c | 86 +- .../controller/ll_sw/nordic/lll/lll_adv.h | 38 +- .../ll_sw/nordic/lll/lll_adv_internal.h | 8 +- .../controller/ll_sw/nordic/lll/lll_conn.c | 70 +- .../ll_sw/nordic/lll/lll_internal.h | 10 +- .../controller/ll_sw/nordic/lll/lll_master.c | 20 +- .../controller/ll_sw/nordic/lll/lll_prof.c | 26 +- .../controller/ll_sw/nordic/lll/lll_scan.c | 114 +- .../controller/ll_sw/nordic/lll/lll_scan.h | 36 +- .../controller/ll_sw/nordic/lll/lll_slave.c | 22 +- .../controller/ll_sw/nordic/lll/lll_test.c | 44 +- .../ll_sw/nordic/lll/lll_tim_internal.h | 2 +- .../ll_sw/openisa/hal/RV32M1/cntr.c | 12 +- .../controller/ll_sw/openisa/hal/RV32M1/ecb.c | 32 +- .../ll_sw/openisa/hal/RV32M1/mayfly.c | 8 +- .../ll_sw/openisa/hal/RV32M1/radio/radio.c | 308 +++--- .../ll_sw/openisa/hal/RV32M1/radio/radio.h | 104 +- .../ll_sw/openisa/hal/RV32M1/ticker.c | 10 +- .../ll_sw/openisa/hal/RV32M1/ticker.h | 8 +- .../controller/ll_sw/openisa/lll/lll.c | 52 +- .../controller/ll_sw/openisa/lll/lll_adv.c | 86 +- .../controller/ll_sw/openisa/lll/lll_adv.h | 36 +- .../ll_sw/openisa/lll/lll_adv_internal.h | 8 +- .../controller/ll_sw/openisa/lll/lll_conn.c | 64 +- .../ll_sw/openisa/lll/lll_internal.h | 10 +- .../controller/ll_sw/openisa/lll/lll_master.c | 20 +- .../controller/ll_sw/openisa/lll/lll_prof.c | 26 +- .../controller/ll_sw/openisa/lll/lll_scan.c | 114 +- .../controller/ll_sw/openisa/lll/lll_scan.h | 34 +- .../controller/ll_sw/openisa/lll/lll_slave.c | 22 +- .../controller/ll_sw/openisa/lll/lll_test.c | 44 +- .../ll_sw/openisa/lll/lll_tim_internal.h | 2 +- subsys/bluetooth/controller/ll_sw/pdu.h | 334 +++--- subsys/bluetooth/controller/ll_sw/ull.c | 94 +- subsys/bluetooth/controller/ll_sw/ull_adv.c | 188 ++-- .../bluetooth/controller/ll_sw/ull_adv_aux.c | 22 +- .../bluetooth/controller/ll_sw/ull_adv_aux.h | 20 +- .../controller/ll_sw/ull_adv_internal.h | 10 +- .../controller/ll_sw/ull_adv_types.h | 12 +- subsys/bluetooth/controller/ll_sw/ull_conn.c | 384 +++---- .../controller/ll_sw/ull_conn_internal.h | 36 +- .../controller/ll_sw/ull_conn_types.h | 258 ++--- .../bluetooth/controller/ll_sw/ull_filter.c | 198 ++-- .../bluetooth/controller/ll_sw/ull_filter.h | 8 +- .../bluetooth/controller/ll_sw/ull_internal.h | 12 +- .../bluetooth/controller/ll_sw/ull_master.c | 104 +- .../controller/ll_sw/ull_master_internal.h | 2 +- subsys/bluetooth/controller/ll_sw/ull_scan.c | 76 +- .../controller/ll_sw/ull_scan_internal.h | 20 +- .../controller/ll_sw/ull_scan_types.h | 4 +- subsys/bluetooth/controller/ll_sw/ull_sched.c | 4 +- .../controller/ll_sw/ull_sched_internal.h | 4 +- subsys/bluetooth/controller/ll_sw/ull_slave.c | 60 +- .../controller/ll_sw/ull_slave_internal.h | 6 +- subsys/bluetooth/controller/ticker/ticker.c | 434 ++++---- subsys/bluetooth/controller/ticker/ticker.h | 74 +- subsys/bluetooth/controller/util/mayfly.c | 60 +- subsys/bluetooth/controller/util/mayfly.h | 18 +- subsys/bluetooth/controller/util/mem.c | 52 +- subsys/bluetooth/controller/util/mem.h | 16 +- subsys/bluetooth/controller/util/mfifo.h | 48 +- subsys/bluetooth/controller/util/util.c | 8 +- subsys/bluetooth/controller/util/util.h | 2 +- subsys/bluetooth/host/a2dp.c | 4 +- subsys/bluetooth/host/aes_ccm.c | 46 +- subsys/bluetooth/host/at.c | 16 +- subsys/bluetooth/host/at.h | 14 +- subsys/bluetooth/host/att.c | 230 ++--- subsys/bluetooth/host/att_internal.h | 138 +-- subsys/bluetooth/host/avdtp.c | 20 +- subsys/bluetooth/host/avdtp_internal.h | 22 +- subsys/bluetooth/host/conn.c | 58 +- subsys/bluetooth/host/conn_internal.h | 78 +- subsys/bluetooth/host/crypto.c | 16 +- subsys/bluetooth/host/ecc.h | 8 +- subsys/bluetooth/host/gatt.c | 406 ++++---- subsys/bluetooth/host/gatt_internal.h | 20 +- subsys/bluetooth/host/hci_core.c | 308 +++--- subsys/bluetooth/host/hci_core.h | 54 +- subsys/bluetooth/host/hci_ecc.c | 22 +- subsys/bluetooth/host/hci_raw.c | 24 +- subsys/bluetooth/host/hfp_hf.c | 24 +- subsys/bluetooth/host/hfp_internal.h | 6 +- subsys/bluetooth/host/keys.c | 18 +- subsys/bluetooth/host/keys.h | 42 +- subsys/bluetooth/host/l2cap.c | 130 +-- subsys/bluetooth/host/l2cap_br.c | 94 +- subsys/bluetooth/host/l2cap_internal.h | 148 +-- subsys/bluetooth/host/monitor.c | 24 +- subsys/bluetooth/host/monitor.h | 30 +- subsys/bluetooth/host/rfcomm.c | 138 +-- subsys/bluetooth/host/rfcomm_internal.h | 50 +- subsys/bluetooth/host/sdp.c | 248 ++--- subsys/bluetooth/host/sdp_internal.h | 20 +- subsys/bluetooth/host/settings.c | 4 +- subsys/bluetooth/host/smp.c | 488 ++++----- subsys/bluetooth/host/smp.h | 46 +- subsys/bluetooth/host/testing.c | 16 +- subsys/bluetooth/host/testing.h | 12 +- subsys/bluetooth/host/uuid.c | 6 +- subsys/bluetooth/mesh/access.c | 72 +- subsys/bluetooth/mesh/access.h | 20 +- subsys/bluetooth/mesh/adv.c | 18 +- subsys/bluetooth/mesh/adv.h | 10 +- subsys/bluetooth/mesh/beacon.c | 30 +- subsys/bluetooth/mesh/cdb.c | 34 +- subsys/bluetooth/mesh/cfg_cli.c | 336 +++--- subsys/bluetooth/mesh/cfg_srv.c | 278 ++--- subsys/bluetooth/mesh/crypto.c | 144 +-- subsys/bluetooth/mesh/crypto.h | 126 +-- subsys/bluetooth/mesh/foundation.h | 34 +- subsys/bluetooth/mesh/friend.c | 156 +-- subsys/bluetooth/mesh/friend.h | 20 +- subsys/bluetooth/mesh/health_cli.c | 52 +- subsys/bluetooth/mesh/health_srv.c | 34 +- subsys/bluetooth/mesh/lpn.c | 34 +- subsys/bluetooth/mesh/lpn.h | 6 +- subsys/bluetooth/mesh/main.c | 14 +- subsys/bluetooth/mesh/net.c | 88 +- subsys/bluetooth/mesh/net.h | 176 ++-- subsys/bluetooth/mesh/pb_adv.c | 54 +- subsys/bluetooth/mesh/prov.c | 122 +-- subsys/bluetooth/mesh/prov.h | 8 +- subsys/bluetooth/mesh/prov_bearer.h | 4 +- subsys/bluetooth/mesh/proxy.c | 64 +- subsys/bluetooth/mesh/proxy.h | 6 +- subsys/bluetooth/mesh/settings.c | 128 +-- subsys/bluetooth/mesh/shell.c | 258 ++--- subsys/bluetooth/mesh/transport.c | 192 ++-- subsys/bluetooth/mesh/transport.h | 58 +- subsys/bluetooth/services/bas.c | 12 +- subsys/bluetooth/services/dis.c | 24 +- subsys/bluetooth/services/hrs.c | 10 +- subsys/bluetooth/shell/bredr.c | 18 +- subsys/bluetooth/shell/bt.c | 70 +- subsys/bluetooth/shell/gatt.c | 110 +- subsys/bluetooth/shell/l2cap.c | 24 +- subsys/bluetooth/shell/ll.c | 34 +- subsys/bluetooth/shell/rfcomm.c | 4 +- subsys/bluetooth/shell/ticker.c | 26 +- subsys/canbus/canopen/CO_driver.c | 34 +- subsys/canbus/canopen/CO_driver_target.h | 20 +- subsys/canbus/canopen/canopen_program.c | 26 +- subsys/canbus/canopen/canopen_storage.c | 8 +- subsys/canbus/canopen/canopen_sync.c | 10 +- subsys/canbus/isotp/isotp.c | 56 +- subsys/console/getchar.c | 6 +- subsys/console/tty.c | 24 +- subsys/debug/openocd.c | 2 +- subsys/dfu/boot/mcuboot.c | 106 +- subsys/dfu/img_util/flash_img.c | 4 +- subsys/disk/disk_access.c | 10 +- subsys/disk/disk_access_flash.c | 54 +- subsys/disk/disk_access_ram.c | 20 +- subsys/disk/disk_access_sdhc.h | 190 ++-- subsys/disk/disk_access_spi_sdhc.c | 86 +- subsys/disk/disk_access_stm32_sdmmc.c | 20 +- subsys/disk/disk_access_usdhc.c | 294 +++--- subsys/disk/fat12_ramdisk.h | 2 +- subsys/fb/cfb.c | 40 +- subsys/fb/cfb_fonts.c | 6 +- subsys/fb/cfb_shell.c | 10 +- subsys/fs/fat_fs.c | 6 +- subsys/fs/fcb/fcb.c | 14 +- subsys/fs/fcb/fcb_append.c | 6 +- subsys/fs/fcb/fcb_elem_info.c | 16 +- subsys/fs/fcb/fcb_priv.h | 22 +- subsys/fs/fuse_fs_access.c | 2 +- subsys/fs/littlefs_fs.c | 8 +- subsys/fs/nvs/nvs.c | 84 +- subsys/fs/nvs/nvs_priv.h | 14 +- subsys/fs/shell.c | 6 +- subsys/jwt/jwt.c | 20 +- subsys/logging/log_backend_native_posix.c | 22 +- subsys/logging/log_backend_net.c | 10 +- subsys/logging/log_backend_rb.c | 38 +- subsys/logging/log_backend_rtt.c | 42 +- subsys/logging/log_backend_std.h | 14 +- subsys/logging/log_backend_swo.c | 18 +- subsys/logging/log_backend_uart.c | 18 +- subsys/logging/log_backend_xtensa_sim.c | 12 +- subsys/logging/log_cmds.c | 22 +- subsys/logging/log_core.c | 166 +-- subsys/logging/log_msg.c | 52 +- subsys/logging/log_output.c | 112 +- subsys/logging/log_output_syst.c | 48 +- subsys/mgmt/serial_util.c | 28 +- subsys/mgmt/smp.c | 4 +- subsys/mgmt/smp_bt.c | 12 +- subsys/mgmt/smp_shell.c | 4 +- subsys/mgmt/smp_uart.c | 2 +- subsys/net/buf.c | 160 +-- subsys/net/hostname.c | 2 +- subsys/net/ip/6lo.c | 188 ++-- subsys/net/ip/connection.c | 28 +- subsys/net/ip/connection.h | 22 +- subsys/net/ip/dhcpv4.c | 56 +- subsys/net/ip/dhcpv4.h | 24 +- subsys/net/ip/icmpv4.c | 70 +- subsys/net/ip/icmpv4.h | 18 +- subsys/net/ip/icmpv6.c | 12 +- subsys/net/ip/icmpv6.h | 80 +- subsys/net/ip/ipv4.c | 14 +- subsys/net/ip/ipv4.h | 10 +- subsys/net/ip/ipv4_autoconf.c | 20 +- subsys/net/ip/ipv6.c | 28 +- subsys/net/ip/ipv6.h | 36 +- subsys/net/ip/ipv6_fragment.c | 52 +- subsys/net/ip/ipv6_mld.c | 12 +- subsys/net/ip/ipv6_nbr.c | 92 +- subsys/net/ip/nbr.c | 4 +- subsys/net/ip/nbr.h | 24 +- subsys/net/ip/net_context.c | 30 +- subsys/net/ip/net_core.c | 4 +- subsys/net/ip/net_if.c | 160 +-- subsys/net/ip/net_mgmt.c | 36 +- subsys/net/ip/net_pkt.c | 46 +- subsys/net/ip/net_private.h | 30 +- subsys/net/ip/net_shell.c | 82 +- subsys/net/ip/net_stats.c | 14 +- subsys/net/ip/net_stats.h | 68 +- subsys/net/ip/net_tc.c | 16 +- subsys/net/ip/net_tc_mapping.h | 56 +- subsys/net/ip/route.c | 14 +- subsys/net/ip/route.h | 6 +- subsys/net/ip/tcp.c | 92 +- subsys/net/ip/tcp2.c | 42 +- subsys/net/ip/tcp2.h | 2 +- subsys/net/ip/tcp2_priv.h | 38 +- subsys/net/ip/tcp_internal.h | 60 +- subsys/net/ip/tp.c | 14 +- subsys/net/ip/tp.h | 2 +- subsys/net/ip/tp_priv.h | 10 +- subsys/net/ip/trickle.c | 22 +- subsys/net/ip/udp.c | 10 +- subsys/net/ip/udp_internal.h | 10 +- subsys/net/ip/utils.c | 52 +- subsys/net/l2/bluetooth/bluetooth.c | 30 +- subsys/net/l2/canbus/6locan.c | 80 +- subsys/net/l2/ethernet/arp.c | 30 +- subsys/net/l2/ethernet/arp.h | 12 +- subsys/net/l2/ethernet/eth_stats.h | 4 +- subsys/net/l2/ethernet/ethernet.c | 36 +- subsys/net/l2/ethernet/ethernet_mgmt.c | 8 +- subsys/net/l2/ethernet/ethernet_stats.c | 2 +- subsys/net/l2/ethernet/gptp/gptp.c | 58 +- subsys/net/l2/ethernet/gptp/gptp_data_set.h | 124 +-- subsys/net/l2/ethernet/gptp/gptp_md.c | 16 +- subsys/net/l2/ethernet/gptp/gptp_md.h | 8 +- subsys/net/l2/ethernet/gptp/gptp_messages.c | 4 +- subsys/net/l2/ethernet/gptp/gptp_messages.h | 92 +- subsys/net/l2/ethernet/gptp/gptp_mi.c | 28 +- subsys/net/l2/ethernet/gptp/gptp_mi.h | 6 +- subsys/net/l2/ethernet/gptp/gptp_private.h | 14 +- subsys/net/l2/ethernet/gptp/gptp_state.h | 32 +- subsys/net/l2/ethernet/gptp/gptp_user_api.c | 4 +- subsys/net/l2/ethernet/lldp/lldp.c | 34 +- subsys/net/l2/ieee802154/ieee802154.c | 16 +- .../net/l2/ieee802154/ieee802154_fragment.c | 66 +- .../net/l2/ieee802154/ieee802154_fragment.h | 14 +- subsys/net/l2/ieee802154/ieee802154_frame.c | 80 +- subsys/net/l2/ieee802154/ieee802154_frame.h | 242 ++--- subsys/net/l2/ieee802154/ieee802154_mgmt.c | 42 +- .../net/l2/ieee802154/ieee802154_mgmt_priv.h | 2 +- .../l2/ieee802154/ieee802154_radio_aloha.c | 2 +- .../l2/ieee802154/ieee802154_radio_csma_ca.c | 12 +- .../l2/ieee802154/ieee802154_radio_utils.h | 2 +- .../net/l2/ieee802154/ieee802154_security.c | 38 +- .../net/l2/ieee802154/ieee802154_security.h | 22 +- subsys/net/l2/ieee802154/ieee802154_shell.c | 58 +- subsys/net/l2/ieee802154/ieee802154_utils.h | 20 +- subsys/net/l2/openthread/openthread.c | 6 +- subsys/net/l2/openthread/openthread_utils.c | 4 +- subsys/net/l2/ppp/fsm.c | 58 +- subsys/net/l2/ppp/ipcp.c | 20 +- subsys/net/l2/ppp/ipv6cp.c | 36 +- subsys/net/l2/ppp/lcp.c | 8 +- subsys/net/l2/ppp/misc.c | 6 +- subsys/net/l2/ppp/options.c | 6 +- subsys/net/l2/ppp/ppp_internal.h | 36 +- subsys/net/l2/ppp/ppp_l2.c | 8 +- subsys/net/l2/ppp/ppp_stats.c | 2 +- subsys/net/l2/ppp/ppp_stats.h | 4 +- subsys/net/l2/wifi/wifi_mgmt.c | 10 +- subsys/net/l2/wifi/wifi_shell.c | 12 +- subsys/net/lib/coap/coap.c | 196 ++-- subsys/net/lib/coap/coap_link_format.c | 76 +- subsys/net/lib/config/ieee802154_settings.c | 12 +- subsys/net/lib/config/init.c | 14 +- subsys/net/lib/config/init_clock_sntp.c | 2 +- subsys/net/lib/conn_mgr/conn_mgr.c | 2 +- subsys/net/lib/conn_mgr/events_handler.c | 12 +- subsys/net/lib/dns/dns_pack.c | 94 +- subsys/net/lib/dns/dns_pack.h | 110 +- subsys/net/lib/dns/llmnr_responder.c | 56 +- subsys/net/lib/dns/mdns_responder.c | 34 +- subsys/net/lib/dns/resolve.c | 42 +- subsys/net/lib/http/http_client.c | 12 +- subsys/net/lib/http/http_parser.c | 24 +- subsys/net/lib/http/http_parser_url.c | 4 +- subsys/net/lib/lwm2m/buf_util.h | 48 +- subsys/net/lib/lwm2m/ipso_accelerometer.c | 2 +- subsys/net/lib/lwm2m/ipso_buzzer.c | 18 +- subsys/net/lib/lwm2m/ipso_light_control.c | 20 +- subsys/net/lib/lwm2m/ipso_onoff_switch.c | 34 +- subsys/net/lib/lwm2m/ipso_push_button.c | 14 +- subsys/net/lib/lwm2m/ipso_temp_sensor.c | 14 +- subsys/net/lib/lwm2m/ipso_timer.c | 52 +- subsys/net/lib/lwm2m/lwm2m_engine.c | 330 +++--- subsys/net/lib/lwm2m/lwm2m_engine.h | 34 +- subsys/net/lib/lwm2m/lwm2m_obj_connmon.c | 14 +- subsys/net/lib/lwm2m/lwm2m_obj_device.c | 40 +- subsys/net/lib/lwm2m/lwm2m_obj_firmware.c | 34 +- .../net/lib/lwm2m/lwm2m_obj_firmware_pull.c | 14 +- subsys/net/lib/lwm2m/lwm2m_obj_location.c | 4 +- subsys/net/lib/lwm2m/lwm2m_obj_security.c | 14 +- subsys/net/lib/lwm2m/lwm2m_obj_server.c | 28 +- subsys/net/lib/lwm2m/lwm2m_object.h | 96 +- subsys/net/lib/lwm2m/lwm2m_rd_client.c | 30 +- subsys/net/lib/lwm2m/lwm2m_rw_json.c | 72 +- subsys/net/lib/lwm2m/lwm2m_rw_oma_tlv.c | 116 +-- subsys/net/lib/lwm2m/lwm2m_rw_plain_text.c | 40 +- subsys/net/lib/lwm2m/lwm2m_util.c | 46 +- subsys/net/lib/lwm2m/lwm2m_util.h | 8 +- subsys/net/lib/mqtt/mqtt.c | 16 +- subsys/net/lib/mqtt/mqtt_decoder.c | 36 +- subsys/net/lib/mqtt/mqtt_encoder.c | 58 +- subsys/net/lib/mqtt/mqtt_internal.h | 12 +- subsys/net/lib/mqtt/mqtt_os.h | 6 +- subsys/net/lib/mqtt/mqtt_rx.c | 30 +- subsys/net/lib/mqtt/mqtt_transport.c | 6 +- subsys/net/lib/mqtt/mqtt_transport.h | 36 +- .../net/lib/mqtt/mqtt_transport_socket_tcp.c | 8 +- .../net/lib/mqtt/mqtt_transport_socket_tls.c | 8 +- .../net/lib/mqtt/mqtt_transport_websocket.c | 14 +- subsys/net/lib/openthread/platform/alarm.c | 4 +- subsys/net/lib/openthread/platform/flash.c | 18 +- subsys/net/lib/openthread/platform/logging.c | 2 +- subsys/net/lib/openthread/platform/radio.c | 46 +- subsys/net/lib/openthread/platform/settings.c | 6 +- subsys/net/lib/openthread/platform/spi.c | 8 +- subsys/net/lib/openthread/platform/uart.c | 24 +- subsys/net/lib/sntp/sntp.c | 20 +- subsys/net/lib/sntp/sntp_pkt.h | 30 +- subsys/net/lib/sntp/sntp_simple.c | 10 +- subsys/net/lib/sockets/getaddrinfo.c | 6 +- subsys/net/lib/sockets/socketpair.c | 8 +- subsys/net/lib/sockets/sockets.c | 12 +- subsys/net/lib/sockets/sockets_net_mgmt.c | 10 +- subsys/net/lib/sockets/sockets_select.c | 12 +- subsys/net/lib/sockets/sockets_tls.c | 22 +- subsys/net/lib/socks/socks.c | 12 +- subsys/net/lib/socks/socks_internal.h | 34 +- subsys/net/lib/tftp/tftp_client.c | 30 +- subsys/net/lib/tftp/tftp_client.h | 2 +- subsys/net/lib/websocket/websocket.c | 58 +- subsys/net/lib/websocket/websocket_internal.h | 22 +- subsys/power/device.c | 6 +- subsys/power/device_pm.c | 6 +- subsys/power/policy/pm_policy.h | 2 +- subsys/power/policy/policy_dummy.c | 4 +- subsys/power/policy/policy_residency.c | 2 +- .../policy/policy_residency_cc13x2_cc26x2.c | 4 +- subsys/power/power.c | 12 +- subsys/random/rand32_ctr_drbg.c | 6 +- subsys/random/rand32_entropy_device.c | 16 +- subsys/random/rand32_timer.c | 10 +- subsys/random/rand32_xoroshiro128.c | 30 +- .../settings/include/settings/settings_nvs.h | 2 +- subsys/settings/src/settings_fcb.c | 8 +- subsys/settings/src/settings_line.c | 14 +- subsys/settings/src/settings_nvs.c | 18 +- subsys/settings/src/settings_priv.h | 4 +- subsys/shell/modules/device_service.c | 2 +- subsys/shell/modules/kernel_service.c | 4 +- subsys/shell/shell.c | 60 +- subsys/shell/shell_cmds.c | 12 +- subsys/shell/shell_fprintf.c | 2 +- subsys/shell/shell_help.c | 14 +- subsys/shell/shell_history.c | 24 +- subsys/shell/shell_log_backend.c | 28 +- subsys/shell/shell_ops.c | 44 +- subsys/shell/shell_ops.h | 14 +- subsys/shell/shell_rtt.c | 4 +- subsys/shell/shell_telnet.c | 14 +- subsys/shell/shell_telnet_protocol.h | 6 +- subsys/shell/shell_uart.c | 22 +- subsys/shell/shell_utils.c | 66 +- subsys/shell/shell_utils.h | 22 +- subsys/shell/shell_wildcard.c | 8 +- subsys/stats/stats.c | 14 +- subsys/storage/flash_map/flash_map.c | 18 +- subsys/storage/stream/stream_flash.c | 6 +- subsys/testsuite/coverage/coverage.c | 50 +- subsys/testsuite/coverage/coverage.h | 4 +- subsys/testsuite/include/test_utils.h | 14 +- subsys/testsuite/include/timestamp.h | 12 +- subsys/testsuite/ztest/include/arch/cpu.h | 2 +- subsys/testsuite/ztest/include/ztest_mock.h | 2 +- subsys/testsuite/ztest/include/ztest_test.h | 2 +- subsys/testsuite/ztest/src/ztest.c | 8 +- subsys/testsuite/ztest/src/ztest_mock.c | 2 +- subsys/tracing/cpu_stats.c | 8 +- subsys/tracing/ctf/ctf_top.c | 24 +- subsys/tracing/ctf/ctf_top.h | 72 +- subsys/tracing/include/tracing_backend.h | 4 +- subsys/tracing/include/tracing_buffer.h | 18 +- subsys/tracing/include/tracing_core.h | 4 +- subsys/tracing/include/tracing_cpu_stats.h | 8 +- .../tracing/include/tracing_format_common.h | 6 +- subsys/tracing/sysview/sysview.c | 10 +- subsys/tracing/sysview/tracing_sysview.h | 8 +- subsys/tracing/tracing_backend_posix.c | 2 +- subsys/tracing/tracing_backend_uart.c | 12 +- subsys/tracing/tracing_backend_usb.c | 14 +- subsys/tracing/tracing_buffer.c | 22 +- subsys/tracing/tracing_core.c | 8 +- subsys/tracing/tracing_format_async.c | 4 +- subsys/tracing/tracing_format_common.c | 20 +- subsys/tracing/tracing_format_sync.c | 12 +- subsys/usb/bos.c | 8 +- subsys/usb/class/audio/audio.c | 114 +- subsys/usb/class/audio/usb_audio_internal.h | 156 +-- subsys/usb/class/bluetooth.c | 16 +- subsys/usb/class/bt_h4.c | 10 +- subsys/usb/class/cdc_acm.c | 50 +- subsys/usb/class/hid/core.c | 88 +- subsys/usb/class/loopback.c | 14 +- subsys/usb/class/mass_storage.c | 82 +- subsys/usb/class/netusb/function_ecm.c | 32 +- subsys/usb/class/netusb/function_eem.c | 38 +- subsys/usb/class/netusb/function_rndis.c | 122 +-- subsys/usb/class/netusb/function_rndis.h | 138 +-- subsys/usb/class/netusb/netusb.c | 2 +- subsys/usb/class/usb_dfu.c | 64 +- subsys/usb/os_desc.c | 4 +- subsys/usb/os_desc.h | 10 +- subsys/usb/usb_descriptor.c | 62 +- subsys/usb/usb_descriptor.h | 8 +- subsys/usb/usb_device.c | 120 +-- subsys/usb/usb_transfer.c | 26 +- .../libcxx/src/main.cpp | 4 +- tests/arch/arm/arm_ramfunc/src/arm_ramfunc.c | 10 +- .../arm/arm_runtime_nmi/src/arm_runtime_nmi.c | 2 +- .../arm/arm_thread_swap/src/arm_syscalls.c | 12 +- .../x86/boot_page_table/src/boot_page_table.c | 26 +- tests/arch/x86/info/src/timer.c | 8 +- tests/arch/x86/static_idt/src/main.c | 6 +- .../x86/x86_mmu_api/src/userbuffer_validate.c | 14 +- tests/benchmarks/app_kernel/src/fifo_b.c | 2 +- tests/benchmarks/app_kernel/src/mailbox_b.c | 12 +- tests/benchmarks/app_kernel/src/mailbox_r.c | 2 +- tests/benchmarks/app_kernel/src/master.c | 2 +- tests/benchmarks/app_kernel/src/master.h | 4 +- tests/benchmarks/app_kernel/src/memmap_b.c | 2 +- tests/benchmarks/app_kernel/src/mempool_b.c | 4 +- tests/benchmarks/app_kernel/src/mutex_b.c | 2 +- tests/benchmarks/app_kernel/src/pipe_b.c | 16 +- tests/benchmarks/app_kernel/src/sema_b.c | 2 +- tests/benchmarks/boot_time/src/main.c | 20 +- .../benchmarks/cmsis_dsp/basicmath/src/f32.c | 20 +- .../benchmarks/cmsis_dsp/basicmath/src/q15.c | 16 +- .../benchmarks/cmsis_dsp/basicmath/src/q31.c | 16 +- tests/benchmarks/cmsis_dsp/basicmath/src/q7.c | 16 +- .../cmsis_dsp/common/benchmark_common.h | 12 +- .../latency_measure/src/coop_ctx_switch.c | 8 +- .../latency_measure/src/int_to_thread.c | 6 +- .../latency_measure/src/int_to_thread_evt.c | 6 +- tests/benchmarks/latency_measure/src/main.c | 2 +- .../latency_measure/src/sema_lock_release.c | 8 +- .../latency_measure/src/thread_switch_yield.c | 12 +- .../latency_measure/src/timing_info.h | 6 +- tests/benchmarks/latency_measure/src/utils.h | 2 +- tests/benchmarks/mbedtls/src/benchmark.c | 4 +- tests/benchmarks/sched/src/main.c | 10 +- tests/benchmarks/sys_kernel/src/lifo.c | 2 +- tests/benchmarks/sys_kernel/src/mwfifo.c | 2 +- tests/benchmarks/sys_kernel/src/sema.c | 2 +- tests/benchmarks/sys_kernel/src/stack.c | 2 +- tests/benchmarks/sys_kernel/src/syskernel.c | 10 +- tests/benchmarks/sys_kernel/src/syskernel.h | 8 +- .../benchmarks/timing_info/src/arch/x86/tsc.c | 22 +- .../timing_info/src/main_benchmark.c | 2 +- .../timing_info/src/msg_passing_bench.c | 84 +- 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tests/drivers/can/api/src/main.c | 12 +- .../src/test_clock_control.c | 18 +- .../src/test_nrf_clock_calibration.c | 6 +- .../counter_basic_api/src/test_counter.c | 62 +- tests/drivers/counter/counter_cmos/src/main.c | 2 +- .../fixed_top/src/test_counter_fixed_top.c | 4 +- .../maxim_ds3231_api/src/test_counter.c | 56 +- tests/drivers/dac/dac_loopback/src/test_dac.c | 2 +- .../dma/chan_blen_transfer/src/test_dma.c | 8 +- tests/drivers/dma/loop_transfer/src/dma.c | 16 +- tests/drivers/eeprom/src/main.c | 14 +- tests/drivers/entropy/api/src/main.c | 2 +- tests/drivers/flash_simulator/src/main.c | 24 +- tests/drivers/gpio/gpio_basic_api/src/main.c | 2 +- .../gpio_basic_api/src/test_callback_manage.c | 6 +- .../src/test_callback_trigger.c | 4 +- .../gpio/gpio_basic_api/src/test_deprecated.c | 2 +- tests/drivers/hwinfo/api/src/main.c | 6 +- tests/drivers/i2c/i2c_api/src/test_i2c.c | 2 +- .../i2c/i2c_slave_api/common/i2c_virtual.c | 10 +- tests/drivers/i2c/i2c_slave_api/src/main.c | 18 +- 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.../canbus/isotp/implementation/src/main.c | 22 +- .../isotp/implementation/src/random_data.h | 2 +- tests/subsys/dfu/img_util/src/main.c | 8 +- tests/subsys/dfu/mcuboot/src/main.c | 12 +- .../src/disk_access_test_drv.c | 20 +- tests/subsys/fs/fcb/src/fcb_test_append.c | 2 +- .../subsys/fs/fcb/src/fcb_test_append_fill.c | 2 +- tests/subsys/fs/fcb/src/fcb_test_last_of_n.c | 6 +- tests/subsys/fs/fcb/src/fcb_test_len.c | 6 +- .../fs/fcb/src/fcb_test_multiple_scratch.c | 2 +- tests/subsys/fs/fcb/src/fcb_test_reset.c | 2 +- tests/subsys/fs/fcb/src/fcb_test_rotate.c | 2 +- tests/subsys/fs/fcb/src/main.c | 6 +- tests/subsys/fs/littlefs/src/test_lfs_basic.c | 2 +- tests/subsys/fs/littlefs/src/test_lfs_perf.c | 16 +- tests/subsys/fs/littlefs/src/testfs_lfs.c | 6 +- tests/subsys/fs/littlefs/src/testfs_util.c | 16 +- tests/subsys/fs/littlefs/src/testfs_util.h | 12 +- .../subsys/fs/multi-fs/src/test_ram_backend.c | 2 +- tests/subsys/fs/nvs/src/main.c | 108 +- .../logging/log_core/src/log_core_test.c | 44 +- .../log_immediate/src/log_immediate_test.c | 2 +- .../subsys/logging/log_msg/src/log_msg_test.c | 24 +- .../logging/log_output/src/log_output_test.c | 12 +- tests/subsys/openthread/radio_test.c | 60 +- tests/subsys/settings/fcb/src/settings_test.h | 8 +- .../fcb/src/settings_test_compress_deleted.c | 4 +- .../settings/fcb/src/settings_test_fcb.c | 10 +- .../fcb/src/settings_test_save_one_fcb.c | 2 +- .../fcb_init/src/settings_test_fcb_init.c | 8 +- .../settings/fs/include/settings_test_fs.h | 8 +- .../fs/src/settings_test_compress_file.c | 2 +- .../subsys/settings/fs/src/settings_test_fs.c | 8 +- .../fs/src/settings_test_save_one_file.c | 2 +- .../functional/src/settings_basic_test.c | 28 +- tests/subsys/settings/nvs/src/settings_test.h | 8 +- .../settings/nvs/src/settings_test_nvs.c | 8 +- tests/subsys/settings/src/settings_enc.c | 8 +- .../settings/src/settings_test_getset_int.c | 2 +- .../settings/src/settings_test_getset_int64.c | 14 +- .../shell_history/src/shell_history_test.c | 34 +- tests/subsys/storage/flash_map/src/main.c | 6 +- .../storage/stream/stream_flash/src/main.c | 14 +- tests/subsys/usb/bos/src/test_bos.c | 6 +- .../usb/desc_sections/src/desc_sections.c | 16 +- tests/subsys/usb/device/src/main.c | 12 +- tests/subsys/usb/os_desc/src/usb_osdesc.c | 42 +- tests/unit/crc/main.c | 66 +- tests/unit/intmath/main.c | 4 +- tests/unit/math_extras/tests.inc | 8 +- tests/unit/timeutil/test_s64.c | 4 +- tests/unit/util/main.c | 34 +- 2364 files changed, 32505 insertions(+), 32505 deletions(-) diff --git a/arch/arc/core/arc_connect.c b/arch/arc/core/arc_connect.c index 030f0e52b0..76a4e5a713 100644 --- a/arch/arc/core/arc_connect.c +++ b/arch/arc/core/arc_connect.c @@ -24,7 +24,7 @@ static struct k_spinlock arc_connect_spinlock; /* Generate an inter-core interrupt to the target core */ -void z_arc_connect_ici_generate(u32_t core) +void z_arc_connect_ici_generate(uint32_t core) { LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_GENERATE_IRQ, core); @@ -32,7 +32,7 @@ void z_arc_connect_ici_generate(u32_t core) } /* Acknowledge the inter-core interrupt raised by core */ -void z_arc_connect_ici_ack(u32_t core) +void z_arc_connect_ici_ack(uint32_t core) { LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_GENERATE_ACK, core); @@ -40,9 +40,9 @@ void z_arc_connect_ici_ack(u32_t core) } /* Read inter-core interrupt status */ -u32_t z_arc_connect_ici_read_status(u32_t core) +uint32_t z_arc_connect_ici_read_status(uint32_t core) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_READ_STATUS, core); @@ -53,9 +53,9 @@ u32_t z_arc_connect_ici_read_status(u32_t core) } /* Check the source of inter-core interrupt */ -u32_t z_arc_connect_ici_check_src(void) +uint32_t z_arc_connect_ici_check_src(void) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_INTRPT_CHECK_SOURCE, 0); @@ -68,7 +68,7 @@ u32_t z_arc_connect_ici_check_src(void) /* Clear the inter-core interrupt */ void z_arc_connect_ici_clear(void) { - u32_t cpu, c; + uint32_t cpu, c; LOCKED(&arc_connect_spinlock) { @@ -89,7 +89,7 @@ void z_arc_connect_ici_clear(void) } /* Reset the cores in core_mask */ -void z_arc_connect_debug_reset(u32_t core_mask) +void z_arc_connect_debug_reset(uint32_t core_mask) { LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_RESET, @@ -98,7 +98,7 @@ void z_arc_connect_debug_reset(u32_t core_mask) } /* Halt the cores in core_mask */ -void z_arc_connect_debug_halt(u32_t core_mask) +void z_arc_connect_debug_halt(uint32_t core_mask) { LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_HALT, @@ -107,7 +107,7 @@ void z_arc_connect_debug_halt(u32_t core_mask) } /* Run the cores in core_mask */ -void z_arc_connect_debug_run(u32_t core_mask) +void z_arc_connect_debug_run(uint32_t core_mask) { LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_RUN, @@ -116,7 +116,7 @@ void z_arc_connect_debug_run(u32_t core_mask) } /* Set core mask */ -void z_arc_connect_debug_mask_set(u32_t core_mask, u32_t mask) +void z_arc_connect_debug_mask_set(uint32_t core_mask, uint32_t mask) { LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_SET_MASK, @@ -125,9 +125,9 @@ void z_arc_connect_debug_mask_set(u32_t core_mask, u32_t mask) } /* Read core mask */ -u32_t z_arc_connect_debug_mask_read(u32_t core_mask) +uint32_t z_arc_connect_debug_mask_read(uint32_t core_mask) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_READ_MASK, @@ -141,7 +141,7 @@ u32_t z_arc_connect_debug_mask_read(u32_t core_mask) /* * Select cores that should be halted if the core issuing the command is halted */ -void z_arc_connect_debug_select_set(u32_t core_mask) +void z_arc_connect_debug_select_set(uint32_t core_mask) { LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd_data(ARC_CONNECT_CMD_DEBUG_SET_SELECT, @@ -150,9 +150,9 @@ void z_arc_connect_debug_select_set(u32_t core_mask) } /* Read the select value */ -u32_t z_arc_connect_debug_select_read(void) +uint32_t z_arc_connect_debug_select_read(void) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_DEBUG_READ_SELECT, 0); @@ -163,9 +163,9 @@ u32_t z_arc_connect_debug_select_read(void) } /* Read the status, halt or run of all cores in the system */ -u32_t z_arc_connect_debug_en_read(void) +uint32_t z_arc_connect_debug_en_read(void) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_DEBUG_READ_EN, 0); @@ -176,9 +176,9 @@ u32_t z_arc_connect_debug_en_read(void) } /* Read the last command sent */ -u32_t z_arc_connect_debug_cmd_read(void) +uint32_t z_arc_connect_debug_cmd_read(void) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_DEBUG_READ_CMD, 0); @@ -189,9 +189,9 @@ u32_t z_arc_connect_debug_cmd_read(void) } /* Read the value of internal MCD_CORE register */ -u32_t z_arc_connect_debug_core_read(void) +uint32_t z_arc_connect_debug_core_read(void) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_DEBUG_READ_CORE, 0); @@ -210,11 +210,11 @@ void z_arc_connect_gfrc_clear(void) } /* Read total 64 bits of global free running counter */ -u64_t z_arc_connect_gfrc_read(void) +uint64_t z_arc_connect_gfrc_read(void) { - u32_t low; - u32_t high; - u32_t key; + uint32_t low; + uint32_t high; + uint32_t key; /* * each core has its own arc connect interface, i.e., @@ -233,7 +233,7 @@ u64_t z_arc_connect_gfrc_read(void) arch_irq_unlock(key); - return (((u64_t)high) << 32) | low; + return (((uint64_t)high) << 32) | low; } /* Enable global free running counter */ @@ -253,7 +253,7 @@ void z_arc_connect_gfrc_disable(void) } /* Disable global free running counter */ -void z_arc_connect_gfrc_core_set(u32_t core_mask) +void z_arc_connect_gfrc_core_set(uint32_t core_mask) { LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd_data(ARC_CONNECT_CMD_GFRC_SET_CORE, @@ -262,9 +262,9 @@ void z_arc_connect_gfrc_core_set(u32_t core_mask) } /* Set the relevant cores to halt global free running counter */ -u32_t z_arc_connect_gfrc_halt_read(void) +uint32_t z_arc_connect_gfrc_halt_read(void) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_READ_HALT, 0); @@ -275,9 +275,9 @@ u32_t z_arc_connect_gfrc_halt_read(void) } /* Read the internal CORE register */ -u32_t z_arc_connect_gfrc_core_read(void) +uint32_t z_arc_connect_gfrc_core_read(void) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_GFRC_READ_CORE, 0); @@ -304,9 +304,9 @@ void z_arc_connect_idu_disable(void) } /* Read enable status of interrupt distribute unit */ -u32_t z_arc_connect_idu_read_enable(void) +uint32_t z_arc_connect_idu_read_enable(void) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_ENABLE, 0); @@ -320,8 +320,8 @@ u32_t z_arc_connect_idu_read_enable(void) * Set the triggering mode and distribution mode for the specified common * interrupt */ -void z_arc_connect_idu_set_mode(u32_t irq_num, - u16_t trigger_mode, u16_t distri_mode) +void z_arc_connect_idu_set_mode(uint32_t irq_num, + uint16_t trigger_mode, uint16_t distri_mode) { LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd_data(ARC_CONNECT_CMD_IDU_SET_MODE, @@ -330,9 +330,9 @@ void z_arc_connect_idu_set_mode(u32_t irq_num, } /* Read the internal MODE register of the specified common interrupt */ -u32_t z_arc_connect_idu_read_mode(u32_t irq_num) +uint32_t z_arc_connect_idu_read_mode(uint32_t irq_num) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_MODE, irq_num); @@ -346,7 +346,7 @@ u32_t z_arc_connect_idu_read_mode(u32_t irq_num) * Set the target cores to receive the specified common interrupt * when it is triggered */ -void z_arc_connect_idu_set_dest(u32_t irq_num, u32_t core_mask) +void z_arc_connect_idu_set_dest(uint32_t irq_num, uint32_t core_mask) { LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd_data(ARC_CONNECT_CMD_IDU_SET_DEST, @@ -355,9 +355,9 @@ void z_arc_connect_idu_set_dest(u32_t irq_num, u32_t core_mask) } /* Read the internal DEST register of the specified common interrupt */ -u32_t z_arc_connect_idu_read_dest(u32_t irq_num) +uint32_t z_arc_connect_idu_read_dest(uint32_t irq_num) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_DEST, irq_num); @@ -368,7 +368,7 @@ u32_t z_arc_connect_idu_read_dest(u32_t irq_num) } /* Assert the specified common interrupt */ -void z_arc_connect_idu_gen_cirq(u32_t irq_num) +void z_arc_connect_idu_gen_cirq(uint32_t irq_num) { LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_GEN_CIRQ, irq_num); @@ -376,7 +376,7 @@ void z_arc_connect_idu_gen_cirq(u32_t irq_num) } /* Acknowledge the specified common interrupt */ -void z_arc_connect_idu_ack_cirq(u32_t irq_num) +void z_arc_connect_idu_ack_cirq(uint32_t irq_num) { LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_ACK_CIRQ, irq_num); @@ -384,9 +384,9 @@ void z_arc_connect_idu_ack_cirq(u32_t irq_num) } /* Read the internal STATUS register of the specified common interrupt */ -u32_t z_arc_connect_idu_check_status(u32_t irq_num) +uint32_t z_arc_connect_idu_check_status(uint32_t irq_num) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_CHECK_STATUS, irq_num); @@ -397,9 +397,9 @@ u32_t z_arc_connect_idu_check_status(u32_t irq_num) } /* Read the internal SOURCE register of the specified common interrupt */ -u32_t z_arc_connect_idu_check_source(u32_t irq_num) +uint32_t z_arc_connect_idu_check_source(uint32_t irq_num) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_CHECK_SOURCE, irq_num); @@ -410,7 +410,7 @@ u32_t z_arc_connect_idu_check_source(u32_t irq_num) } /* Mask or unmask the specified common interrupt */ -void z_arc_connect_idu_set_mask(u32_t irq_num, u32_t mask) +void z_arc_connect_idu_set_mask(uint32_t irq_num, uint32_t mask) { LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd_data(ARC_CONNECT_CMD_IDU_SET_MASK, @@ -419,9 +419,9 @@ void z_arc_connect_idu_set_mask(u32_t irq_num, u32_t mask) } /* Read the internal MASK register of the specified common interrupt */ -u32_t z_arc_connect_idu_read_mask(u32_t irq_num) +uint32_t z_arc_connect_idu_read_mask(uint32_t irq_num) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_READ_MASK, irq_num); @@ -435,9 +435,9 @@ u32_t z_arc_connect_idu_read_mask(u32_t irq_num) * Check if it is the first-acknowledging core to the common interrupt * if IDU is programmed in the first-acknowledged mode */ -u32_t z_arc_connect_idu_check_first(u32_t irq_num) +uint32_t z_arc_connect_idu_check_first(uint32_t irq_num) { - u32_t ret = 0; + uint32_t ret = 0; LOCKED(&arc_connect_spinlock) { z_arc_connect_cmd(ARC_CONNECT_CMD_IDU_CHECK_FIRST, irq_num); diff --git a/arch/arc/core/arc_smp.c b/arch/arc/core/arc_smp.c index 35069be880..8232824ba5 100644 --- a/arch/arc/core/arc_smp.c +++ b/arch/arc/core/arc_smp.c @@ -35,7 +35,7 @@ volatile struct { * master core that it's waken * */ -volatile u32_t arc_cpu_wake_flag; +volatile uint32_t arc_cpu_wake_flag; volatile char *arc_cpu_sp; /* @@ -98,7 +98,7 @@ static void sched_ipi_handler(void *unused) /* arch implementation of sched_ipi */ void arch_sched_ipi(void) { - u32_t i; + uint32_t i; /* broadcast sched_ipi request to other cores * if the target is current core, hardware will ignore it diff --git a/arch/arc/core/cache.c b/arch/arc/core/cache.c index 3c0d466fb3..a59886dc1c 100644 --- a/arch/arc/core/cache.c +++ b/arch/arc/core/cache.c @@ -55,7 +55,7 @@ static bool dcache_available(void) return (val == 0) ? false : true; } -static void dcache_dc_ctrl(u32_t dcache_en_mask) +static void dcache_dc_ctrl(uint32_t dcache_en_mask) { if (dcache_available()) { z_arc_v2_aux_reg_write(_ARC_V2_DC_CTRL, dcache_en_mask); @@ -84,9 +84,9 @@ static void dcache_enable(void) * * @return N/A */ -static void dcache_flush_mlines(u32_t start_addr, u32_t size) +static void dcache_flush_mlines(uint32_t start_addr, uint32_t size) { - u32_t end_addr; + uint32_t end_addr; unsigned int key; if (!dcache_available() || (size == 0U)) { @@ -94,7 +94,7 @@ static void dcache_flush_mlines(u32_t start_addr, u32_t size) } end_addr = start_addr + size - 1; - start_addr &= (u32_t)(~(DCACHE_LINE_SIZE - 1)); + start_addr &= (uint32_t)(~(DCACHE_LINE_SIZE - 1)); key = arch_irq_lock(); /* --enter critical section-- */ @@ -137,7 +137,7 @@ static void dcache_flush_mlines(u32_t start_addr, u32_t size) void sys_cache_flush(vaddr_t start_addr, size_t size) { - dcache_flush_mlines((u32_t)start_addr, (u32_t)size); + dcache_flush_mlines((uint32_t)start_addr, (uint32_t)size); } @@ -145,7 +145,7 @@ void sys_cache_flush(vaddr_t start_addr, size_t size) size_t sys_cache_line_size; static void init_dcache_line_size(void) { - u32_t val; + uint32_t val; val = z_arc_v2_aux_reg_read(_ARC_V2_D_CACHE_BUILD); __ASSERT((val&0xff) != 0U, "d-cache is not present"); diff --git a/arch/arc/core/fault.c b/arch/arc/core/fault.c index 32b9888426..b2465f734c 100644 --- a/arch/arc/core/fault.c +++ b/arch/arc/core/fault.c @@ -71,7 +71,7 @@ static const struct z_exc_handle exceptions[] = { * @return The lowest allowed stack frame pointer, if error is a * thread stack corruption, otherwise return 0. */ -static u32_t z_check_thread_stack_fail(const u32_t fault_addr, u32_t sp) +static uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, uint32_t sp) { const struct k_thread *thread = _current; @@ -89,8 +89,8 @@ static u32_t z_check_thread_stack_fail(const u32_t fault_addr, u32_t sp) #else sp = z_arc_v2_aux_reg_read(_ARC_V2_USER_SP); #endif - if (sp <= (u32_t)thread->stack_obj) { - return (u32_t)thread->stack_obj; + if (sp <= (uint32_t)thread->stack_obj) { + return (uint32_t)thread->stack_obj; } } else { /* User thread in privilege mode */ @@ -103,10 +103,10 @@ static u32_t z_check_thread_stack_fail(const u32_t fault_addr, u32_t sp) } } else { /* Supervisor thread */ - if (IS_MPU_GUARD_VIOLATION((u32_t)thread->stack_obj, + if (IS_MPU_GUARD_VIOLATION((uint32_t)thread->stack_obj, fault_addr, sp)) { /* Supervisor thread stack corruption */ - return (u32_t)thread->stack_obj + STACK_GUARD_SIZE; + return (uint32_t)thread->stack_obj + STACK_GUARD_SIZE; } } #else /* CONFIG_USERSPACE */ @@ -129,7 +129,7 @@ static u32_t z_check_thread_stack_fail(const u32_t fault_addr, u32_t sp) * These codes and parameters do not have associated* names in * the technical manual, just switch on the values in Table 6-5 */ -static const char *get_protv_access_err(u32_t parameter) +static const char *get_protv_access_err(uint32_t parameter) { switch (parameter) { case 0x1: @@ -151,7 +151,7 @@ static const char *get_protv_access_err(u32_t parameter) } } -static void dump_protv_exception(u32_t cause, u32_t parameter) +static void dump_protv_exception(uint32_t cause, uint32_t parameter) { switch (cause) { case 0x0: @@ -185,7 +185,7 @@ static void dump_protv_exception(u32_t cause, u32_t parameter) } } -static void dump_machine_check_exception(u32_t cause, u32_t parameter) +static void dump_machine_check_exception(uint32_t cause, uint32_t parameter) { switch (cause) { case 0x0: @@ -233,7 +233,7 @@ static void dump_machine_check_exception(u32_t cause, u32_t parameter) } } -static void dump_privilege_exception(u32_t cause, u32_t parameter) +static void dump_privilege_exception(uint32_t cause, uint32_t parameter) { switch (cause) { case 0x0: @@ -289,7 +289,7 @@ static void dump_privilege_exception(u32_t cause, u32_t parameter) } } -static void dump_exception_info(u32_t vector, u32_t cause, u32_t parameter) +static void dump_exception_info(uint32_t vector, uint32_t cause, uint32_t parameter) { if (vector >= 0x10 && vector <= 0xFF) { LOG_ERR("interrupt %u", vector); @@ -363,19 +363,19 @@ static void dump_exception_info(u32_t vector, u32_t cause, u32_t parameter) * invokes the user provided routine k_sys_fatal_error_handler() which is * responsible for implementing the error handling policy. */ -void _Fault(z_arch_esf_t *esf, u32_t old_sp) +void _Fault(z_arch_esf_t *esf, uint32_t old_sp) { - u32_t vector, cause, parameter; - u32_t exc_addr = z_arc_v2_aux_reg_read(_ARC_V2_EFA); - u32_t ecr = z_arc_v2_aux_reg_read(_ARC_V2_ECR); + uint32_t vector, cause, parameter; + uint32_t exc_addr = z_arc_v2_aux_reg_read(_ARC_V2_EFA); + uint32_t ecr = z_arc_v2_aux_reg_read(_ARC_V2_ECR); #ifdef CONFIG_USERSPACE for (int i = 0; i < ARRAY_SIZE(exceptions); i++) { - u32_t start = (u32_t)exceptions[i].start; - u32_t end = (u32_t)exceptions[i].end; + uint32_t start = (uint32_t)exceptions[i].start; + uint32_t end = (uint32_t)exceptions[i].end; if (esf->pc >= start && esf->pc < end) { - esf->pc = (u32_t)(exceptions[i].fixup); + esf->pc = (uint32_t)(exceptions[i].fixup); return; } } diff --git a/arch/arc/core/irq_manage.c b/arch/arc/core/irq_manage.c index c1db189b82..a5db0c74d4 100644 --- a/arch/arc/core/irq_manage.c +++ b/arch/arc/core/irq_manage.c @@ -137,7 +137,7 @@ int arch_irq_is_enabled(unsigned int irq) * @return N/A */ -void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags) +void z_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags) { ARG_UNUSED(flags); @@ -174,7 +174,7 @@ void z_irq_spurious(void *unused) #ifdef CONFIG_DYNAMIC_INTERRUPTS int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, void (*routine)(void *parameter), void *parameter, - u32_t flags) + uint32_t flags) { z_isr_install(irq, routine, parameter); z_irq_priority_set(irq, priority, flags); diff --git a/arch/arc/core/mpu/arc_core_mpu.c b/arch/arc/core/mpu/arc_core_mpu.c index db4c7d6f0b..f8c0977167 100644 --- a/arch/arc/core/mpu/arc_core_mpu.c +++ b/arch/arc/core/mpu/arc_core_mpu.c @@ -36,7 +36,7 @@ int arch_mem_domain_max_partitions_get(void) * Reset MPU region for a single memory partition */ void arch_mem_domain_partition_remove(struct k_mem_domain *domain, - u32_t partition_id) + uint32_t partition_id) { if (_current->mem_domain_info.mem_domain != domain) { return; @@ -76,7 +76,7 @@ void arch_mem_domain_destroy(struct k_mem_domain *domain) } void arch_mem_domain_partition_add(struct k_mem_domain *domain, - u32_t partition_id) + uint32_t partition_id) { /* No-op on this architecture */ } diff --git a/arch/arc/core/mpu/arc_mpu.c b/arch/arc/core/mpu/arc_mpu.c index 53051d4671..f031a7e79f 100644 --- a/arch/arc/core/mpu/arc_mpu.c +++ b/arch/arc/core/mpu/arc_mpu.c @@ -21,20 +21,20 @@ LOG_MODULE_REGISTER(mpu); * @brief Get the number of supported MPU regions * */ -static inline u8_t get_num_regions(void) +static inline uint8_t get_num_regions(void) { - u32_t num = z_arc_v2_aux_reg_read(_ARC_V2_MPU_BUILD); + uint32_t num = z_arc_v2_aux_reg_read(_ARC_V2_MPU_BUILD); num = (num & 0xFF00U) >> 8U; - return (u8_t)num; + return (uint8_t)num; } /** * This internal function is utilized by the MPU driver to parse the intent * type (i.e. THREAD_STACK_REGION) and return the correct parameter set. */ -static inline u32_t get_region_attr_by_type(u32_t type) +static inline uint32_t get_region_attr_by_type(uint32_t type) { switch (type) { case THREAD_STACK_USER_REGION: diff --git a/arch/arc/core/mpu/arc_mpu_v2_internal.h b/arch/arc/core/mpu/arc_mpu_v2_internal.h index 640ce8666f..c4b1be8a82 100644 --- a/arch/arc/core/mpu/arc_mpu_v2_internal.h +++ b/arch/arc/core/mpu/arc_mpu_v2_internal.h @@ -26,10 +26,10 @@ /** * This internal function initializes a MPU region */ -static inline void _region_init(u32_t index, u32_t region_addr, u32_t size, - u32_t region_attr) +static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size, + uint32_t region_attr) { - u8_t bits = find_msb_set(size) - 1; + uint8_t bits = find_msb_set(size) - 1; index = index * 2U; @@ -57,7 +57,7 @@ static inline void _region_init(u32_t index, u32_t region_addr, u32_t size, * This internal function is utilized by the MPU driver to parse the intent * type (i.e. THREAD_STACK_REGION) and return the correct region index. */ -static inline int get_region_index_by_type(u32_t type) +static inline int get_region_index_by_type(uint32_t type) { /* * The new MPU regions are allocated per type after the statically @@ -90,7 +90,7 @@ static inline int get_region_index_by_type(u32_t type) /** * This internal function checks if region is enabled or not */ -static inline bool _is_enabled_region(u32_t r_index) +static inline bool _is_enabled_region(uint32_t r_index) { return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDB0 + r_index * 2U) & AUX_MPU_RDB_VALID_MASK) == AUX_MPU_RDB_VALID_MASK); @@ -99,11 +99,11 @@ static inline bool _is_enabled_region(u32_t r_index) /** * This internal function check if the given buffer in in the region */ -static inline bool _is_in_region(u32_t r_index, u32_t start, u32_t size) +static inline bool _is_in_region(uint32_t r_index, uint32_t start, uint32_t size) { - u32_t r_addr_start; - u32_t r_addr_end; - u32_t r_size_lshift; + uint32_t r_addr_start; + uint32_t r_addr_end; + uint32_t r_size_lshift; r_addr_start = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDB0 + r_index * 2U) & (~AUX_MPU_RDB_VALID_MASK); @@ -122,9 +122,9 @@ static inline bool _is_in_region(u32_t r_index, u32_t start, u32_t size) /** * This internal function check if the region is user accessible or not */ -static inline bool _is_user_accessible_region(u32_t r_index, int write) +static inline bool _is_user_accessible_region(uint32_t r_index, int write) { - u32_t r_ap; + uint32_t r_ap; r_ap = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDP0 + r_index * 2U); @@ -146,10 +146,10 @@ static inline bool _is_user_accessible_region(u32_t r_index, int write) * @param base base address in RAM * @param size size of the region */ -static inline int _mpu_configure(u8_t type, u32_t base, u32_t size) +static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size) { - s32_t region_index = get_region_index_by_type(type); - u32_t region_attr = get_region_attr_by_type(type); + int32_t region_index = get_region_index_by_type(type); + uint32_t region_attr = get_region_attr_by_type(type); LOG_DBG("Region info: 0x%x 0x%x", base, size); @@ -200,7 +200,7 @@ void arc_core_mpu_configure_thread(struct k_thread *thread) if (thread->base.user_options & K_USER) { LOG_DBG("configure user thread %p's stack", thread); if (_mpu_configure(THREAD_STACK_USER_REGION, - (u32_t)thread->stack_obj, thread->stack_info.size) < 0) { + (uint32_t)thread->stack_obj, thread->stack_info.size) < 0) { LOG_ERR("user thread %p's stack failed", thread); return; } @@ -217,9 +217,9 @@ void arc_core_mpu_configure_thread(struct k_thread *thread) * * @param region_attr region attribute of default region */ -void arc_core_mpu_default(u32_t region_attr) +void arc_core_mpu_default(uint32_t region_attr) { - u32_t val = z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) & + uint32_t val = z_arc_v2_aux_reg_read(_ARC_V2_MPU_EN) & (~AUX_MPU_RDP_ATTR_MASK); region_attr &= AUX_MPU_RDP_ATTR_MASK; @@ -234,8 +234,8 @@ void arc_core_mpu_default(u32_t region_attr) * @param base base address * @param region_attr region attribute */ -int arc_core_mpu_region(u32_t index, u32_t base, u32_t size, - u32_t region_attr) +int arc_core_mpu_region(uint32_t index, uint32_t base, uint32_t size, + uint32_t region_attr) { if (index >= get_num_regions()) { return -EINVAL; @@ -259,7 +259,7 @@ void arc_core_mpu_configure_mem_domain(struct k_thread *thread) { int region_index = get_region_index_by_type(THREAD_DOMAIN_PARTITION_REGION); - u32_t num_partitions; + uint32_t num_partitions; struct k_mem_partition *pparts; struct k_mem_domain *mem_domain = NULL; @@ -316,7 +316,7 @@ void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain) * @param partition_id memory partition id */ void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain, - u32_t part_id) + uint32_t part_id) { ARG_UNUSED(domain); @@ -351,7 +351,7 @@ int arc_core_mpu_buffer_validate(void *addr, size_t size, int write) */ for (r_index = 0; r_index < get_num_regions(); r_index++) { if (!_is_enabled_region(r_index) || - !_is_in_region(r_index, (u32_t)addr, size)) { + !_is_in_region(r_index, (uint32_t)addr, size)) { continue; } @@ -377,8 +377,8 @@ static int arc_mpu_init(struct device *arg) { ARG_UNUSED(arg); - u32_t num_regions; - u32_t i; + uint32_t num_regions; + uint32_t i; num_regions = get_num_regions(); diff --git a/arch/arc/core/mpu/arc_mpu_v3_internal.h b/arch/arc/core/mpu/arc_mpu_v3_internal.h index 6d1d80d5ac..ed6f5c93f5 100644 --- a/arch/arc/core/mpu/arc_mpu_v3_internal.h +++ b/arch/arc/core/mpu/arc_mpu_v3_internal.h @@ -62,14 +62,14 @@ * memory areas where dynamic MPU programming is allowed. */ struct dynamic_region_info { - u8_t index; - u32_t base; - u32_t size; - u32_t attr; + uint8_t index; + uint32_t base; + uint32_t size; + uint32_t attr; }; -static u8_t dynamic_regions_num; -static u8_t dynamic_region_index; +static uint8_t dynamic_regions_num; +static uint8_t dynamic_region_index; /** * Global array, holding the MPU region index of @@ -79,41 +79,41 @@ static u8_t dynamic_region_index; static struct dynamic_region_info dyn_reg_info[MPU_DYNAMIC_REGION_AREAS_NUM]; #endif /* CONFIG_MPU_GAP_FILLING */ -static u8_t static_regions_num; +static uint8_t static_regions_num; #ifdef CONFIG_ARC_NORMAL_FIRMWARE /* \todo through secure service to access mpu */ -static inline void _region_init(u32_t index, u32_t region_addr, u32_t size, - u32_t region_attr) +static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size, + uint32_t region_attr) { } -static inline void _region_set_attr(u32_t index, u32_t attr) +static inline void _region_set_attr(uint32_t index, uint32_t attr) { } -static inline u32_t _region_get_attr(u32_t index) +static inline uint32_t _region_get_attr(uint32_t index) { return 0; } -static inline u32_t _region_get_start(u32_t index) +static inline uint32_t _region_get_start(uint32_t index) { return 0; } -static inline void _region_set_start(u32_t index, u32_t start) +static inline void _region_set_start(uint32_t index, uint32_t start) { } -static inline u32_t _region_get_end(u32_t index) +static inline uint32_t _region_get_end(uint32_t index) { return 0; } -static inline void _region_set_end(u32_t index, u32_t end) +static inline void _region_set_end(uint32_t index, uint32_t end) { } @@ -121,7 +121,7 @@ static inline void _region_set_end(u32_t index, u32_t end) * This internal function probes the given addr's MPU index.if not * in MPU, returns error */ -static inline int _mpu_probe(u32_t addr) +static inline int _mpu_probe(uint32_t addr) { return -EINVAL; } @@ -129,7 +129,7 @@ static inline int _mpu_probe(u32_t addr) /** * This internal function checks if MPU region is enabled or not */ -static inline bool _is_enabled_region(u32_t r_index) +static inline bool _is_enabled_region(uint32_t r_index) { return false; } @@ -137,14 +137,14 @@ static inline bool _is_enabled_region(u32_t r_index) /** * This internal function check if the region is user accessible or not */ -static inline bool _is_user_accessible_region(u32_t r_index, int write) +static inline bool _is_user_accessible_region(uint32_t r_index, int write) { return false; } #else /* CONFIG_ARC_NORMAL_FIRMWARE */ /* the following functions are prepared for SECURE_FRIMWARE */ -static inline void _region_init(u32_t index, u32_t region_addr, u32_t size, - u32_t region_attr) +static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size, + uint32_t region_attr) { if (size < (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS)) { size = (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS); @@ -162,34 +162,34 @@ static inline void _region_init(u32_t index, u32_t region_addr, u32_t size, z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, region_attr); } -static inline void _region_set_attr(u32_t index, u32_t attr) +static inline void _region_set_attr(uint32_t index, uint32_t attr) { z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index); z_arc_v2_aux_reg_write(_ARC_V2_MPU_RPER, attr | AUX_MPU_RPER_VALID_MASK); } -static inline u32_t _region_get_attr(u32_t index) +static inline uint32_t _region_get_attr(uint32_t index) { z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index); return z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER); } -static inline u32_t _region_get_start(u32_t index) +static inline uint32_t _region_get_start(uint32_t index) { z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index); return z_arc_v2_aux_reg_read(_ARC_V2_MPU_RSTART); } -static inline void _region_set_start(u32_t index, u32_t start) +static inline void _region_set_start(uint32_t index, uint32_t start) { z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index); z_arc_v2_aux_reg_write(_ARC_V2_MPU_RSTART, start); } -static inline u32_t _region_get_end(u32_t index) +static inline uint32_t _region_get_end(uint32_t index) { z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index); @@ -197,7 +197,7 @@ static inline u32_t _region_get_end(u32_t index) (1 << ARC_FEATURE_MPU_ALIGNMENT_BITS); } -static inline void _region_set_end(u32_t index, u32_t end) +static inline void _region_set_end(uint32_t index, uint32_t end) { z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, index); z_arc_v2_aux_reg_write(_ARC_V2_MPU_REND, end - @@ -208,9 +208,9 @@ static inline void _region_set_end(u32_t index, u32_t end) * This internal function probes the given addr's MPU index.if not * in MPU, returns error */ -static inline int _mpu_probe(u32_t addr) +static inline int _mpu_probe(uint32_t addr) { - u32_t val; + uint32_t val; z_arc_v2_aux_reg_write(_ARC_V2_MPU_PROBE, addr); val = z_arc_v2_aux_reg_read(_ARC_V2_MPU_INDEX); @@ -226,7 +226,7 @@ static inline int _mpu_probe(u32_t addr) /** * This internal function checks if MPU region is enabled or not */ -static inline bool _is_enabled_region(u32_t r_index) +static inline bool _is_enabled_region(uint32_t r_index) { z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index); return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER) & @@ -236,9 +236,9 @@ static inline bool _is_enabled_region(u32_t r_index) /** * This internal function check if the region is user accessible or not */ -static inline bool _is_user_accessible_region(u32_t r_index, int write) +static inline bool _is_user_accessible_region(uint32_t r_index, int write) { - u32_t r_ap; + uint32_t r_ap; z_arc_v2_aux_reg_write(_ARC_V2_MPU_INDEX, r_index); r_ap = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RPER); @@ -259,7 +259,7 @@ static inline bool _is_user_accessible_region(u32_t r_index, int write) * This internal function checks the area given by (start, size) * and returns the index if the area match one MPU entry */ -static inline int _get_region_index(u32_t start, u32_t size) +static inline int _get_region_index(uint32_t start, uint32_t size) { int index = _mpu_probe(start); @@ -295,8 +295,8 @@ static inline int _dynamic_region_allocate_index(void) * @param attr region attribute * @return <0 failure, >0 allocated dynamic region index */ -static int _dynamic_region_allocate_and_init(u32_t base, u32_t size, - u32_t attr) +static int _dynamic_region_allocate_and_init(uint32_t base, uint32_t size, + uint32_t attr) { int u_region_index = _get_region_index(base, size); int region_index; @@ -321,10 +321,10 @@ static int _dynamic_region_allocate_and_init(u32_t base, u32_t size, * region, possibly splitting the underlying region into two. */ - u32_t u_region_start = _region_get_start(u_region_index); - u32_t u_region_end = _region_get_end(u_region_index); - u32_t u_region_attr = _region_get_attr(u_region_index); - u32_t end = base + size; + uint32_t u_region_start = _region_get_start(u_region_index); + uint32_t u_region_end = _region_get_end(u_region_index); + uint32_t u_region_attr = _region_get_attr(u_region_index); + uint32_t end = base + size; if ((base == u_region_start) && (end == u_region_end)) { @@ -397,8 +397,8 @@ static int _dynamic_region_allocate_and_init(u32_t base, u32_t size, */ static void _mpu_reset_dynamic_regions(void) { - u32_t i; - u32_t num_regions = get_num_regions(); + uint32_t i; + uint32_t num_regions = get_num_regions(); for (i = static_regions_num; i < num_regions; i++) { _region_init(i, 0, 0, 0); @@ -423,9 +423,9 @@ static void _mpu_reset_dynamic_regions(void) * @param base base address in RAM * @param size size of the region */ -static inline int _mpu_configure(u8_t type, u32_t base, u32_t size) +static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size) { - u32_t region_attr = get_region_attr_by_type(type); + uint32_t region_attr = get_region_attr_by_type(type); return _dynamic_region_allocate_and_init(base, size, region_attr); } @@ -434,7 +434,7 @@ static inline int _mpu_configure(u8_t type, u32_t base, u32_t size) * This internal function is utilized by the MPU driver to parse the intent * type (i.e. THREAD_STACK_REGION) and return the correct region index. */ -static inline int get_region_index_by_type(u32_t type) +static inline int get_region_index_by_type(uint32_t type) { /* * The new MPU regions are allocated per type after the statically @@ -476,10 +476,10 @@ static inline int get_region_index_by_type(u32_t type) * @param base base address in RAM * @param size size of the region */ -static inline int _mpu_configure(u8_t type, u32_t base, u32_t size) +static inline int _mpu_configure(uint8_t type, uint32_t base, uint32_t size) { int region_index = get_region_index_by_type(type); - u32_t region_attr = get_region_attr_by_type(type); + uint32_t region_attr = get_region_attr_by_type(type); LOG_DBG("Region info: 0x%x 0x%x", base, size); @@ -588,14 +588,14 @@ void arc_core_mpu_configure_thread(struct k_thread *thread) if (thread->base.user_options & K_USER) { LOG_DBG("configure user thread %p's stack", thread); if (_mpu_configure(THREAD_STACK_USER_REGION, - (u32_t)thread->stack_obj, thread->stack_info.size) < 0) { + (uint32_t)thread->stack_obj, thread->stack_info.size) < 0) { LOG_ERR("thread %p's stack failed", thread); return; } } #if defined(CONFIG_MPU_GAP_FILLING) - u32_t num_partitions; + uint32_t num_partitions; struct k_mem_partition *pparts; struct k_mem_domain *mem_domain = thread->mem_domain_info.mem_domain; @@ -610,7 +610,7 @@ void arc_core_mpu_configure_thread(struct k_thread *thread) pparts = NULL; } - for (u32_t i = 0; i < num_partitions; i++) { + for (uint32_t i = 0; i < num_partitions; i++) { if (pparts->size) { if (_dynamic_region_allocate_and_init(pparts->start, pparts->size, pparts->attr) < 0) { @@ -633,7 +633,7 @@ void arc_core_mpu_configure_thread(struct k_thread *thread) * * @param region_attr region attribute of default region */ -void arc_core_mpu_default(u32_t region_attr) +void arc_core_mpu_default(uint32_t region_attr) { #ifdef CONFIG_ARC_NORMAL_FIRMWARE /* \todo through secure service to access mpu */ @@ -650,8 +650,8 @@ void arc_core_mpu_default(u32_t region_attr) * @param size region size * @param region_attr region attribute */ -int arc_core_mpu_region(u32_t index, u32_t base, u32_t size, - u32_t region_attr) +int arc_core_mpu_region(uint32_t index, uint32_t base, uint32_t size, + uint32_t region_attr) { if (index >= get_num_regions()) { return -EINVAL; @@ -678,9 +678,9 @@ void arc_core_mpu_configure_mem_domain(struct k_thread *thread) #else void arc_core_mpu_configure_mem_domain(struct k_thread *thread) { - u32_t region_index; - u32_t num_partitions; - u32_t num_regions; + uint32_t region_index; + uint32_t num_partitions; + uint32_t num_regions; struct k_mem_partition *pparts; struct k_mem_domain *mem_domain = NULL; @@ -728,7 +728,7 @@ void arc_core_mpu_configure_mem_domain(struct k_thread *thread) */ void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain) { - u32_t num_partitions; + uint32_t num_partitions; struct k_mem_partition *pparts; int index; @@ -742,7 +742,7 @@ void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain) pparts = NULL; } - for (u32_t i = 0; i < num_partitions; i++) { + for (uint32_t i = 0; i < num_partitions; i++) { if (pparts->size) { index = _get_region_index(pparts->start, pparts->size); @@ -765,7 +765,7 @@ void arc_core_mpu_remove_mem_domain(struct k_mem_domain *mem_domain) * @param partition_id memory partition id */ void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain, - u32_t partition_id) + uint32_t partition_id) { struct k_mem_partition *partition = &domain->partitions[partition_id]; @@ -811,9 +811,9 @@ int arc_core_mpu_buffer_validate(void *addr, size_t size, int write) * we can stop the iteration immediately once we find the * matched region that grants permission or denies access. */ - r_index = _mpu_probe((u32_t)addr); + r_index = _mpu_probe((uint32_t)addr); /* match and the area is in one region */ - if (r_index >= 0 && r_index == _mpu_probe((u32_t)addr + (size - 1))) { + if (r_index >= 0 && r_index == _mpu_probe((uint32_t)addr + (size - 1))) { if (_is_user_accessible_region(r_index, write)) { r_index = 0; } else { @@ -839,8 +839,8 @@ int arc_core_mpu_buffer_validate(void *addr, size_t size, int write) static int arc_mpu_init(struct device *arg) { ARG_UNUSED(arg); - u32_t num_regions; - u32_t i; + uint32_t num_regions; + uint32_t i; num_regions = get_num_regions(); diff --git a/arch/arc/core/secureshield/arc_sjli.c b/arch/arc/core/secureshield/arc_sjli.c index 02d8c5b9f7..8a62b0bde2 100644 --- a/arch/arc/core/secureshield/arc_sjli.c +++ b/arch/arc/core/secureshield/arc_sjli.c @@ -19,9 +19,9 @@ static void _default_sjli_entry(void); * \todo: how to let user to install customized sjli entry easily, e.g. * through macros or with the help of compiler? */ -const static u32_t _sjli_vector_table[CONFIG_SJLI_TABLE_SIZE] = { - [0] = (u32_t)_arc_do_secure_call, - [1 ... (CONFIG_SJLI_TABLE_SIZE - 1)] = (u32_t)_default_sjli_entry, +const static uint32_t _sjli_vector_table[CONFIG_SJLI_TABLE_SIZE] = { + [0] = (uint32_t)_arc_do_secure_call, + [1 ... (CONFIG_SJLI_TABLE_SIZE - 1)] = (uint32_t)_default_sjli_entry, }; /* diff --git a/arch/arc/core/secureshield/secure_sys_services.c b/arch/arc/core/secureshield/secure_sys_services.c index 34ab80068a..c284c87a06 100644 --- a/arch/arc/core/secureshield/secure_sys_services.c +++ b/arch/arc/core/secureshield/secure_sys_services.c @@ -22,7 +22,7 @@ * an secure service to access secure aux regs. Check should be done * to decide whether the access is valid. */ -static s32_t arc_s_aux_read(u32_t aux_reg) +static int32_t arc_s_aux_read(uint32_t aux_reg) { return -1; } @@ -37,7 +37,7 @@ static s32_t arc_s_aux_read(u32_t aux_reg) * an secure service to access secure aux regs. Check should be done * to decide whether the access is valid. */ -static s32_t arc_s_aux_write(u32_t aux_reg, u32_t val) +static int32_t arc_s_aux_write(uint32_t aux_reg, uint32_t val) { if (aux_reg == _ARC_V2_AUX_IRQ_ACT) { /* 0 -> CONFIG_NUM_IRQ_PRIO_LEVELS allocated to secure world @@ -64,7 +64,7 @@ static s32_t arc_s_aux_write(u32_t aux_reg, u32_t val) * apply one. Necessary check should be done to decide whether the apply is * valid */ -static s32_t arc_s_irq_alloc(u32_t intno) +static int32_t arc_s_irq_alloc(uint32_t intno) { z_arc_v2_irq_uinit_secure_set(intno, 0); return 0; diff --git a/arch/arc/core/thread.c b/arch/arc/core/thread.c index ab044ea104..0190b2bd34 100644 --- a/arch/arc/core/thread.c +++ b/arch/arc/core/thread.c @@ -22,15 +22,15 @@ /* initial stack frame */ struct init_stack_frame { - u32_t pc; + uint32_t pc; #ifdef CONFIG_ARC_HAS_SECURE - u32_t sec_stat; + uint32_t sec_stat; #endif - u32_t status32; - u32_t r3; - u32_t r2; - u32_t r1; - u32_t r0; + uint32_t status32; + uint32_t r3; + uint32_t r2; + uint32_t r1; + uint32_t r0; }; /* @@ -86,10 +86,10 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, if (options & K_USER) { #ifdef CONFIG_GEN_PRIV_STACKS thread->arch.priv_stack_start = - (u32_t)z_priv_stack_find(thread->stack_obj); + (uint32_t)z_priv_stack_find(thread->stack_obj); #else thread->arch.priv_stack_start = - (u32_t)(stackEnd + STACK_GUARD_SIZE); + (uint32_t)(stackEnd + STACK_GUARD_SIZE); #endif priv_stack_end = (char *)Z_STACK_PTR_ALIGN( @@ -98,8 +98,8 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, /* reserve 4 bytes for the start of user sp */ priv_stack_end -= 4; - (*(u32_t *)priv_stack_end) = Z_STACK_PTR_ALIGN( - (u32_t)stackEnd - offset); + (*(uint32_t *)priv_stack_end) = Z_STACK_PTR_ALIGN( + (uint32_t)stackEnd - offset); #ifdef CONFIG_THREAD_USERSPACE_LOCAL_DATA /* reserve stack space for the userspace local data struct */ @@ -108,8 +108,8 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, Z_STACK_PTR_ALIGN(stackEnd - sizeof(*thread->userspace_local_data) - offset); /* update the start of user sp */ - (*(u32_t *)priv_stack_end) = - (u32_t) thread->userspace_local_data; + (*(uint32_t *)priv_stack_end) = + (uint32_t) thread->userspace_local_data; #endif } else { @@ -139,9 +139,9 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, /* fill init context */ pInitCtx->status32 = 0U; if (options & K_USER) { - pInitCtx->pc = ((u32_t)z_user_thread_entry_wrapper); + pInitCtx->pc = ((uint32_t)z_user_thread_entry_wrapper); } else { - pInitCtx->pc = ((u32_t)z_thread_entry_wrapper); + pInitCtx->pc = ((uint32_t)z_thread_entry_wrapper); } /* @@ -165,17 +165,17 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, sizeof(struct init_stack_frame)); pInitCtx->status32 = 0U; - pInitCtx->pc = ((u32_t)z_thread_entry_wrapper); + pInitCtx->pc = ((uint32_t)z_thread_entry_wrapper); #endif #ifdef CONFIG_ARC_SECURE_FIRMWARE pInitCtx->sec_stat = z_arc_v2_aux_reg_read(_ARC_V2_SEC_STAT); #endif - pInitCtx->r0 = (u32_t)pEntry; - pInitCtx->r1 = (u32_t)parameter1; - pInitCtx->r2 = (u32_t)parameter2; - pInitCtx->r3 = (u32_t)parameter3; + pInitCtx->r0 = (uint32_t)pEntry; + pInitCtx->r1 = (uint32_t)parameter1; + pInitCtx->r2 = (uint32_t)parameter2; + pInitCtx->r3 = (uint32_t)parameter3; /* stack check configuration */ #ifdef CONFIG_ARC_STACK_CHECKING @@ -186,21 +186,21 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, #endif #ifdef CONFIG_USERSPACE if (options & K_USER) { - thread->arch.u_stack_top = (u32_t)pStackMem; - thread->arch.u_stack_base = (u32_t)stackEnd; + thread->arch.u_stack_top = (uint32_t)pStackMem; + thread->arch.u_stack_base = (uint32_t)stackEnd; thread->arch.k_stack_top = - (u32_t)(thread->arch.priv_stack_start); - thread->arch.k_stack_base = (u32_t) + (uint32_t)(thread->arch.priv_stack_start); + thread->arch.k_stack_base = (uint32_t) (thread->arch.priv_stack_start + CONFIG_PRIVILEGED_STACK_SIZE); } else { - thread->arch.k_stack_top = (u32_t)pStackMem; - thread->arch.k_stack_base = (u32_t)stackEnd; + thread->arch.k_stack_top = (uint32_t)pStackMem; + thread->arch.k_stack_base = (uint32_t)stackEnd; thread->arch.u_stack_top = 0; thread->arch.u_stack_base = 0; } #else - thread->arch.k_stack_top = (u32_t) pStackMem; - thread->arch.k_stack_base = (u32_t) stackEnd; + thread->arch.k_stack_top = (uint32_t) pStackMem; + thread->arch.k_stack_base = (uint32_t) stackEnd; #endif #endif @@ -211,7 +211,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, thread->switch_handle = thread; thread->arch.relinquish_cause = _CAUSE_COOP; thread->callee_saved.sp = - (u32_t)pInitCtx - ___callee_saved_stack_t_SIZEOF; + (uint32_t)pInitCtx - ___callee_saved_stack_t_SIZEOF; /* initial values in all other regs/k_thread entries are irrelevant */ } @@ -230,13 +230,13 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, { - _current->stack_info.start = (u32_t)_current->stack_obj; + _current->stack_info.start = (uint32_t)_current->stack_obj; #ifdef CONFIG_GEN_PRIV_STACKS _current->arch.priv_stack_start = - (u32_t)z_priv_stack_find(_current->stack_obj); + (uint32_t)z_priv_stack_find(_current->stack_obj); #else _current->arch.priv_stack_start = - (u32_t)(_current->stack_info.start + + (uint32_t)(_current->stack_info.start + _current->stack_info.size + STACK_GUARD_SIZE); #endif @@ -255,7 +255,7 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, configure_mpu_thread(_current); z_arc_userspace_enter(user_entry, p1, p2, p3, - (u32_t)_current->stack_obj, + (uint32_t)_current->stack_obj, _current->stack_info.size, _current); CODE_UNREACHABLE; } diff --git a/arch/arc/core/timestamp.c b/arch/arc/core/timestamp.c index 87dbfd2fcf..a2ba64b54c 100644 --- a/arch/arc/core/timestamp.c +++ b/arch/arc/core/timestamp.c @@ -23,17 +23,17 @@ * * @return 64-bit time stamp value */ -u64_t z_tsc_read(void) +uint64_t z_tsc_read(void) { unsigned int key; - u64_t t; - u32_t count; + uint64_t t; + uint32_t count; key = arch_irq_lock(); - t = (u64_t)z_tick_get(); + t = (uint64_t)z_tick_get(); count = z_arc_v2_aux_reg_read(_ARC_V2_TMR0_COUNT); arch_irq_unlock(key); t *= k_ticks_to_cyc_floor64(1); - t += (u64_t)count; + t += (uint64_t)count; return t; } diff --git a/arch/arc/core/vector_table.c b/arch/arc/core/vector_table.c index 3f68f0a541..9f85f3c837 100644 --- a/arch/arc/core/vector_table.c +++ b/arch/arc/core/vector_table.c @@ -28,39 +28,39 @@ #include "vector_table.h" struct vector_table { - u32_t reset; - u32_t memory_error; - u32_t instruction_error; - u32_t ev_machine_check; - u32_t ev_tlb_miss_i; - u32_t ev_tlb_miss_d; - u32_t ev_prot_v; - u32_t ev_privilege_v; - u32_t ev_swi; - u32_t ev_trap; - u32_t ev_extension; - u32_t ev_div_zero; - u32_t ev_dc_error; - u32_t ev_maligned; - u32_t unused_1; - u32_t unused_2; + uint32_t reset; + uint32_t memory_error; + uint32_t instruction_error; + uint32_t ev_machine_check; + uint32_t ev_tlb_miss_i; + uint32_t ev_tlb_miss_d; + uint32_t ev_prot_v; + uint32_t ev_privilege_v; + uint32_t ev_swi; + uint32_t ev_trap; + uint32_t ev_extension; + uint32_t ev_div_zero; + uint32_t ev_dc_error; + uint32_t ev_maligned; + uint32_t unused_1; + uint32_t unused_2; }; struct vector_table _VectorTable Z_GENERIC_SECTION(.exc_vector_table) = { - (u32_t)__reset, - (u32_t)__memory_error, - (u32_t)__instruction_error, - (u32_t)__ev_machine_check, - (u32_t)__ev_tlb_miss_i, - (u32_t)__ev_tlb_miss_d, - (u32_t)__ev_prot_v, - (u32_t)__ev_privilege_v, - (u32_t)__ev_swi, - (u32_t)__ev_trap, - (u32_t)__ev_extension, - (u32_t)__ev_div_zero, - (u32_t)__ev_dc_error, - (u32_t)__ev_maligned, + (uint32_t)__reset, + (uint32_t)__memory_error, + (uint32_t)__instruction_error, + (uint32_t)__ev_machine_check, + (uint32_t)__ev_tlb_miss_i, + (uint32_t)__ev_tlb_miss_d, + (uint32_t)__ev_prot_v, + (uint32_t)__ev_privilege_v, + (uint32_t)__ev_swi, + (uint32_t)__ev_trap, + (uint32_t)__ev_extension, + (uint32_t)__ev_div_zero, + (uint32_t)__ev_dc_error, + (uint32_t)__ev_maligned, 0, 0 }; diff --git a/arch/arc/include/kernel_arch_data.h b/arch/arc/include/kernel_arch_data.h index cbf747e92a..49b1cd7708 100644 --- a/arch/arc/include/kernel_arch_data.h +++ b/arch/arc/include/kernel_arch_data.h @@ -37,70 +37,70 @@ extern "C" { #ifdef CONFIG_ARC_HAS_SECURE struct _irq_stack_frame { - u32_t lp_end; - u32_t lp_start; - u32_t lp_count; + uint32_t lp_end; + uint32_t lp_start; + uint32_t lp_count; #ifdef CONFIG_CODE_DENSITY /* * Currently unsupported. This is where those registers are * automatically pushed on the stack by the CPU when taking a regular * IRQ. */ - u32_t ei_base; - u32_t ldi_base; - u32_t jli_base; + uint32_t ei_base; + uint32_t ldi_base; + uint32_t jli_base; #endif - u32_t r0; - u32_t r1; - u32_t r2; - u32_t r3; - u32_t r4; - u32_t r5; - u32_t r6; - u32_t r7; - u32_t r8; - u32_t r9; - u32_t r10; - u32_t r11; - u32_t r12; - u32_t r13; - u32_t blink; - u32_t pc; - u32_t sec_stat; - u32_t status32; + uint32_t r0; + uint32_t r1; + uint32_t r2; + uint32_t r3; + uint32_t r4; + uint32_t r5; + uint32_t r6; + uint32_t r7; + uint32_t r8; + uint32_t r9; + uint32_t r10; + uint32_t r11; + uint32_t r12; + uint32_t r13; + uint32_t blink; + uint32_t pc; + uint32_t sec_stat; + uint32_t status32; }; #else struct _irq_stack_frame { - u32_t r0; - u32_t r1; - u32_t r2; - u32_t r3; - u32_t r4; - u32_t r5; - u32_t r6; - u32_t r7; - u32_t r8; - u32_t r9; - u32_t r10; - u32_t r11; - u32_t r12; - u32_t r13; - u32_t blink; - u32_t lp_end; - u32_t lp_start; - u32_t lp_count; + uint32_t r0; + uint32_t r1; + uint32_t r2; + uint32_t r3; + uint32_t r4; + uint32_t r5; + uint32_t r6; + uint32_t r7; + uint32_t r8; + uint32_t r9; + uint32_t r10; + uint32_t r11; + uint32_t r12; + uint32_t r13; + uint32_t blink; + uint32_t lp_end; + uint32_t lp_start; + uint32_t lp_count; #ifdef CONFIG_CODE_DENSITY /* * Currently unsupported. This is where those registers are * automatically pushed on the stack by the CPU when taking a regular * IRQ. */ - u32_t ei_base; - u32_t ldi_base; - u32_t jli_base; + uint32_t ei_base; + uint32_t ldi_base; + uint32_t jli_base; #endif - u32_t pc; - u32_t status32; + uint32_t pc; + uint32_t status32; }; #endif @@ -110,47 +110,47 @@ typedef struct _irq_stack_frame _isf_t; /* callee-saved registers pushed on the stack, not in k_thread */ struct _callee_saved_stack { - u32_t r13; - u32_t r14; - u32_t r15; - u32_t r16; - u32_t r17; - u32_t r18; - u32_t r19; - u32_t r20; - u32_t r21; - u32_t r22; - u32_t r23; - u32_t r24; - u32_t r25; - u32_t r26; - u32_t fp; /* r27 */ + uint32_t r13; + uint32_t r14; + uint32_t r15; + uint32_t r16; + uint32_t r17; + uint32_t r18; + uint32_t r19; + uint32_t r20; + uint32_t r21; + uint32_t r22; + uint32_t r23; + uint32_t r24; + uint32_t r25; + uint32_t r26; + uint32_t fp; /* r27 */ #ifdef CONFIG_USERSPACE #ifdef CONFIG_ARC_HAS_SECURE - u32_t user_sp; - u32_t kernel_sp; + uint32_t user_sp; + uint32_t kernel_sp; #else - u32_t user_sp; + uint32_t user_sp; #endif #endif /* r28 is the stack pointer and saved separately */ /* r29 is ILINK and does not need to be saved */ - u32_t r30; + uint32_t r30; #ifdef CONFIG_ARC_HAS_ACCL_REGS - u32_t r58; - u32_t r59; + uint32_t r58; + uint32_t r59; #endif #ifdef CONFIG_FPU_SHARING - u32_t fpu_status; - u32_t fpu_ctrl; + uint32_t fpu_status; + uint32_t fpu_ctrl; #ifdef CONFIG_FP_FPU_DA - u32_t dpfp2h; - u32_t dpfp2l; - u32_t dpfp1h; - u32_t dpfp1l; + uint32_t dpfp2h; + uint32_t dpfp2l; + uint32_t dpfp1h; + uint32_t dpfp1l; #endif #endif diff --git a/arch/arc/include/kernel_arch_func.h b/arch/arc/include/kernel_arch_func.h index a5ad448ba3..bea594fd07 100644 --- a/arch/arc/include/kernel_arch_func.h +++ b/arch/arc/include/kernel_arch_func.h @@ -48,7 +48,7 @@ static ALWAYS_INLINE void arch_kernel_init(void) */ static ALWAYS_INLINE int Z_INTERRUPT_CAUSE(void) { - u32_t irq_num = z_arc_v2_aux_reg_read(_ARC_V2_ICAUSE); + uint32_t irq_num = z_arc_v2_aux_reg_read(_ARC_V2_ICAUSE); return irq_num; } @@ -62,7 +62,7 @@ extern void z_thread_entry_wrapper(void); extern void z_user_thread_entry_wrapper(void); extern void z_arc_userspace_enter(k_thread_entry_t user_entry, void *p1, - void *p2, void *p3, u32_t stack, u32_t size, + void *p2, void *p3, uint32_t stack, uint32_t size, struct k_thread *thread); diff --git a/arch/arc/include/v2/cache.h b/arch/arc/include/v2/cache.h index 747a08932f..4341422529 100644 --- a/arch/arc/include/v2/cache.h +++ b/arch/arc/include/v2/cache.h @@ -36,11 +36,11 @@ extern "C" { */ static ALWAYS_INLINE void z_icache_setup(void) { - u32_t icache_config = ( + uint32_t icache_config = ( IC_CACHE_DIRECT | /* direct mapping (one-way assoc.) */ IC_CACHE_ENABLE /* i-cache enabled */ ); - u32_t val; + uint32_t val; val = z_arc_v2_aux_reg_read(_ARC_V2_I_CACHE_BUILD); val &= 0xff; diff --git a/arch/arc/include/v2/irq.h b/arch/arc/include/v2/irq.h index 870f7d8cf4..1f2a1a63de 100644 --- a/arch/arc/include/v2/irq.h +++ b/arch/arc/include/v2/irq.h @@ -53,7 +53,7 @@ extern "C" { */ static ALWAYS_INLINE void z_irq_setup(void) { - u32_t aux_irq_ctrl_value = ( + uint32_t aux_irq_ctrl_value = ( _ARC_V2_AUX_IRQ_CTRL_LOOP_REGS | /* save lp_xxx registers */ #ifdef CONFIG_CODE_DENSITY _ARC_V2_AUX_IRQ_CTRL_LP | /* save code density registers */ diff --git a/arch/arm/core/aarch32/cortex_a_r/fault.c b/arch/arm/core/aarch32/cortex_a_r/fault.c index b5dccecc56..df3f676e6b 100644 --- a/arch/arm/core/aarch32/cortex_a_r/fault.c +++ b/arch/arm/core/aarch32/cortex_a_r/fault.c @@ -13,7 +13,7 @@ LOG_MODULE_DECLARE(os); #define FAULT_DUMP_VERBOSE (CONFIG_FAULT_DUMP == 2) #if FAULT_DUMP_VERBOSE -static const char *get_dbgdscr_moe_string(u32_t moe) +static const char *get_dbgdscr_moe_string(uint32_t moe) { switch (moe) { case DBGDSCR_MOE_HALT_REQUEST: @@ -40,14 +40,14 @@ static const char *get_dbgdscr_moe_string(u32_t moe) static void dump_debug_event(void) { /* Read and parse debug mode of entry */ - u32_t dbgdscr = __get_DBGDSCR(); - u32_t moe = (dbgdscr & DBGDSCR_MOE_Msk) >> DBGDSCR_MOE_Pos; + uint32_t dbgdscr = __get_DBGDSCR(); + uint32_t moe = (dbgdscr & DBGDSCR_MOE_Msk) >> DBGDSCR_MOE_Pos; /* Print debug event information */ LOG_ERR("Debug Event (%s)", get_dbgdscr_moe_string(moe)); } -static void dump_fault(u32_t status, u32_t addr) +static void dump_fault(uint32_t status, uint32_t addr) { /* * Dump fault status and, if applicable, tatus-specific information. @@ -110,11 +110,11 @@ bool z_arm_fault_undef_instruction(z_arch_esf_t *esf) bool z_arm_fault_prefetch(z_arch_esf_t *esf) { /* Read and parse Instruction Fault Status Register (IFSR) */ - u32_t ifsr = __get_IFSR(); - u32_t fs = ((ifsr & IFSR_FS1_Msk) >> 6) | (ifsr & IFSR_FS0_Msk); + uint32_t ifsr = __get_IFSR(); + uint32_t fs = ((ifsr & IFSR_FS1_Msk) >> 6) | (ifsr & IFSR_FS0_Msk); /* Read Instruction Fault Address Register (IFAR) */ - u32_t ifar = __get_IFAR(); + uint32_t ifar = __get_IFAR(); /* Print fault information*/ LOG_ERR("***** PREFETCH ABORT *****"); @@ -137,11 +137,11 @@ bool z_arm_fault_prefetch(z_arch_esf_t *esf) bool z_arm_fault_data(z_arch_esf_t *esf) { /* Read and parse Data Fault Status Register (DFSR) */ - u32_t dfsr = __get_DFSR(); - u32_t fs = ((dfsr & DFSR_FS1_Msk) >> 6) | (dfsr & DFSR_FS0_Msk); + uint32_t dfsr = __get_DFSR(); + uint32_t fs = ((dfsr & DFSR_FS1_Msk) >> 6) | (dfsr & DFSR_FS0_Msk); /* Read Data Fault Address Register (DFAR) */ - u32_t dfar = __get_DFAR(); + uint32_t dfar = __get_DFAR(); /* Print fault information*/ LOG_ERR("***** DATA ABORT *****"); diff --git a/arch/arm/core/aarch32/cortex_m/cmse/arm_core_cmse.c b/arch/arm/core/aarch32/cortex_m/cmse/arm_core_cmse.c index 19ea839ac5..acf1e889be 100644 --- a/arch/arm/core/aarch32/cortex_m/cmse/arm_core_cmse.c +++ b/arch/arm/core/aarch32/cortex_m/cmse/arm_core_cmse.c @@ -7,7 +7,7 @@ #include #include -int arm_cmse_mpu_region_get(u32_t addr) +int arm_cmse_mpu_region_get(uint32_t addr) { cmse_address_info_t addr_info = cmse_TT((void *)addr); @@ -18,7 +18,7 @@ int arm_cmse_mpu_region_get(u32_t addr) return -EINVAL; } -static int arm_cmse_addr_read_write_ok(u32_t addr, int force_npriv, int rw) +static int arm_cmse_addr_read_write_ok(uint32_t addr, int force_npriv, int rw) { cmse_address_info_t addr_info; if (force_npriv) { @@ -30,17 +30,17 @@ static int arm_cmse_addr_read_write_ok(u32_t addr, int force_npriv, int rw) return rw ? addr_info.flags.readwrite_ok : addr_info.flags.read_ok; } -int arm_cmse_addr_read_ok(u32_t addr, int force_npriv) +int arm_cmse_addr_read_ok(uint32_t addr, int force_npriv) { return arm_cmse_addr_read_write_ok(addr, force_npriv, 0); } -int arm_cmse_addr_readwrite_ok(u32_t addr, int force_npriv) +int arm_cmse_addr_readwrite_ok(uint32_t addr, int force_npriv) { return arm_cmse_addr_read_write_ok(addr, force_npriv, 1); } -static int arm_cmse_addr_range_read_write_ok(u32_t addr, u32_t size, +static int arm_cmse_addr_range_read_write_ok(uint32_t addr, uint32_t size, int force_npriv, int rw) { int flags = 0; @@ -60,19 +60,19 @@ static int arm_cmse_addr_range_read_write_ok(u32_t addr, u32_t size, } } -int arm_cmse_addr_range_read_ok(u32_t addr, u32_t size, int force_npriv) +int arm_cmse_addr_range_read_ok(uint32_t addr, uint32_t size, int force_npriv) { return arm_cmse_addr_range_read_write_ok(addr, size, force_npriv, 0); } -int arm_cmse_addr_range_readwrite_ok(u32_t addr, u32_t size, int force_npriv) +int arm_cmse_addr_range_readwrite_ok(uint32_t addr, uint32_t size, int force_npriv) { return arm_cmse_addr_range_read_write_ok(addr, size, force_npriv, 1); } #if defined(CONFIG_ARM_SECURE_FIRMWARE) -int arm_cmse_mpu_nonsecure_region_get(u32_t addr) +int arm_cmse_mpu_nonsecure_region_get(uint32_t addr) { cmse_address_info_t addr_info = cmse_TTA((void *)addr); @@ -83,7 +83,7 @@ int arm_cmse_mpu_nonsecure_region_get(u32_t addr) return -EINVAL; } -int arm_cmse_sau_region_get(u32_t addr) +int arm_cmse_sau_region_get(uint32_t addr) { cmse_address_info_t addr_info = cmse_TT((void *)addr); @@ -94,7 +94,7 @@ int arm_cmse_sau_region_get(u32_t addr) return -EINVAL; } -int arm_cmse_idau_region_get(u32_t addr) +int arm_cmse_idau_region_get(uint32_t addr) { cmse_address_info_t addr_info = cmse_TT((void *)addr); @@ -105,14 +105,14 @@ int arm_cmse_idau_region_get(u32_t addr) return -EINVAL; } -int arm_cmse_addr_is_secure(u32_t addr) +int arm_cmse_addr_is_secure(uint32_t addr) { cmse_address_info_t addr_info = cmse_TT((void *)addr); return addr_info.flags.secure; } -static int arm_cmse_addr_nonsecure_read_write_ok(u32_t addr, +static int arm_cmse_addr_nonsecure_read_write_ok(uint32_t addr, int force_npriv, int rw) { cmse_address_info_t addr_info; @@ -126,17 +126,17 @@ static int arm_cmse_addr_nonsecure_read_write_ok(u32_t addr, addr_info.flags.nonsecure_read_ok; } -int arm_cmse_addr_nonsecure_read_ok(u32_t addr, int force_npriv) +int arm_cmse_addr_nonsecure_read_ok(uint32_t addr, int force_npriv) { return arm_cmse_addr_nonsecure_read_write_ok(addr, force_npriv, 0); } -int arm_cmse_addr_nonsecure_readwrite_ok(u32_t addr, int force_npriv) +int arm_cmse_addr_nonsecure_readwrite_ok(uint32_t addr, int force_npriv) { return arm_cmse_addr_nonsecure_read_write_ok(addr, force_npriv, 1); } -static int arm_cmse_addr_range_nonsecure_read_write_ok(u32_t addr, u32_t size, +static int arm_cmse_addr_range_nonsecure_read_write_ok(uint32_t addr, uint32_t size, int force_npriv, int rw) { int flags = CMSE_NONSECURE; @@ -156,14 +156,14 @@ static int arm_cmse_addr_range_nonsecure_read_write_ok(u32_t addr, u32_t size, } } -int arm_cmse_addr_range_nonsecure_read_ok(u32_t addr, u32_t size, +int arm_cmse_addr_range_nonsecure_read_ok(uint32_t addr, uint32_t size, int force_npriv) { return arm_cmse_addr_range_nonsecure_read_write_ok(addr, size, force_npriv, 0); } -int arm_cmse_addr_range_nonsecure_readwrite_ok(u32_t addr, u32_t size, +int arm_cmse_addr_range_nonsecure_readwrite_ok(uint32_t addr, uint32_t size, int force_npriv) { return arm_cmse_addr_range_nonsecure_read_write_ok(addr, size, diff --git a/arch/arm/core/aarch32/cortex_m/fault.c b/arch/arm/core/aarch32/cortex_m/fault.c index c1f09216ee..ec7d75af8e 100644 --- a/arch/arm/core/aarch32/cortex_m/fault.c +++ b/arch/arm/core/aarch32/cortex_m/fault.c @@ -21,7 +21,7 @@ LOG_MODULE_DECLARE(os); #if defined(CONFIG_PRINTK) || defined(CONFIG_LOG) #define PR_EXC(...) LOG_ERR(__VA_ARGS__) -#define STORE_xFAR(reg_var, reg) u32_t reg_var = (u32_t)reg +#define STORE_xFAR(reg_var, reg) uint32_t reg_var = (uint32_t)reg #else #define PR_EXC(...) #define STORE_xFAR(reg_var, reg) @@ -175,11 +175,11 @@ static bool memory_fault_recoverable(z_arch_esf_t *esf) #ifdef CONFIG_USERSPACE for (int i = 0; i < ARRAY_SIZE(exceptions); i++) { /* Mask out instruction mode */ - u32_t start = (u32_t)exceptions[i].start & ~0x1; - u32_t end = (u32_t)exceptions[i].end & ~0x1; + uint32_t start = (uint32_t)exceptions[i].start & ~0x1; + uint32_t end = (uint32_t)exceptions[i].end & ~0x1; if (esf->basic.pc >= start && esf->basic.pc < end) { - esf->basic.pc = (u32_t)(exceptions[i].fixup); + esf->basic.pc = (uint32_t)(exceptions[i].fixup); return true; } } @@ -193,8 +193,8 @@ static bool memory_fault_recoverable(z_arch_esf_t *esf) #elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE) #if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE) -u32_t z_check_thread_stack_fail(const u32_t fault_addr, - const u32_t psp); +uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, + const uint32_t psp); #endif /* CONFIG_MPU_STACK_GUARD || defined(CONFIG_USERSPACE) */ /** @@ -205,11 +205,11 @@ u32_t z_check_thread_stack_fail(const u32_t fault_addr, * * @return error code to identify the fatal error reason */ -static u32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault, +static uint32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable) { - u32_t reason = K_ERR_CPU_EXCEPTION; - u32_t mmfar = -EINVAL; + uint32_t reason = K_ERR_CPU_EXCEPTION; + uint32_t mmfar = -EINVAL; PR_FAULT_INFO("***** MPU FAULT *****"); @@ -276,8 +276,8 @@ static u32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault, * handle the case of 'mmfar' holding the -EINVAL value. */ if (SCB->ICSR & SCB_ICSR_RETTOBASE_Msk) { - u32_t min_stack_ptr = z_check_thread_stack_fail(mmfar, - ((u32_t) &esf[0])); + uint32_t min_stack_ptr = z_check_thread_stack_fail(mmfar, + ((uint32_t) &esf[0])); if (min_stack_ptr) { /* When MemManage Stacking Error has occurred, @@ -339,7 +339,7 @@ static u32_t mem_manage_fault(z_arch_esf_t *esf, int from_hard_fault, */ static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable) { - u32_t reason = K_ERR_CPU_EXCEPTION; + uint32_t reason = K_ERR_CPU_EXCEPTION; PR_FAULT_INFO("***** BUS FAULT *****"); @@ -383,10 +383,10 @@ static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable) #endif /* !defined(CONFIG_ARMV7_M_ARMV8_M_FP) */ #if defined(CONFIG_ARM_MPU) && defined(CONFIG_CPU_HAS_NXP_MPU) - u32_t sperr = SYSMPU->CESR & SYSMPU_CESR_SPERR_MASK; - u32_t mask = BIT(31); + uint32_t sperr = SYSMPU->CESR & SYSMPU_CESR_SPERR_MASK; + uint32_t mask = BIT(31); int i; - u32_t ear = -EINVAL; + uint32_t ear = -EINVAL; if (sperr) { for (i = 0; i < SYSMPU_EAR_COUNT; i++, mask >>= 1) { @@ -426,9 +426,9 @@ static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable) * inspecting the RETTOBASE flag. */ if (SCB->ICSR & SCB_ICSR_RETTOBASE_Msk) { - u32_t min_stack_ptr = + uint32_t min_stack_ptr = z_check_thread_stack_fail(ear, - ((u32_t) &esf[0])); + ((uint32_t) &esf[0])); if (min_stack_ptr) { /* When BusFault Stacking Error @@ -491,9 +491,9 @@ static int bus_fault(z_arch_esf_t *esf, int from_hard_fault, bool *recoverable) * * @return error code to identify the fatal error reason */ -static u32_t usage_fault(const z_arch_esf_t *esf) +static uint32_t usage_fault(const z_arch_esf_t *esf) { - u32_t reason = K_ERR_CPU_EXCEPTION; + uint32_t reason = K_ERR_CPU_EXCEPTION; PR_FAULT_INFO("***** USAGE FAULT *****"); @@ -606,9 +606,9 @@ static void debug_monitor(const z_arch_esf_t *esf) * * @return error code to identify the fatal error reason */ -static u32_t hard_fault(z_arch_esf_t *esf, bool *recoverable) +static uint32_t hard_fault(z_arch_esf_t *esf, bool *recoverable) { - u32_t reason = K_ERR_CPU_EXCEPTION; + uint32_t reason = K_ERR_CPU_EXCEPTION; PR_FAULT_INFO("***** HARD FAULT *****"); @@ -621,14 +621,14 @@ static u32_t hard_fault(z_arch_esf_t *esf, bool *recoverable) * priority. We handle the case of Kernel OOPS and Stack * Fail here. */ - u16_t *ret_addr = (u16_t *)esf->basic.pc; + uint16_t *ret_addr = (uint16_t *)esf->basic.pc; /* SVC is a 16-bit instruction. On a synchronous SVC * escalated to Hard Fault, the return address is the * next instruction, i.e. after the SVC. */ #define _SVC_OPCODE 0xDF00 - u16_t fault_insn = *(ret_addr - 1); + uint16_t fault_insn = *(ret_addr - 1); if (((fault_insn & 0xff00) == _SVC_OPCODE) && ((fault_insn & 0x00ff) == _SVC_CALL_RUNTIME_EXCEPT)) { @@ -682,9 +682,9 @@ static void reserved_exception(const z_arch_esf_t *esf, int fault) } /* Handler function for ARM fault conditions. */ -static u32_t fault_handle(z_arch_esf_t *esf, int fault, bool *recoverable) +static uint32_t fault_handle(z_arch_esf_t *esf, int fault, bool *recoverable) { - u32_t reason = K_ERR_CPU_EXCEPTION; + uint32_t reason = K_ERR_CPU_EXCEPTION; *recoverable = false; @@ -747,8 +747,8 @@ static void secure_stack_dump(const z_arch_esf_t *secure_esf) * In case of a Non-Secure function call the top of the * stack contains the return address to Secure state. */ - u32_t *top_of_sec_stack = (u32_t *)secure_esf; - u32_t sec_ret_addr; + uint32_t *top_of_sec_stack = (uint32_t *)secure_esf; + uint32_t sec_ret_addr; #if defined(CONFIG_ARMV7_M_ARMV8_M_FP) if ((*top_of_sec_stack == INTEGRITY_SIGNATURE_STD) || (*top_of_sec_stack == INTEGRITY_SIGNATURE_EXT)) { @@ -790,7 +790,7 @@ static void secure_stack_dump(const z_arch_esf_t *secure_esf) * * @return ESF pointer on success, otherwise return NULL */ -static inline z_arch_esf_t *get_esf(u32_t msp, u32_t psp, u32_t exc_return, +static inline z_arch_esf_t *get_esf(uint32_t msp, uint32_t psp, uint32_t exc_return, bool *nested_exc) { bool alternative_state_exc = false; @@ -931,9 +931,9 @@ static inline z_arch_esf_t *get_esf(u32_t msp, u32_t psp, u32_t exc_return, * @param exc_return EXC_RETURN value present in LR after exception entry. * */ -void z_arm_fault(u32_t msp, u32_t psp, u32_t exc_return) +void z_arm_fault(uint32_t msp, uint32_t psp, uint32_t exc_return) { - u32_t reason = K_ERR_CPU_EXCEPTION; + uint32_t reason = K_ERR_CPU_EXCEPTION; int fault = SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk; bool recoverable, nested_exc; z_arch_esf_t *esf; diff --git a/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu.c b/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu.c index 117fd7ef05..98392e89a8 100644 --- a/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu.c +++ b/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu.c @@ -39,11 +39,11 @@ LOG_MODULE_REGISTER(mpu); * memory area, where dynamic memory regions may be programmed at run-time. */ #if defined(CONFIG_USERSPACE) -#define _MPU_DYNAMIC_REGIONS_AREA_START ((u32_t)&_app_smem_start) +#define _MPU_DYNAMIC_REGIONS_AREA_START ((uint32_t)&_app_smem_start) #else -#define _MPU_DYNAMIC_REGIONS_AREA_START ((u32_t)&__kernel_ram_start) +#define _MPU_DYNAMIC_REGIONS_AREA_START ((uint32_t)&__kernel_ram_start) #endif /* CONFIG_USERSPACE */ -#define _MPU_DYNAMIC_REGIONS_AREA_SIZE ((u32_t)&__kernel_ram_end - \ +#define _MPU_DYNAMIC_REGIONS_AREA_SIZE ((uint32_t)&__kernel_ram_end - \ _MPU_DYNAMIC_REGIONS_AREA_START) /** @@ -64,24 +64,24 @@ void z_arm_configure_static_mpu_regions(void) #if defined(CONFIG_COVERAGE_GCOV) && defined(CONFIG_USERSPACE) const struct k_mem_partition gcov_region = { - .start = (u32_t)&__gcov_bss_start, - .size = (u32_t)&__gcov_bss_size, + .start = (uint32_t)&__gcov_bss_start, + .size = (uint32_t)&__gcov_bss_size, .attr = K_MEM_PARTITION_P_RW_U_RW, }; #endif /* CONFIG_COVERAGE_GCOV && CONFIG_USERSPACE */ #if defined(CONFIG_NOCACHE_MEMORY) const struct k_mem_partition nocache_region = { - .start = (u32_t)&_nocache_ram_start, - .size = (u32_t)&_nocache_ram_size, + .start = (uint32_t)&_nocache_ram_start, + .size = (uint32_t)&_nocache_ram_size, .attr = K_MEM_PARTITION_P_RW_U_NA_NOCACHE, }; #endif /* CONFIG_NOCACHE_MEMORY */ #if defined(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT) const struct k_mem_partition ramfunc_region = { - .start = (u32_t)&_ramfunc_ram_start, - .size = (u32_t)&_ramfunc_ram_size, + .start = (uint32_t)&_ramfunc_ram_start, + .size = (uint32_t)&_ramfunc_ram_size, .attr = K_MEM_PARTITION_P_RX_U_RX, }; #endif /* CONFIG_ARCH_HAS_RAMFUNC_SUPPORT */ @@ -109,8 +109,8 @@ void z_arm_configure_static_mpu_regions(void) */ arm_core_mpu_configure_static_mpu_regions(static_regions, ARRAY_SIZE(static_regions), - (u32_t)&_image_ram_start, - (u32_t)&__kernel_ram_end); + (uint32_t)&_image_ram_start, + (uint32_t)&__kernel_ram_end); #if defined(CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS) /* Define a constant array of k_mem_partition objects that holds the @@ -151,7 +151,7 @@ void z_arm_configure_dynamic_mpu_regions(struct k_thread *thread) */ struct k_mem_partition *dynamic_regions[_MAX_DYNAMIC_MPU_REGIONS_NUM]; - u8_t region_num = 0U; + uint8_t region_num = 0U; #if defined(CONFIG_USERSPACE) struct k_mem_partition thread_stack; @@ -162,7 +162,7 @@ void z_arm_configure_dynamic_mpu_regions(struct k_thread *thread) if (mem_domain) { LOG_DBG("configure domain: %p", mem_domain); - u32_t num_partitions = mem_domain->num_partitions; + uint32_t num_partitions = mem_domain->num_partitions; struct k_mem_partition partition; int i; @@ -193,8 +193,8 @@ void z_arm_configure_dynamic_mpu_regions(struct k_thread *thread) /* Thread user stack */ LOG_DBG("configure user thread %p's context", thread); if (thread->arch.priv_stack_start) { - u32_t base = (u32_t)thread->stack_obj; - u32_t size = thread->stack_info.size + + uint32_t base = (uint32_t)thread->stack_obj; + uint32_t size = thread->stack_info.size + (thread->stack_info.start - base); __ASSERT(region_num < _MAX_DYNAMIC_MPU_REGIONS_NUM, @@ -212,8 +212,8 @@ void z_arm_configure_dynamic_mpu_regions(struct k_thread *thread) struct k_mem_partition guard; /* Privileged stack guard */ - u32_t guard_start; - u32_t guard_size = MPU_GUARD_ALIGN_AND_SIZE; + uint32_t guard_start; + uint32_t guard_size = MPU_GUARD_ALIGN_AND_SIZE; #if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) if ((thread->base.user_options & K_FP_REGS) != 0) { @@ -225,15 +225,15 @@ void z_arm_configure_dynamic_mpu_regions(struct k_thread *thread) if (thread->arch.priv_stack_start) { guard_start = thread->arch.priv_stack_start - guard_size; - __ASSERT((u32_t)&z_priv_stacks_ram_start <= guard_start, + __ASSERT((uint32_t)&z_priv_stacks_ram_start <= guard_start, "Guard start: (0x%x) below privilege stacks boundary: (0x%x)", - guard_start, (u32_t)&z_priv_stacks_ram_start); + guard_start, (uint32_t)&z_priv_stacks_ram_start); } else { guard_start = thread->stack_info.start - guard_size; - __ASSERT((u32_t)thread->stack_obj == guard_start, + __ASSERT((uint32_t)thread->stack_obj == guard_start, "Guard start (0x%x) not beginning at stack object (0x%x)\n", - guard_start, (u32_t)thread->stack_obj); + guard_start, (uint32_t)thread->stack_obj); } #else guard_start = thread->stack_info.start - guard_size; @@ -318,7 +318,7 @@ void arch_mem_domain_destroy(struct k_mem_domain *domain) } void arch_mem_domain_partition_remove(struct k_mem_domain *domain, - u32_t partition_id) + uint32_t partition_id) { /* Request to remove a partition from a memory domain. * This resets the access permissions of the partition @@ -335,7 +335,7 @@ void arch_mem_domain_partition_remove(struct k_mem_domain *domain, } void arch_mem_domain_partition_add(struct k_mem_domain *domain, - u32_t partition_id) + uint32_t partition_id) { /* No-op on this architecture */ } diff --git a/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu_dev.h b/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu_dev.h index 7b43cceab7..89111f86de 100644 --- a/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu_dev.h +++ b/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu_dev.h @@ -133,8 +133,8 @@ struct k_thread; * requirements of the MPU hardware. */ void arm_core_mpu_configure_static_mpu_regions( - const struct k_mem_partition *static_regions[], const u8_t regions_num, - const u32_t background_area_start, const u32_t background_area_end); + const struct k_mem_partition *static_regions[], const uint8_t regions_num, + const uint32_t background_area_start, const uint32_t background_area_end); #if defined(CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS) @@ -165,7 +165,7 @@ void arm_core_mpu_configure_static_mpu_regions( */ void arm_core_mpu_mark_areas_for_dynamic_regions( const struct k_mem_partition dyn_region_areas[], - const u8_t dyn_region_areas_num); + const uint8_t dyn_region_areas_num); #endif /* CONFIG_MPU_REQUIRES_NON_OVERLAPPING_REGIONS */ @@ -185,7 +185,7 @@ void arm_core_mpu_mark_areas_for_dynamic_regions( * not exceed the number of (currently) available MPU indices. */ void arm_core_mpu_configure_dynamic_mpu_regions( - const struct k_mem_partition *dynamic_regions[], u8_t regions_num); + const struct k_mem_partition *dynamic_regions[], uint8_t regions_num); #if defined(CONFIG_USERSPACE) /** @@ -215,7 +215,7 @@ void arm_core_mpu_mem_partition_config_update( * @param base base address in RAM * @param size size of the region */ -void arm_core_mpu_configure(u8_t type, u32_t base, u32_t size); +void arm_core_mpu_configure(uint8_t type, uint32_t base, uint32_t size); /** * @brief configure MPU regions for the memory partitions of the memory domain @@ -237,7 +237,7 @@ void arm_core_mpu_configure_user_context(struct k_thread *thread); * @param part_index memory partition index * @param part memory partition info */ -void arm_core_mpu_configure_mem_partition(u32_t part_index, +void arm_core_mpu_configure_mem_partition(uint32_t part_index, struct k_mem_partition *part); /** @@ -245,7 +245,7 @@ void arm_core_mpu_configure_mem_partition(u32_t part_index, * * @param part_index memory partition index */ -void arm_core_mpu_mem_partition_remove(u32_t part_index); +void arm_core_mpu_mem_partition_remove(uint32_t part_index); /** * @brief Get the maximum number of available (free) MPU region indices diff --git a/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu.c b/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu.c index 88c6ff0d3d..7eaf863a52 100644 --- a/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu.c +++ b/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu.c @@ -36,12 +36,12 @@ LOG_MODULE_DECLARE(mpu); * have been reserved by the MPU driver to program the static (fixed) memory * regions. */ -static u8_t static_regions_num; +static uint8_t static_regions_num; /** * Get the number of supported MPU regions. */ -static inline u8_t get_num_regions(void) +static inline uint8_t get_num_regions(void) { #if defined(CONFIG_CPU_CORTEX_M0PLUS) || \ defined(CONFIG_CPU_CORTEX_M3) || \ @@ -55,11 +55,11 @@ static inline u8_t get_num_regions(void) return NUM_MPU_REGIONS; #else - u32_t type = MPU->TYPE; + uint32_t type = MPU->TYPE; type = (type & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos; - return (u8_t)type; + return (uint8_t)type; #endif /* CPU_CORTEX_M0PLUS | CPU_CORTEX_M3 | CPU_CORTEX_M4 */ } @@ -76,7 +76,7 @@ static inline u8_t get_num_regions(void) #error "Unsupported ARM CPU" #endif -static int region_allocate_and_init(const u8_t index, +static int region_allocate_and_init(const uint8_t index, const struct arm_mpu_region *region_conf) { /* Attempt to allocate new region index. */ @@ -98,7 +98,7 @@ static int region_allocate_and_init(const u8_t index, /* This internal function programs an MPU region * of a given configuration at a given MPU index. */ -static int mpu_configure_region(const u8_t index, +static int mpu_configure_region(const uint8_t index, const struct k_mem_partition *new_region) { struct arm_mpu_region region_conf; @@ -122,7 +122,7 @@ static int mpu_configure_region(const u8_t index, * sanity check of the memory regions to be programmed. */ static int mpu_configure_regions(const struct k_mem_partition - *regions[], u8_t regions_num, u8_t start_reg_index, + *regions[], uint8_t regions_num, uint8_t start_reg_index, bool do_sanity_check) { int i; @@ -192,21 +192,21 @@ void arm_core_mpu_mem_partition_config_update( k_mem_partition_attr_t *new_attr) { /* Find the partition. ASSERT if not found. */ - u8_t i; - u8_t reg_index = get_num_regions(); + uint8_t i; + uint8_t reg_index = get_num_regions(); for (i = get_dyn_region_min_index(); i < get_num_regions(); i++) { if (!is_enabled_region(i)) { continue; } - u32_t base = mpu_region_get_base(i); + uint32_t base = mpu_region_get_base(i); if (base != partition->start) { continue; } - u32_t size = mpu_region_get_size(i); + uint32_t size = mpu_region_get_size(i); if (size != partition->size) { continue; @@ -249,8 +249,8 @@ int arm_core_mpu_buffer_validate(void *addr, size_t size, int write) * @brief configure fixed (static) MPU regions. */ void arm_core_mpu_configure_static_mpu_regions(const struct k_mem_partition - *static_regions[], const u8_t regions_num, - const u32_t background_area_start, const u32_t background_area_end) + *static_regions[], const uint8_t regions_num, + const uint32_t background_area_start, const uint32_t background_area_end) { if (mpu_configure_static_mpu_regions(static_regions, regions_num, background_area_start, background_area_end) == -EINVAL) { @@ -266,7 +266,7 @@ void arm_core_mpu_configure_static_mpu_regions(const struct k_mem_partition */ void arm_core_mpu_mark_areas_for_dynamic_regions( const struct k_mem_partition dyn_region_areas[], - const u8_t dyn_region_areas_num) + const uint8_t dyn_region_areas_num) { if (mpu_mark_areas_for_dynamic_regions(dyn_region_areas, dyn_region_areas_num) == -EINVAL) { @@ -281,7 +281,7 @@ void arm_core_mpu_mark_areas_for_dynamic_regions( * @brief configure dynamic MPU regions. */ void arm_core_mpu_configure_dynamic_mpu_regions(const struct k_mem_partition - *dynamic_regions[], u8_t regions_num) + *dynamic_regions[], uint8_t regions_num) { if (mpu_configure_dynamic_mpu_regions(dynamic_regions, regions_num) == -EINVAL) { @@ -301,7 +301,7 @@ void arm_core_mpu_configure_dynamic_mpu_regions(const struct k_mem_partition */ static int arm_mpu_init(struct device *arg) { - u32_t r_index; + uint32_t r_index; if (mpu_config.num_regions > get_num_regions()) { /* Attempt to configure more MPU regions than diff --git a/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu_v7_internal.h b/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu_v7_internal.h index 08d903808c..01ffa4e692 100644 --- a/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu_v7_internal.h +++ b/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu_v7_internal.h @@ -25,7 +25,7 @@ static void mpu_init(void) * Note: * The caller must provide a valid region index. */ -static void region_init(const u32_t index, +static void region_init(const uint32_t index, const struct arm_mpu_region *region_conf) { /* Select the region you want to access */ @@ -71,7 +71,7 @@ static int mpu_partition_is_valid(const struct k_mem_partition *part) * power-of-two value, and the returned SIZE field value corresponds * to that power-of-two value. */ -static inline u32_t size_to_mpu_rasr_size(u32_t size) +static inline uint32_t size_to_mpu_rasr_size(uint32_t size) { /* The minimal supported region size is 32 bytes */ if (size <= 32U) { @@ -98,7 +98,7 @@ static inline u32_t size_to_mpu_rasr_size(u32_t size) */ static inline void get_region_attr_from_k_mem_partition_info( arm_mpu_region_attr_t *p_attr, - const k_mem_partition_attr_t *attr, u32_t base, u32_t size) + const k_mem_partition_attr_t *attr, uint32_t base, uint32_t size) { /* in ARMv7-M MPU the base address is not required * to determine region attributes @@ -126,21 +126,21 @@ static inline int get_dyn_region_min_index(void) * This internal function converts the SIZE field value of MPU_RASR * to the region size (in bytes). */ -static inline u32_t mpu_rasr_size_to_size(u32_t rasr_size) +static inline uint32_t mpu_rasr_size_to_size(uint32_t rasr_size) { return 1 << (rasr_size + 1); } -static inline u32_t mpu_region_get_base(u32_t index) +static inline uint32_t mpu_region_get_base(uint32_t index) { MPU->RNR = index; return MPU->RBAR & MPU_RBAR_ADDR_Msk; } -static inline u32_t mpu_region_get_size(u32_t index) +static inline uint32_t mpu_region_get_size(uint32_t index) { MPU->RNR = index; - u32_t rasr_size = (MPU->RASR & MPU_RASR_SIZE_Msk) >> MPU_RASR_SIZE_Pos; + uint32_t rasr_size = (MPU->RASR & MPU_RASR_SIZE_Msk) >> MPU_RASR_SIZE_Pos; return mpu_rasr_size_to_size(rasr_size); } @@ -151,11 +151,11 @@ static inline u32_t mpu_region_get_size(u32_t index) * Note: * The caller must provide a valid region number. */ -static inline int is_enabled_region(u32_t index) +static inline int is_enabled_region(uint32_t index) { /* Lock IRQs to ensure RNR value is correct when reading RASR. */ unsigned int key; - u32_t rasr; + uint32_t rasr; key = irq_lock(); MPU->RNR = index; @@ -177,11 +177,11 @@ static inline int is_enabled_region(u32_t index) * Note: * The caller must provide a valid region number. */ -static inline u32_t get_region_ap(u32_t r_index) +static inline uint32_t get_region_ap(uint32_t r_index) { /* Lock IRQs to ensure RNR value is correct when reading RASR. */ unsigned int key; - u32_t rasr; + uint32_t rasr; key = irq_lock(); MPU->RNR = r_index; @@ -197,16 +197,16 @@ static inline u32_t get_region_ap(u32_t r_index) * Note: * The caller must provide a valid region number. */ -static inline int is_in_region(u32_t r_index, u32_t start, u32_t size) +static inline int is_in_region(uint32_t r_index, uint32_t start, uint32_t size) { - u32_t r_addr_start; - u32_t r_size_lshift; - u32_t r_addr_end; - u32_t end; + uint32_t r_addr_start; + uint32_t r_size_lshift; + uint32_t r_addr_end; + uint32_t end; /* Lock IRQs to ensure RNR value is correct when reading RBAR, RASR. */ unsigned int key; - u32_t rbar, rasr; + uint32_t rbar, rasr; key = irq_lock(); MPU->RNR = r_index; @@ -237,9 +237,9 @@ static inline int is_in_region(u32_t r_index, u32_t start, u32_t size) * Note: * The caller must provide a valid region number. */ -static inline int is_user_accessible_region(u32_t r_index, int write) +static inline int is_user_accessible_region(uint32_t r_index, int write) { - u32_t r_ap = get_region_ap(r_index); + uint32_t r_ap = get_region_ap(r_index); if (write) { @@ -255,12 +255,12 @@ static inline int is_user_accessible_region(u32_t r_index, int write) */ static inline int mpu_buffer_validate(void *addr, size_t size, int write) { - s32_t r_index; + int32_t r_index; /* Iterate all mpu regions in reversed order */ for (r_index = get_num_regions() - 1; r_index >= 0; r_index--) { if (!is_enabled_region(r_index) || - !is_in_region(r_index, (u32_t)addr, size)) { + !is_in_region(r_index, (uint32_t)addr, size)) { continue; } @@ -282,11 +282,11 @@ static inline int mpu_buffer_validate(void *addr, size_t size, int write) #endif /* CONFIG_USERSPACE */ -static int mpu_configure_region(const u8_t index, +static int mpu_configure_region(const uint8_t index, const struct k_mem_partition *new_region); static int mpu_configure_regions(const struct k_mem_partition - *regions[], u8_t regions_num, u8_t start_reg_index, + *regions[], uint8_t regions_num, uint8_t start_reg_index, bool do_sanity_check); /* This internal function programs the static MPU regions. @@ -298,9 +298,9 @@ static int mpu_configure_regions(const struct k_mem_partition * performed, the error signal is propagated to the caller of the function. */ static int mpu_configure_static_mpu_regions(const struct k_mem_partition - *static_regions[], const u8_t regions_num, - const u32_t background_area_base, - const u32_t background_area_end) + *static_regions[], const uint8_t regions_num, + const uint32_t background_area_base, + const uint32_t background_area_end) { int mpu_reg_index = static_regions_num; @@ -327,7 +327,7 @@ static int mpu_configure_static_mpu_regions(const struct k_mem_partition * performed, the error signal is propagated to the caller of the function. */ static int mpu_configure_dynamic_mpu_regions(const struct k_mem_partition - *dynamic_regions[], u8_t regions_num) + *dynamic_regions[], uint8_t regions_num) { int mpu_reg_index = static_regions_num; diff --git a/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu_v8_internal.h b/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu_v8_internal.h index 81d0d9bc43..e9c5a3c50a 100644 --- a/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu_v8_internal.h +++ b/arch/arm/core/aarch32/cortex_m/mpu/arm_mpu_v8_internal.h @@ -57,7 +57,7 @@ static void mpu_init(void) * Note: * The caller must provide a valid region index. */ -static void region_init(const u32_t index, +static void region_init(const uint32_t index, const struct arm_mpu_region *region_conf) { ARM_MPU_SetRegion( @@ -116,10 +116,10 @@ static int mpu_partition_is_valid(const struct k_mem_partition *part) * needs to be enabled. * */ -static inline int get_region_index(u32_t start, u32_t size) +static inline int get_region_index(uint32_t start, uint32_t size) { - u32_t region_start_addr = arm_cmse_mpu_region_get(start); - u32_t region_end_addr = arm_cmse_mpu_region_get(start + size - 1); + uint32_t region_start_addr = arm_cmse_mpu_region_get(start); + uint32_t region_end_addr = arm_cmse_mpu_region_get(start + size - 1); /* MPU regions are contiguous so return the region number, * if both start and end address are in the same region. @@ -130,33 +130,33 @@ static inline int get_region_index(u32_t start, u32_t size) return -EINVAL; } -static inline u32_t mpu_region_get_base(const u32_t index) +static inline uint32_t mpu_region_get_base(const uint32_t index) { MPU->RNR = index; return MPU->RBAR & MPU_RBAR_BASE_Msk; } -static inline void mpu_region_set_base(const u32_t index, const u32_t base) +static inline void mpu_region_set_base(const uint32_t index, const uint32_t base) { MPU->RNR = index; MPU->RBAR = (MPU->RBAR & (~MPU_RBAR_BASE_Msk)) | (base & MPU_RBAR_BASE_Msk); } -static inline u32_t mpu_region_get_last_addr(const u32_t index) +static inline uint32_t mpu_region_get_last_addr(const uint32_t index) { MPU->RNR = index; return (MPU->RLAR & MPU_RLAR_LIMIT_Msk) | (~MPU_RLAR_LIMIT_Msk); } -static inline void mpu_region_set_limit(const u32_t index, const u32_t limit) +static inline void mpu_region_set_limit(const uint32_t index, const uint32_t limit) { MPU->RNR = index; MPU->RLAR = (MPU->RLAR & (~MPU_RLAR_LIMIT_Msk)) | (limit & MPU_RLAR_LIMIT_Msk); } -static inline void mpu_region_get_access_attr(const u32_t index, +static inline void mpu_region_get_access_attr(const uint32_t index, arm_mpu_region_attr_t *attr) { MPU->RNR = index; @@ -167,7 +167,7 @@ static inline void mpu_region_get_access_attr(const u32_t index, MPU_RLAR_AttrIndx_Pos; } -static inline void mpu_region_get_conf(const u32_t index, +static inline void mpu_region_get_conf(const uint32_t index, struct arm_mpu_region *region_conf) { MPU->RNR = index; @@ -193,7 +193,7 @@ static inline void mpu_region_get_conf(const u32_t index, */ static inline void get_region_attr_from_k_mem_partition_info( arm_mpu_region_attr_t *p_attr, - const k_mem_partition_attr_t *attr, u32_t base, u32_t size) + const k_mem_partition_attr_t *attr, uint32_t base, uint32_t size) { p_attr->rbar = attr->rbar & (MPU_RBAR_XN_Msk | MPU_RBAR_AP_Msk | MPU_RBAR_SH_Msk); @@ -228,7 +228,7 @@ static inline int get_dyn_region_min_index(void) return dyn_reg_min_index; } -static inline u32_t mpu_region_get_size(u32_t index) +static inline uint32_t mpu_region_get_size(uint32_t index) { return mpu_region_get_last_addr(index) + 1 - mpu_region_get_base(index); @@ -240,7 +240,7 @@ static inline u32_t mpu_region_get_size(u32_t index) * Note: * The caller must provide a valid region number. */ -static inline int is_enabled_region(u32_t index) +static inline int is_enabled_region(uint32_t index) { MPU->RNR = index; @@ -272,8 +272,8 @@ static inline int is_enabled_region(u32_t index) */ static inline int mpu_buffer_validate(void *addr, size_t size, int write) { - u32_t _addr = (u32_t)addr; - u32_t _size = (u32_t)size; + uint32_t _addr = (uint32_t)addr; + uint32_t _size = (uint32_t)size; if (write) { if (arm_cmse_addr_range_readwrite_ok(_addr, _size, 1)) { @@ -290,8 +290,8 @@ static inline int mpu_buffer_validate(void *addr, size_t size, int write) * Validation failure may be due to SAU/IDAU presence. * We re-check user accessibility based on MPU only. */ - s32_t r_index_base = arm_cmse_mpu_region_get(_addr); - s32_t r_index_last = arm_cmse_mpu_region_get(_addr + _size - 1); + int32_t r_index_base = arm_cmse_mpu_region_get(_addr); + int32_t r_index_last = arm_cmse_mpu_region_get(_addr + _size - 1); if ((r_index_base != -EINVAL) && (r_index_base == r_index_last)) { /* Valid MPU region, check permissions on base address only. */ @@ -312,15 +312,15 @@ static inline int mpu_buffer_validate(void *addr, size_t size, int write) #endif /* CONFIG_USERSPACE */ -static int region_allocate_and_init(const u8_t index, +static int region_allocate_and_init(const uint8_t index, const struct arm_mpu_region *region_conf); -static int mpu_configure_region(const u8_t index, +static int mpu_configure_region(const uint8_t index, const struct k_mem_partition *new_region); #if !defined(CONFIG_MPU_GAP_FILLING) static int mpu_configure_regions(const struct k_mem_partition - *regions[], u8_t regions_num, u8_t start_reg_index, + *regions[], uint8_t regions_num, uint8_t start_reg_index, bool do_sanity_check); #endif @@ -332,7 +332,7 @@ static int mpu_configure_regions(const struct k_mem_partition * area, effectively, leaving no space in this area uncovered by MPU. */ static int mpu_configure_regions_and_partition(const struct k_mem_partition - *regions[], u8_t regions_num, u8_t start_reg_index, + *regions[], uint8_t regions_num, uint8_t start_reg_index, bool do_sanity_check) { int i; @@ -367,9 +367,9 @@ static int mpu_configure_regions_and_partition(const struct k_mem_partition * The new memory region is to be placed inside the underlying * region, possibly splitting the underlying region into two. */ - u32_t u_reg_base = mpu_region_get_base(u_reg_index); - u32_t u_reg_last = mpu_region_get_last_addr(u_reg_index); - u32_t reg_last = regions[i]->start + regions[i]->size - 1; + uint32_t u_reg_base = mpu_region_get_base(u_reg_index); + uint32_t u_reg_last = mpu_region_get_last_addr(u_reg_index); + uint32_t reg_last = regions[i]->start + regions[i]->size - 1; if ((regions[i]->start == u_reg_base) && (reg_last == u_reg_last)) { @@ -468,9 +468,9 @@ static int mpu_configure_regions_and_partition(const struct k_mem_partition * performed, the error signal is propagated to the caller of the function. */ static int mpu_configure_static_mpu_regions(const struct k_mem_partition - *static_regions[], const u8_t regions_num, - const u32_t background_area_base, - const u32_t background_area_end) + *static_regions[], const uint8_t regions_num, + const uint32_t background_area_base, + const uint32_t background_area_end) { int mpu_reg_index = static_regions_num; @@ -495,7 +495,7 @@ static int mpu_configure_static_mpu_regions(const struct k_mem_partition */ static int mpu_mark_areas_for_dynamic_regions( const struct k_mem_partition dyn_region_areas[], - const u8_t dyn_region_areas_num) + const uint8_t dyn_region_areas_num) { /* In ARMv8-M architecture we need to store the index values * and the default configuration of the MPU regions, inside @@ -539,7 +539,7 @@ static int mpu_mark_areas_for_dynamic_regions( * performed, the error signal is propagated to the caller of the function. */ static int mpu_configure_dynamic_mpu_regions(const struct k_mem_partition - *dynamic_regions[], u8_t regions_num) + *dynamic_regions[], uint8_t regions_num) { int mpu_reg_index = static_regions_num; diff --git a/arch/arm/core/aarch32/cortex_m/mpu/nxp_mpu.c b/arch/arm/core/aarch32/cortex_m/mpu/nxp_mpu.c index 6451591e2a..af4aa46898 100644 --- a/arch/arm/core/aarch32/cortex_m/mpu/nxp_mpu.c +++ b/arch/arm/core/aarch32/cortex_m/mpu/nxp_mpu.c @@ -22,7 +22,7 @@ LOG_MODULE_DECLARE(mpu); * have been reserved by the MPU driver to program the static (fixed) memory * regions. */ -static u8_t static_regions_num; +static uint8_t static_regions_num; /* Global MPU configuration at system initialization. */ static void mpu_init(void) @@ -34,7 +34,7 @@ static void mpu_init(void) /** * Get the number of supported MPU regions. */ -static inline u8_t get_num_regions(void) +static inline uint8_t get_num_regions(void) { return FSL_FEATURE_SYSMPU_DESCRIPTOR_COUNT; } @@ -71,12 +71,12 @@ static int mpu_partition_is_valid(const struct k_mem_partition *part) * Note: * The caller must provide a valid region index. */ -static void region_init(const u32_t index, +static void region_init(const uint32_t index, const struct nxp_mpu_region *region_conf) { - u32_t region_base = region_conf->base; - u32_t region_end = region_conf->end; - u32_t region_attr = region_conf->attr.attr; + uint32_t region_base = region_conf->base; + uint32_t region_end = region_conf->end; + uint32_t region_attr = region_conf->attr.attr; if (index == 0U) { /* The MPU does not allow writes from the core to affect the @@ -88,11 +88,11 @@ static void region_init(const u32_t index, */ __ASSERT(region_base == SYSMPU->WORD[index][0], "Region %d base address got 0x%08x expected 0x%08x", - index, region_base, (u32_t)SYSMPU->WORD[index][0]); + index, region_base, (uint32_t)SYSMPU->WORD[index][0]); __ASSERT(region_end == SYSMPU->WORD[index][1], "Region %d end address got 0x%08x expected 0x%08x", - index, region_end, (u32_t)SYSMPU->WORD[index][1]); + index, region_end, (uint32_t)SYSMPU->WORD[index][1]); /* Changes to the RGD0_WORD2 alterable fields should be done * via a write to RGDAAC0. @@ -107,14 +107,14 @@ static void region_init(const u32_t index, } LOG_DBG("[%d] 0x%08x 0x%08x 0x%08x 0x%08x", index, - (u32_t)SYSMPU->WORD[index][0], - (u32_t)SYSMPU->WORD[index][1], - (u32_t)SYSMPU->WORD[index][2], - (u32_t)SYSMPU->WORD[index][3]); + (uint32_t)SYSMPU->WORD[index][0], + (uint32_t)SYSMPU->WORD[index][1], + (uint32_t)SYSMPU->WORD[index][2], + (uint32_t)SYSMPU->WORD[index][3]); } -static int region_allocate_and_init(const u8_t index, +static int region_allocate_and_init(const uint8_t index, const struct nxp_mpu_region *region_conf) { /* Attempt to allocate new region index. */ @@ -140,7 +140,7 @@ static int region_allocate_and_init(const u8_t index, */ static inline void get_region_attr_from_k_mem_partition_info( nxp_mpu_region_attr_t *p_attr, - const k_mem_partition_attr_t *attr, u32_t base, u32_t size) + const k_mem_partition_attr_t *attr, uint32_t base, uint32_t size) { /* in NXP MPU the base address and size are not required * to determine region attributes @@ -154,7 +154,7 @@ static inline void get_region_attr_from_k_mem_partition_info( /* This internal function programs an MPU region * of a given configuration at a given MPU index. */ -static int mpu_configure_region(const u8_t index, +static int mpu_configure_region(const uint8_t index, const struct k_mem_partition *new_region) { struct nxp_mpu_region region_conf; @@ -174,7 +174,7 @@ static int mpu_configure_region(const u8_t index, #if defined(CONFIG_MPU_STACK_GUARD) /* This internal function partitions the SRAM MPU region */ -static int mpu_sram_partitioning(u8_t index, +static int mpu_sram_partitioning(uint8_t index, const struct k_mem_partition *p_region) { /* @@ -234,7 +234,7 @@ static int mpu_sram_partitioning(u8_t index, * sanity check of the memory regions to be programmed. */ static int mpu_configure_regions(const struct k_mem_partition - *regions[], u8_t regions_num, u8_t start_reg_index, + *regions[], uint8_t regions_num, uint8_t start_reg_index, bool do_sanity_check) { int i; @@ -294,9 +294,9 @@ static int mpu_configure_regions(const struct k_mem_partition * performed, the error signal is propagated to the caller of the function. */ static int mpu_configure_static_mpu_regions(const struct k_mem_partition - *static_regions[], const u8_t regions_num, - const u32_t background_area_base, - const u32_t background_area_end) + *static_regions[], const uint8_t regions_num, + const uint32_t background_area_base, + const uint32_t background_area_end) { int mpu_reg_index = static_regions_num; @@ -323,7 +323,7 @@ static int mpu_configure_static_mpu_regions(const struct k_mem_partition * performed, the error signal is propagated to the caller of the function. */ static int mpu_configure_dynamic_mpu_regions(const struct k_mem_partition - *dynamic_regions[], u8_t regions_num) + *dynamic_regions[], uint8_t regions_num) { unsigned int key; @@ -397,12 +397,12 @@ void arm_core_mpu_disable(void) #if defined(CONFIG_USERSPACE) -static inline u32_t mpu_region_get_base(u32_t r_index) +static inline uint32_t mpu_region_get_base(uint32_t r_index) { return SYSMPU->WORD[r_index][0]; } -static inline u32_t mpu_region_get_size(u32_t r_index) +static inline uint32_t mpu_region_get_size(uint32_t r_index) { /* + 1 - */ return (SYSMPU->WORD[r_index][1] + 1) - SYSMPU->WORD[r_index][0]; @@ -414,7 +414,7 @@ static inline u32_t mpu_region_get_size(u32_t r_index) * Note: * The caller must provide a valid region number. */ -static inline int is_enabled_region(u32_t r_index) +static inline int is_enabled_region(uint32_t r_index) { return SYSMPU->WORD[r_index][3] & SYSMPU_WORD_VLD_MASK; } @@ -425,11 +425,11 @@ static inline int is_enabled_region(u32_t r_index) * Note: * The caller must provide a valid region number. */ -static inline int is_in_region(u32_t r_index, u32_t start, u32_t size) +static inline int is_in_region(uint32_t r_index, uint32_t start, uint32_t size) { - u32_t r_addr_start; - u32_t r_addr_end; - u32_t end; + uint32_t r_addr_start; + uint32_t r_addr_end; + uint32_t end; r_addr_start = SYSMPU->WORD[r_index][0]; r_addr_end = SYSMPU->WORD[r_index][1]; @@ -454,21 +454,21 @@ void arm_core_mpu_mem_partition_config_update( k_mem_partition_attr_t *new_attr) { /* Find the partition. ASSERT if not found. */ - u8_t i; - u8_t reg_index = get_num_regions(); + uint8_t i; + uint8_t reg_index = get_num_regions(); for (i = static_regions_num; i < get_num_regions(); i++) { if (!is_enabled_region(i)) { continue; } - u32_t base = mpu_region_get_base(i); + uint32_t base = mpu_region_get_base(i); if (base != partition->start) { continue; } - u32_t size = mpu_region_get_size(i); + uint32_t size = mpu_region_get_size(i); if (size != partition->size) { continue; @@ -501,9 +501,9 @@ int arm_core_mpu_get_max_available_dyn_regions(void) * Note: * The caller must provide a valid region number. */ -static inline int is_user_accessible_region(u32_t r_index, int write) +static inline int is_user_accessible_region(uint32_t r_index, int write) { - u32_t r_ap = SYSMPU->WORD[r_index][2]; + uint32_t r_ap = SYSMPU->WORD[r_index][2]; if (write) { return (r_ap & MPU_REGION_WRITE) == MPU_REGION_WRITE; @@ -517,12 +517,12 @@ static inline int is_user_accessible_region(u32_t r_index, int write) */ int arm_core_mpu_buffer_validate(void *addr, size_t size, int write) { - u8_t r_index; + uint8_t r_index; /* Iterate through all MPU regions */ for (r_index = 0U; r_index < get_num_regions(); r_index++) { if (!is_enabled_region(r_index) || - !is_in_region(r_index, (u32_t)addr, size)) { + !is_in_region(r_index, (uint32_t)addr, size)) { continue; } @@ -545,8 +545,8 @@ int arm_core_mpu_buffer_validate(void *addr, size_t size, int write) * @brief configure fixed (static) MPU regions. */ void arm_core_mpu_configure_static_mpu_regions(const struct k_mem_partition - *static_regions[], const u8_t regions_num, - const u32_t background_area_start, const u32_t background_area_end) + *static_regions[], const uint8_t regions_num, + const uint32_t background_area_start, const uint32_t background_area_end) { if (mpu_configure_static_mpu_regions(static_regions, regions_num, background_area_start, background_area_end) == -EINVAL) { @@ -560,7 +560,7 @@ void arm_core_mpu_configure_static_mpu_regions(const struct k_mem_partition * @brief configure dynamic MPU regions. */ void arm_core_mpu_configure_dynamic_mpu_regions(const struct k_mem_partition - *dynamic_regions[], u8_t regions_num) + *dynamic_regions[], uint8_t regions_num) { if (mpu_configure_dynamic_mpu_regions(dynamic_regions, regions_num) == -EINVAL) { @@ -582,7 +582,7 @@ static int nxp_mpu_init(struct device *arg) { ARG_UNUSED(arg); - u32_t r_index; + uint32_t r_index; if (mpu_config.num_regions > get_num_regions()) { /* Attempt to configure more MPU regions than diff --git a/arch/arm/core/aarch32/cortex_m/tz/arm_core_tz.c b/arch/arm/core/aarch32/cortex_m/tz/arm_core_tz.c index 125d917777..ddebeff459 100644 --- a/arch/arm/core/aarch32/cortex_m/tz/arm_core_tz.c +++ b/arch/arm/core/aarch32/cortex_m/tz/arm_core_tz.c @@ -8,24 +8,24 @@ #include #include -static void configure_nonsecure_vtor_offset(u32_t vtor_ns) +static void configure_nonsecure_vtor_offset(uint32_t vtor_ns) { SCB_NS->VTOR = vtor_ns; } -static void configure_nonsecure_msp(u32_t msp_ns) +static void configure_nonsecure_msp(uint32_t msp_ns) { __TZ_set_MSP_NS(msp_ns); } -static void configure_nonsecure_psp(u32_t psp_ns) +static void configure_nonsecure_psp(uint32_t psp_ns) { __TZ_set_PSP_NS(psp_ns); } -static void configure_nonsecure_control(u32_t spsel_ns, u32_t npriv_ns) +static void configure_nonsecure_control(uint32_t spsel_ns, uint32_t npriv_ns) { - u32_t control_ns = __TZ_get_CONTROL_NS(); + uint32_t control_ns = __TZ_get_CONTROL_NS(); /* Only nPRIV and SPSEL bits are banked between security states. */ control_ns &= ~(CONTROL_SPSEL_Msk | CONTROL_nPRIV_Msk); @@ -46,12 +46,12 @@ static void configure_nonsecure_control(u32_t spsel_ns, u32_t npriv_ns) * Stack Pointer Limit registers. */ -void tz_nonsecure_msplim_set(u32_t val) +void tz_nonsecure_msplim_set(uint32_t val) { __TZ_set_MSPLIM_NS(val); } -void tz_nonsecure_psplim_set(u32_t val) +void tz_nonsecure_psplim_set(uint32_t val) { __TZ_set_PSPLIM_NS(val); } @@ -71,7 +71,7 @@ void tz_nonsecure_state_setup(const tz_nonsecure_setup_conf_t *p_ns_conf) void tz_nbanked_exception_target_state_set(int secure_state) { - u32_t aircr_payload = SCB->AIRCR & (~(SCB_AIRCR_VECTKEY_Msk)); + uint32_t aircr_payload = SCB->AIRCR & (~(SCB_AIRCR_VECTKEY_Msk)); if (secure_state) { aircr_payload &= ~(SCB_AIRCR_BFHFNMINS_Msk); } else { @@ -84,7 +84,7 @@ void tz_nbanked_exception_target_state_set(int secure_state) void tz_nonsecure_exception_prio_config(int secure_boost) { - u32_t aircr_payload = SCB->AIRCR & (~(SCB_AIRCR_VECTKEY_Msk)); + uint32_t aircr_payload = SCB->AIRCR & (~(SCB_AIRCR_VECTKEY_Msk)); if (secure_boost) { aircr_payload |= SCB_AIRCR_PRIS_Msk; } else { @@ -97,7 +97,7 @@ void tz_nonsecure_exception_prio_config(int secure_boost) void tz_nonsecure_system_reset_req_block(int block) { - u32_t aircr_payload = SCB->AIRCR & (~(SCB_AIRCR_VECTKEY_Msk)); + uint32_t aircr_payload = SCB->AIRCR & (~(SCB_AIRCR_VECTKEY_Msk)); if (block) { aircr_payload |= SCB_AIRCR_SYSRESETREQS_Msk; } else { @@ -130,7 +130,7 @@ void tz_sau_configure(int enable, int allns) } } -u32_t tz_sau_number_of_regions_get(void) +uint32_t tz_sau_number_of_regions_get(void) { return SAU->TYPE & SAU_TYPE_SREGION_Msk; } @@ -139,7 +139,7 @@ u32_t tz_sau_number_of_regions_get(void) #if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) int tz_sau_region_configure_enable(tz_sau_conf_t *p_sau_conf) { - u32_t regions = tz_sau_number_of_regions_get(); + uint32_t regions = tz_sau_number_of_regions_get(); if ((p_sau_conf->region_num == 0) || (p_sau_conf->region_num > (regions - 1))) { diff --git a/arch/arm/core/aarch32/fatal.c b/arch/arm/core/aarch32/fatal.c index 849a4ee69c..2021a4b2cb 100644 --- a/arch/arm/core/aarch32/fatal.c +++ b/arch/arm/core/aarch32/fatal.c @@ -27,10 +27,10 @@ static void esf_dump(const z_arch_esf_t *esf) for (int i = 0; i < 16; i += 4) { LOG_ERR("s[%2d]: 0x%08x s[%2d]: 0x%08x" " s[%2d]: 0x%08x s[%2d]: 0x%08x", - i, (u32_t)esf->s[i], - i + 1, (u32_t)esf->s[i + 1], - i + 2, (u32_t)esf->s[i + 2], - i + 3, (u32_t)esf->s[i + 3]); + i, (uint32_t)esf->s[i], + i + 1, (uint32_t)esf->s[i + 1], + i + 2, (uint32_t)esf->s[i + 2], + i + 3, (uint32_t)esf->s[i + 3]); } LOG_ERR("fpscr: 0x%08x", esf->fpscr); #endif @@ -88,7 +88,7 @@ void z_do_kernel_oops(const z_arch_esf_t *esf) FUNC_NORETURN void arch_syscall_oops(void *ssf_ptr) { - u32_t *ssf_contents = ssf_ptr; + uint32_t *ssf_contents = ssf_ptr; z_arch_esf_t oops_esf = { 0 }; /* TODO: Copy the rest of the register set out of ssf_ptr */ diff --git a/arch/arm/core/aarch32/irq_manage.c b/arch/arm/core/aarch32/irq_manage.c index 7fdcfec332..fae6ae6c71 100644 --- a/arch/arm/core/aarch32/irq_manage.c +++ b/arch/arm/core/aarch32/irq_manage.c @@ -61,7 +61,7 @@ int arch_irq_is_enabled(unsigned int irq) * * @return N/A */ -void z_arm_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags) +void z_arm_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags) { /* The kernel may reserve some of the highest priority levels. * So we offset the requested priority level with the number @@ -135,7 +135,7 @@ int arch_irq_is_enabled(unsigned int irq) * * @return N/A */ -void z_arm_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags) +void z_arm_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags) { arm_gic_irq_set_priority(irq, prio, flags); } @@ -181,7 +181,7 @@ void _arch_isr_direct_pm(void) #endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */ if (_kernel.idle) { - s32_t idle_val = _kernel.idle; + int32_t idle_val = _kernel.idle; _kernel.idle = 0; z_sys_power_save_idle_exit(idle_val); @@ -258,7 +258,7 @@ int irq_target_state_is_secure(unsigned int irq) #ifdef CONFIG_DYNAMIC_INTERRUPTS int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, void (*routine)(void *parameter), void *parameter, - u32_t flags) + uint32_t flags) { z_isr_install(irq, routine, parameter); z_arm_irq_priority_set(irq, priority, flags); @@ -268,7 +268,7 @@ int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, #ifdef CONFIG_DYNAMIC_DIRECT_INTERRUPTS static inline void z_arm_irq_dynamic_direct_isr_dispatch(void) { - u32_t irq = __get_IPSR() - 16; + uint32_t irq = __get_IPSR() - 16; if (irq < IRQ_TABLE_SIZE) { struct _isr_table_entry *isr_entry = &_sw_isr_table[irq]; diff --git a/arch/arm/core/aarch32/thread.c b/arch/arm/core/aarch32/thread.c index bd72b44f61..14893cb08c 100644 --- a/arch/arm/core/aarch32/thread.c +++ b/arch/arm/core/aarch32/thread.c @@ -36,7 +36,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, char *pStackMem = Z_THREAD_STACK_BUFFER(stack); char *stackEnd; /* Offset between the top of stack and the high end of stack area. */ - u32_t top_of_stack_offset = 0U; + uint32_t top_of_stack_offset = 0U; #if defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT) \ && defined(CONFIG_USERSPACE) @@ -58,14 +58,14 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, #ifdef CONFIG_THREAD_USERSPACE_LOCAL_DATA /* Reserve space on top of stack for local data. */ - u32_t p_local_data = Z_STACK_PTR_ALIGN(pStackMem + stackSize + uint32_t p_local_data = Z_STACK_PTR_ALIGN(pStackMem + stackSize - sizeof(*thread->userspace_local_data)); thread->userspace_local_data = (struct _thread_userspace_local_data *)(p_local_data); /* Top of actual stack must be moved below the user local data. */ - top_of_stack_offset = (u32_t) + top_of_stack_offset = (uint32_t) (pStackMem + stackSize - ((char *)p_local_data)); #endif /* CONFIG_THREAD_USERSPACE_LOCAL_DATA */ @@ -105,12 +105,12 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, #if defined(CONFIG_USERSPACE) if ((options & K_USER) != 0) { - pInitCtx->basic.pc = (u32_t)arch_user_mode_enter; + pInitCtx->basic.pc = (uint32_t)arch_user_mode_enter; } else { - pInitCtx->basic.pc = (u32_t)z_thread_entry; + pInitCtx->basic.pc = (uint32_t)z_thread_entry; } #else - pInitCtx->basic.pc = (u32_t)z_thread_entry; + pInitCtx->basic.pc = (uint32_t)z_thread_entry; #endif #if defined(CONFIG_CPU_CORTEX_M) @@ -118,10 +118,10 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, pInitCtx->basic.pc &= 0xfffffffe; #endif - pInitCtx->basic.a1 = (u32_t)pEntry; - pInitCtx->basic.a2 = (u32_t)parameter1; - pInitCtx->basic.a3 = (u32_t)parameter2; - pInitCtx->basic.a4 = (u32_t)parameter3; + pInitCtx->basic.a1 = (uint32_t)pEntry; + pInitCtx->basic.a2 = (uint32_t)parameter1; + pInitCtx->basic.a3 = (uint32_t)parameter2; + pInitCtx->basic.a4 = (uint32_t)parameter3; #if defined(CONFIG_CPU_CORTEX_M) pInitCtx->basic.xpsr = @@ -133,7 +133,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, #endif /* CONFIG_COMPILER_ISA_THUMB2 */ #endif /* CONFIG_CPU_CORTEX_M */ - thread->callee_saved.psp = (u32_t)pInitCtx; + thread->callee_saved.psp = (uint32_t)pInitCtx; thread->arch.basepri = 0; @@ -160,7 +160,7 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, /* Set up privileged stack before entering user mode */ _current->arch.priv_stack_start = - (u32_t)z_priv_stack_find(_current->stack_obj); + (uint32_t)z_priv_stack_find(_current->stack_obj); #if defined(CONFIG_MPU_STACK_GUARD) /* Stack guard area reserved at the bottom of the thread's * privileged stack. Adjust the available (writable) stack @@ -176,7 +176,7 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, #endif /* CONFIG_MPU_STACK_GUARD */ z_arm_userspace_enter(user_entry, p1, p2, p3, - (u32_t)_current->stack_info.start, + (uint32_t)_current->stack_info.start, _current->stack_info.size); CODE_UNREACHABLE; } @@ -211,17 +211,17 @@ void configure_builtin_stack_guard(struct k_thread *thread) * thread privileged stack being allocated in higher memory area * than the default thread stack (ensured by design). */ - u32_t guard_start = + uint32_t guard_start = ((thread->arch.priv_stack_start) && (__get_PSP() >= thread->arch.priv_stack_start)) ? - (u32_t)thread->arch.priv_stack_start : - (u32_t)thread->stack_obj; + (uint32_t)thread->arch.priv_stack_start : + (uint32_t)thread->stack_obj; - __ASSERT(thread->stack_info.start == ((u32_t)thread->stack_obj), + __ASSERT(thread->stack_info.start == ((uint32_t)thread->stack_obj), "stack_info.start does not point to the start of the" "thread allocated area."); #else - u32_t guard_start = thread->stack_info.start; + uint32_t guard_start = thread->stack_info.start; #endif #if defined(CONFIG_CPU_CORTEX_M_HAS_SPLIM) __set_PSPLIM(guard_start); @@ -277,7 +277,7 @@ void configure_builtin_stack_guard(struct k_thread *thread) * @return The lowest allowed stack frame pointer, if error is a * thread stack corruption, otherwise return 0. */ -u32_t z_check_thread_stack_fail(const u32_t fault_addr, const u32_t psp) +uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, const uint32_t psp) { const struct k_thread *thread = _current; @@ -286,10 +286,10 @@ u32_t z_check_thread_stack_fail(const u32_t fault_addr, const u32_t psp) } #if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) - u32_t guard_len = (thread->base.user_options & K_FP_REGS) ? + uint32_t guard_len = (thread->base.user_options & K_FP_REGS) ? MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE; #else - u32_t guard_len = MPU_GUARD_ALIGN_AND_SIZE; + uint32_t guard_len = MPU_GUARD_ALIGN_AND_SIZE; #endif /* CONFIG_FPU && CONFIG_FPU_SHARING */ #if defined(CONFIG_USERSPACE) @@ -305,9 +305,9 @@ u32_t z_check_thread_stack_fail(const u32_t fault_addr, const u32_t psp) return thread->arch.priv_stack_start; } } else { - if (psp < (u32_t)thread->stack_obj) { + if (psp < (uint32_t)thread->stack_obj) { /* Thread's user stack corruption */ - return (u32_t)thread->stack_obj; + return (uint32_t)thread->stack_obj; } } } else { @@ -421,7 +421,7 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, #if defined(CONFIG_BUILTIN_STACK_GUARD) /* Set PSPLIM register for built-in stack guarding of main thread. */ #if defined(CONFIG_CPU_CORTEX_M_HAS_SPLIM) - __set_PSPLIM((u32_t)main_stack); + __set_PSPLIM((uint32_t)main_stack); #else #error "Built-in PSP limit checks not supported by HW" #endif diff --git a/arch/arm/core/aarch64/arm_mmu.c b/arch/arm/core/aarch64/arm_mmu.c index 1ee25f3c80..b208e599aa 100644 --- a/arch/arm/core/aarch64/arm_mmu.c +++ b/arch/arm/core/aarch64/arm_mmu.c @@ -90,19 +90,19 @@ ((level) == 2) ? L2_SPACE : L3_SPACE) #endif -static u64_t base_xlat_table[NUM_BASE_LEVEL_ENTRIES] - __aligned(NUM_BASE_LEVEL_ENTRIES * sizeof(u64_t)); +static uint64_t base_xlat_table[NUM_BASE_LEVEL_ENTRIES] + __aligned(NUM_BASE_LEVEL_ENTRIES * sizeof(uint64_t)); -static u64_t xlat_tables[CONFIG_MAX_XLAT_TABLES][XLAT_TABLE_ENTRIES] - __aligned(XLAT_TABLE_ENTRIES * sizeof(u64_t)); +static uint64_t xlat_tables[CONFIG_MAX_XLAT_TABLES][XLAT_TABLE_ENTRIES] + __aligned(XLAT_TABLE_ENTRIES * sizeof(uint64_t)); /* Translation table control register settings */ -static u64_t get_tcr(int el) +static uint64_t get_tcr(int el) { - u64_t tcr; - u64_t pa_bits = CONFIG_ARM64_PA_BITS; - u64_t va_bits = CONFIG_ARM64_VA_BITS; - u64_t tcr_ps_bits; + uint64_t tcr; + uint64_t pa_bits = CONFIG_ARM64_PA_BITS; + uint64_t va_bits = CONFIG_ARM64_VA_BITS; + uint64_t tcr_ps_bits; switch (pa_bits) { case 48: @@ -145,20 +145,20 @@ static u64_t get_tcr(int el) return tcr; } -static int pte_desc_type(u64_t *pte) +static int pte_desc_type(uint64_t *pte) { return *pte & PTE_DESC_TYPE_MASK; } -static u64_t *calculate_pte_index(u64_t addr, int level) +static uint64_t *calculate_pte_index(uint64_t addr, int level) { int base_level = XLAT_TABLE_BASE_LEVEL; - u64_t *pte; - u64_t idx; + uint64_t *pte; + uint64_t idx; unsigned int i; /* Walk through all translation tables to find pte index */ - pte = (u64_t *)base_xlat_table; + pte = (uint64_t *)base_xlat_table; for (i = base_level; i <= XLAT_TABLE_LEVEL_MAX; i++) { idx = XLAT_TABLE_VA_IDX(addr, i); pte += idx; @@ -170,26 +170,26 @@ static u64_t *calculate_pte_index(u64_t addr, int level) if (pte_desc_type(pte) != PTE_TABLE_DESC) return NULL; /* Move to the next translation table level */ - pte = (u64_t *)(*pte & 0x0000fffffffff000ULL); + pte = (uint64_t *)(*pte & 0x0000fffffffff000ULL); } return NULL; } -static void set_pte_table_desc(u64_t *pte, u64_t *table, unsigned int level) +static void set_pte_table_desc(uint64_t *pte, uint64_t *table, unsigned int level) { #if DUMP_PTE MMU_DEBUG("%s", XLAT_TABLE_LEVEL_SPACE(level)); MMU_DEBUG("%p: [Table] %p\n", pte, table); #endif /* Point pte to new table */ - *pte = PTE_TABLE_DESC | (u64_t)table; + *pte = PTE_TABLE_DESC | (uint64_t)table; } -static void set_pte_block_desc(u64_t *pte, u64_t addr_pa, +static void set_pte_block_desc(uint64_t *pte, uint64_t addr_pa, unsigned int attrs, unsigned int level) { - u64_t desc = addr_pa; + uint64_t desc = addr_pa; unsigned int mem_type; desc |= (level == 3) ? PTE_PAGE_DESC : PTE_BLOCK_DESC; @@ -247,21 +247,21 @@ static void set_pte_block_desc(u64_t *pte, u64_t addr_pa, } /* Returns a new reallocated table */ -static u64_t *new_prealloc_table(void) +static uint64_t *new_prealloc_table(void) { static unsigned int table_idx; __ASSERT(table_idx < CONFIG_MAX_XLAT_TABLES, "Enough xlat tables not allocated"); - return (u64_t *)(xlat_tables[table_idx++]); + return (uint64_t *)(xlat_tables[table_idx++]); } /* Splits a block into table with entries spanning the old block */ -static void split_pte_block_desc(u64_t *pte, int level) +static void split_pte_block_desc(uint64_t *pte, int level) { - u64_t old_block_desc = *pte; - u64_t *new_table; + uint64_t old_block_desc = *pte; + uint64_t *new_table; unsigned int i = 0; /* get address size shift bits for next level */ int levelshift = LEVEL_TO_VA_SIZE_SHIFT(level + 1); @@ -284,13 +284,13 @@ static void split_pte_block_desc(u64_t *pte, int level) /* Create/Populate translation table(s) for given region */ static void init_xlat_tables(const struct arm_mmu_region *region) { - u64_t *pte; - u64_t virt = region->base_va; - u64_t phys = region->base_pa; - u64_t size = region->size; - u64_t attrs = region->attrs; - u64_t level_size; - u64_t *new_table; + uint64_t *pte; + uint64_t virt = region->base_va; + uint64_t phys = region->base_pa; + uint64_t size = region->size; + uint64_t attrs = region->attrs; + uint64_t level_size; + uint64_t *new_table; unsigned int level = XLAT_TABLE_BASE_LEVEL; MMU_DEBUG("mmap: virt %llx phys %llx size %llx\n", virt, phys, size); @@ -361,7 +361,7 @@ static void setup_page_tables(void) { unsigned int index; const struct arm_mmu_region *region; - u64_t max_va = 0, max_pa = 0; + uint64_t max_va = 0, max_pa = 0; for (index = 0; index < mmu_config.num_regions; index++) { region = &mmu_config.mmu_regions[index]; @@ -392,7 +392,7 @@ static void setup_page_tables(void) static void enable_mmu_el1(unsigned int flags) { ARG_UNUSED(flags); - u64_t val; + uint64_t val; /* Set MAIR, TCR and TBBR registers */ __asm__ volatile("msr mair_el1, %0" @@ -405,7 +405,7 @@ static void enable_mmu_el1(unsigned int flags) : "memory", "cc"); __asm__ volatile("msr ttbr0_el1, %0" : - : "r" ((u64_t)base_xlat_table) + : "r" ((uint64_t)base_xlat_table) : "memory", "cc"); /* Ensure these changes are seen before MMU is enabled */ @@ -434,7 +434,7 @@ static void enable_mmu_el1(unsigned int flags) */ static int arm_mmu_init(struct device *arg) { - u64_t val; + uint64_t val; unsigned int idx, flags = 0; /* Current MMU code supports only EL1 */ @@ -449,9 +449,9 @@ static int arm_mmu_init(struct device *arg) MMU_DEBUG("xlat tables:\n"); MMU_DEBUG("base table(L%d): %p, %d entries\n", XLAT_TABLE_BASE_LEVEL, - (u64_t *)base_xlat_table, NUM_BASE_LEVEL_ENTRIES); + (uint64_t *)base_xlat_table, NUM_BASE_LEVEL_ENTRIES); for (idx = 0; idx < CONFIG_MAX_XLAT_TABLES; idx++) - MMU_DEBUG("%d: %p\n", idx, (u64_t *)(xlat_tables + idx)); + MMU_DEBUG("%d: %p\n", idx, (uint64_t *)(xlat_tables + idx)); setup_page_tables(); diff --git a/arch/arm/core/aarch64/fatal.c b/arch/arm/core/aarch64/fatal.c index b06100e12b..3be91bca56 100644 --- a/arch/arm/core/aarch64/fatal.c +++ b/arch/arm/core/aarch64/fatal.c @@ -17,9 +17,9 @@ LOG_MODULE_DECLARE(os); -static void print_EC_cause(u64_t esr) +static void print_EC_cause(uint64_t esr) { - u32_t EC = (u32_t)esr >> 26; + uint32_t EC = (uint32_t)esr >> 26; switch (EC) { case 0b000000: @@ -157,7 +157,7 @@ static void esf_dump(const z_arch_esf_t *esf) void z_arm64_fatal_error(unsigned int reason, const z_arch_esf_t *esf) { - u64_t el, esr, elr, far; + uint64_t el, esr, elr, far; if (reason != K_ERR_SPURIOUS_IRQ) { __asm__ volatile("mrs %0, CurrentEL" : "=r" (el)); diff --git a/arch/arm/core/aarch64/irq_manage.c b/arch/arm/core/aarch64/irq_manage.c index 8219d0132f..b529f19fd5 100644 --- a/arch/arm/core/aarch64/irq_manage.c +++ b/arch/arm/core/aarch64/irq_manage.c @@ -47,7 +47,7 @@ int arch_irq_is_enabled(unsigned int irq) return arm_gic_irq_is_enabled(irq); } -void z_arm64_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags) +void z_arm64_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags) { arm_gic_irq_set_priority(irq, prio, flags); } @@ -56,7 +56,7 @@ void z_arm64_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags) #ifdef CONFIG_DYNAMIC_INTERRUPTS int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, void (*routine)(void *parameter), void *parameter, - u32_t flags) + uint32_t flags) { z_isr_install(irq, routine, parameter); z_arm64_irq_priority_set(irq, priority, flags); diff --git a/arch/arm/core/aarch64/thread.c b/arch/arm/core/aarch64/thread.c index 633359290b..a1c876aafa 100644 --- a/arch/arm/core/aarch64/thread.c +++ b/arch/arm/core/aarch64/thread.c @@ -45,17 +45,17 @@ struct init_stack_frame { /* top of the stack / most recently pushed */ /* SPSL_ELn and ELR_ELn */ - u64_t spsr; - u64_t elr; + uint64_t spsr; + uint64_t elr; /* * Used by z_thread_entry_wrapper. pulls these off the stack and * into argument registers before calling z_thread_entry() */ - u64_t entry_point; - u64_t arg1; - u64_t arg2; - u64_t arg3; + uint64_t entry_point; + uint64_t arg1; + uint64_t arg2; + uint64_t arg3; /* least recently pushed */ }; @@ -76,10 +76,10 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, pInitCtx = (struct init_stack_frame *)(Z_STACK_PTR_ALIGN(stackEnd - sizeof(struct init_stack_frame))); - pInitCtx->entry_point = (u64_t)pEntry; - pInitCtx->arg1 = (u64_t)parameter1; - pInitCtx->arg2 = (u64_t)parameter2; - pInitCtx->arg3 = (u64_t)parameter3; + pInitCtx->entry_point = (uint64_t)pEntry; + pInitCtx->arg1 = (uint64_t)parameter1; + pInitCtx->arg2 = (uint64_t)parameter2; + pInitCtx->arg3 = (uint64_t)parameter3; /* * - ELR_ELn: to be used by eret in z_thread_entry_wrapper() to return @@ -88,7 +88,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, * - SPSR_ELn: to enable IRQs (we are masking debug exceptions, SError * interrupts and FIQs). */ - pInitCtx->elr = (u64_t)z_thread_entry; + pInitCtx->elr = (uint64_t)z_thread_entry; pInitCtx->spsr = SPSR_MODE_EL1H | DAIF_FIQ; /* @@ -100,6 +100,6 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, * task is first scheduled. */ - thread->callee_saved.sp = (u64_t)pInitCtx; - thread->callee_saved.x30 = (u64_t)z_thread_entry_wrapper; + thread->callee_saved.sp = (uint64_t)pInitCtx; + thread->callee_saved.x30 = (uint64_t)z_thread_entry_wrapper; } diff --git a/arch/arm/include/aarch32/cortex_m/cmse.h b/arch/arm/include/aarch32/cortex_m/cmse.h index 6aed9a520c..ff5e5120d8 100644 --- a/arch/arm/include/aarch32/cortex_m/cmse.h +++ b/arch/arm/include/aarch32/cortex_m/cmse.h @@ -50,7 +50,7 @@ extern "C" { * * @return a valid MPU region number or -EINVAL */ -int arm_cmse_mpu_region_get(u32_t addr); +int arm_cmse_mpu_region_get(uint32_t addr); /** * @brief Read accessibility of an address @@ -69,7 +69,7 @@ int arm_cmse_mpu_region_get(u32_t addr); * * @return 1 if address is readable, 0 otherwise. */ -int arm_cmse_addr_read_ok(u32_t addr, int force_npriv); +int arm_cmse_addr_read_ok(uint32_t addr, int force_npriv); /** * @brief Read and Write accessibility of an address @@ -89,7 +89,7 @@ int arm_cmse_addr_read_ok(u32_t addr, int force_npriv); * * @return 1 if address is Read and Writable, 0 otherwise. */ -int arm_cmse_addr_readwrite_ok(u32_t addr, int force_npriv); +int arm_cmse_addr_readwrite_ok(uint32_t addr, int force_npriv); /** * @brief Read accessibility of an address range @@ -111,7 +111,7 @@ int arm_cmse_addr_readwrite_ok(u32_t addr, int force_npriv); * * @return 1 if address range is readable, 0 otherwise. */ -int arm_cmse_addr_range_read_ok(u32_t addr, u32_t size, int force_npriv); +int arm_cmse_addr_range_read_ok(uint32_t addr, uint32_t size, int force_npriv); /** * @brief Read and Write accessibility of an address range @@ -133,7 +133,7 @@ int arm_cmse_addr_range_read_ok(u32_t addr, u32_t size, int force_npriv); * * @return 1 if address range is Read and Writable, 0 otherwise. */ -int arm_cmse_addr_range_readwrite_ok(u32_t addr, u32_t size, int force_npriv); +int arm_cmse_addr_range_readwrite_ok(uint32_t addr, uint32_t size, int force_npriv); /* Required for C99 compilation (required for GCC-8.x version, * where typeof is used instead of __typeof__) @@ -232,7 +232,7 @@ int arm_cmse_addr_range_readwrite_ok(u32_t addr, u32_t size, int force_npriv); * * @return a valid MPU region number or -EINVAL */ -int arm_cmse_mpu_nonsecure_region_get(u32_t addr); +int arm_cmse_mpu_nonsecure_region_get(uint32_t addr); /** * @brief Get the SAU region number of an address @@ -250,7 +250,7 @@ int arm_cmse_mpu_nonsecure_region_get(u32_t addr); * * @return a valid SAU region number or -EINVAL */ -int arm_cmse_sau_region_get(u32_t addr); +int arm_cmse_sau_region_get(uint32_t addr); /** * @brief Get the IDAU region number of an address @@ -268,7 +268,7 @@ int arm_cmse_sau_region_get(u32_t addr); * * @return a valid IDAU region number or -EINVAL */ -int arm_cmse_idau_region_get(u32_t addr); +int arm_cmse_idau_region_get(uint32_t addr); /** * @brief Security attribution of an address @@ -280,7 +280,7 @@ int arm_cmse_idau_region_get(u32_t addr); * * @return 1 if address is Secure, 0 otherwise. */ -int arm_cmse_addr_is_secure(u32_t addr); +int arm_cmse_addr_is_secure(uint32_t addr); /** * @brief Non-Secure Read accessibility of an address @@ -300,7 +300,7 @@ int arm_cmse_addr_is_secure(u32_t addr); * * @return 1 if address is readable from Non-Secure state, 0 otherwise. */ -int arm_cmse_addr_nonsecure_read_ok(u32_t addr, int force_npriv); +int arm_cmse_addr_nonsecure_read_ok(uint32_t addr, int force_npriv); /** * @brief Non-Secure Read and Write accessibility of an address @@ -320,7 +320,7 @@ int arm_cmse_addr_nonsecure_read_ok(u32_t addr, int force_npriv); * * @return 1 if address is Read and Writable from Non-Secure state, 0 otherwise */ -int arm_cmse_addr_nonsecure_readwrite_ok(u32_t addr, int force_npriv); +int arm_cmse_addr_nonsecure_readwrite_ok(uint32_t addr, int force_npriv); /** * @brief Non-Secure Read accessibility of an address range @@ -342,7 +342,7 @@ int arm_cmse_addr_nonsecure_readwrite_ok(u32_t addr, int force_npriv); * * @return 1 if address range is readable, 0 otherwise. */ -int arm_cmse_addr_range_nonsecure_read_ok(u32_t addr, u32_t size, +int arm_cmse_addr_range_nonsecure_read_ok(uint32_t addr, uint32_t size, int force_npriv); /** @@ -365,7 +365,7 @@ int arm_cmse_addr_range_nonsecure_read_ok(u32_t addr, u32_t size, * * @return 1 if address range is readable, 0 otherwise. */ -int arm_cmse_addr_range_nonsecure_readwrite_ok(u32_t addr, u32_t size, +int arm_cmse_addr_range_nonsecure_readwrite_ok(uint32_t addr, uint32_t size, int force_npriv); /** diff --git a/arch/arm/include/aarch32/cortex_m/stack.h b/arch/arm/include/aarch32/cortex_m/stack.h index 6a0613aea2..1fa6641399 100644 --- a/arch/arm/include/aarch32/cortex_m/stack.h +++ b/arch/arm/include/aarch32/cortex_m/stack.h @@ -40,13 +40,13 @@ extern K_THREAD_STACK_ARRAY_DEFINE(z_interrupt_stacks, CONFIG_MP_NUM_CPUS, */ static ALWAYS_INLINE void z_arm_interrupt_stack_setup(void) { - u32_t msp = (u32_t)(Z_THREAD_STACK_BUFFER(z_interrupt_stacks[0])) + + uint32_t msp = (uint32_t)(Z_THREAD_STACK_BUFFER(z_interrupt_stacks[0])) + K_THREAD_STACK_SIZEOF(z_interrupt_stacks[0]); __set_MSP(msp); #if defined(CONFIG_BUILTIN_STACK_GUARD) #if defined(CONFIG_CPU_CORTEX_M_HAS_SPLIM) - __set_MSPLIM((u32_t)z_interrupt_stacks[0]); + __set_MSPLIM((uint32_t)z_interrupt_stacks[0]); #else #error "Built-in MSP limit checks not supported by HW" #endif diff --git a/arch/arm/include/aarch32/cortex_m/tz.h b/arch/arm/include/aarch32/cortex_m/tz.h index dab11cd34c..119a7316eb 100644 --- a/arch/arm/include/aarch32/cortex_m/tz.h +++ b/arch/arm/include/aarch32/cortex_m/tz.h @@ -35,13 +35,13 @@ extern "C" { * state configuration. */ typedef struct tz_nonsecure_setup_conf { - u32_t msp_ns; - u32_t psp_ns; - u32_t vtor_ns; + uint32_t msp_ns; + uint32_t psp_ns; + uint32_t vtor_ns; struct { - u32_t npriv:1; - u32_t spsel:1; - u32_t reserved:30; + uint32_t npriv:1; + uint32_t spsel:1; + uint32_t reserved:30; } control_ns; } tz_nonsecure_setup_conf_t; @@ -84,7 +84,7 @@ void tz_nonsecure_state_setup(const tz_nonsecure_setup_conf_t *p_ns_conf); * * @return N/A */ -void tz_nonsecure_msplim_set(u32_t val); +void tz_nonsecure_msplim_set(uint32_t val); /** * @@ -101,7 +101,7 @@ void tz_nonsecure_msplim_set(u32_t val); * * @return N/A */ -void tz_nonsecure_psplim_set(u32_t val); +void tz_nonsecure_psplim_set(uint32_t val); #endif /* CONFIG_ARMV8_M_MAINLINE */ @@ -229,7 +229,7 @@ void tz_sau_configure(int enable, int allns); * * @return The number of configured SAU regions. */ -u32_t tz_sau_number_of_regions_get(void); +uint32_t tz_sau_number_of_regions_get(void); #if defined(CONFIG_CPU_HAS_ARM_SAU) /** @@ -240,11 +240,11 @@ u32_t tz_sau_number_of_regions_get(void); * for a SAU region configuration. */ typedef struct { - u8_t region_num; - u8_t enable:1; - u8_t nsc:1; - u32_t base_addr; - u32_t limit_addr; + uint8_t region_num; + uint8_t enable:1; + uint8_t nsc:1; + uint32_t base_addr; + uint32_t limit_addr; } tz_sau_conf_t; diff --git a/arch/arm/include/aarch32/kernel_arch_func.h b/arch/arm/include/aarch32/kernel_arch_func.h index ddc4fa911f..6dbd92079b 100644 --- a/arch/arm/include/aarch32/kernel_arch_func.h +++ b/arch/arm/include/aarch32/kernel_arch_func.h @@ -52,8 +52,8 @@ arch_thread_return_value_set(struct k_thread *thread, unsigned int value) extern FUNC_NORETURN void z_arm_userspace_enter(k_thread_entry_t user_entry, void *p1, void *p2, void *p3, - u32_t stack_end, - u32_t stack_start); + uint32_t stack_end, + uint32_t stack_start); extern void z_arm_fatal_error(unsigned int reason, const z_arch_esf_t *esf); diff --git a/arch/common/gen_isr_tables.py b/arch/common/gen_isr_tables.py index cfb46516b8..06e692efd7 100755 --- a/arch/common/gen_isr_tables.py +++ b/arch/common/gen_isr_tables.py @@ -46,7 +46,7 @@ def read_intlist(intlist_path, syms): include/linker/intlist.ld: struct { - u32_t num_vectors; <- typically CONFIG_NUM_IRQS + uint32_t num_vectors; <- typically CONFIG_NUM_IRQS struct _isr_list isrs[]; <- Usually of smaller size than num_vectors } @@ -55,9 +55,9 @@ def read_intlist(intlist_path, syms): struct _isr_list { /** IRQ line number */ - s32_t irq; + int32_t irq; /** Flags for this IRQ, see ISR_FLAG_* definitions */ - s32_t flags; + int32_t flags; /** ISR to call */ void *func; /** Parameter for non-direct IRQs */ @@ -134,7 +134,7 @@ source_header = """ #include #if defined(CONFIG_GEN_SW_ISR_TABLE) && defined(CONFIG_GEN_IRQ_VECTOR_TABLE) -#define ISR_WRAPPER ((u32_t)&_isr_wrapper) +#define ISR_WRAPPER ((uint32_t)&_isr_wrapper) #else #define ISR_WRAPPER NULL #endif @@ -147,7 +147,7 @@ def write_source_file(fp, vt, swt, intlist, syms): nv = intlist["num_vectors"] if vt: - fp.write("u32_t __irq_vector_table _irq_vector_table[%d] = {\n" % nv) + fp.write("uint32_t __irq_vector_table _irq_vector_table[%d] = {\n" % nv) for i in range(nv): fp.write("\t{},\n".format(vt[i])) fp.write("};\n") diff --git a/arch/common/isr_tables.c b/arch/common/isr_tables.c index f7d11ce04b..b0cf3cd1fb 100644 --- a/arch/common/isr_tables.c +++ b/arch/common/isr_tables.c @@ -13,8 +13,8 @@ * which indicates the number of interrupts specified */ struct int_list_header { - u32_t table_size; - u32_t offset; + uint32_t table_size; + uint32_t offset; }; /* These values are not included in the resulting binary, but instead form the @@ -50,8 +50,8 @@ Z_GENERIC_SECTION(.irq_info) struct int_list_header _iheader = { #define IRQ_VECTOR_TABLE_DEFAULT_ISR z_irq_spurious #endif /* CONFIG_GEN_SW_ISR_TABLE */ -u32_t __irq_vector_table _irq_vector_table[IRQ_TABLE_SIZE] = { - [0 ...(IRQ_TABLE_SIZE - 1)] = (u32_t)&IRQ_VECTOR_TABLE_DEFAULT_ISR, +uint32_t __irq_vector_table _irq_vector_table[IRQ_TABLE_SIZE] = { + [0 ...(IRQ_TABLE_SIZE - 1)] = (uint32_t)&IRQ_VECTOR_TABLE_DEFAULT_ISR, }; #endif /* CONFIG_GEN_IRQ_VECTOR_TABLE */ diff --git a/arch/common/sw_isr_common.c b/arch/common/sw_isr_common.c index 11ce42d41e..030d057c9c 100644 --- a/arch/common/sw_isr_common.c +++ b/arch/common/sw_isr_common.c @@ -129,7 +129,7 @@ int __weak arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, void (*routine)(void *), void *parameter, - u32_t flags) + uint32_t flags) { ARG_UNUSED(flags); ARG_UNUSED(priority); diff --git a/arch/common/timing_info_bench.c b/arch/common/timing_info_bench.c index 1a6860b2a5..44a1465c8f 100644 --- a/arch/common/timing_info_bench.c +++ b/arch/common/timing_info_bench.c @@ -6,18 +6,18 @@ #include #include -u64_t arch_timing_swap_start; -u64_t arch_timing_swap_end; -u64_t arch_timing_irq_start; -u64_t arch_timing_irq_end; -u64_t arch_timing_tick_start; -u64_t arch_timing_tick_end; -u64_t arch_timing_enter_user_mode_end; +uint64_t arch_timing_swap_start; +uint64_t arch_timing_swap_end; +uint64_t arch_timing_irq_start; +uint64_t arch_timing_irq_end; +uint64_t arch_timing_tick_start; +uint64_t arch_timing_tick_end; +uint64_t arch_timing_enter_user_mode_end; /* location of the time stamps*/ -u32_t arch_timing_value_swap_end; -u64_t arch_timing_value_swap_common; -u64_t arch_timing_value_swap_temp; +uint32_t arch_timing_value_swap_end; +uint64_t arch_timing_value_swap_common; +uint64_t arch_timing_value_swap_temp; #if defined(CONFIG_NRF_RTC_TIMER) #include @@ -48,13 +48,13 @@ u64_t arch_timing_value_swap_temp; #define TIMING_INFO_PRE_READ() #define TIMING_INFO_OS_GET_TIME() (k_cycle_get_32()) #define TIMING_INFO_GET_TIMER_VALUE() (SysTick->VAL) -#define SUBTRACT_CLOCK_CYCLES(val) (SysTick->LOAD - (u32_t)val) +#define SUBTRACT_CLOCK_CYCLES(val) (SysTick->LOAD - (uint32_t)val) #elif defined(CONFIG_ARC) #define TIMING_INFO_PRE_READ() #define TIMING_INFO_OS_GET_TIME() (k_cycle_get_32()) #define TIMING_INFO_GET_TIMER_VALUE() (z_arc_v2_aux_reg_read(_ARC_V2_TMR0_COUNT)) -#define SUBTRACT_CLOCK_CYCLES(val) ((u32_t)val) +#define SUBTRACT_CLOCK_CYCLES(val) ((uint32_t)val) #elif defined(CONFIG_NIOS2) #include "altera_avalon_timer_regs.h" @@ -62,24 +62,24 @@ u64_t arch_timing_value_swap_temp; (IOWR_ALTERA_AVALON_TIMER_SNAPL(TIMER_0_BASE, 10)) #define TIMING_INFO_OS_GET_TIME() (SUBTRACT_CLOCK_CYCLES(\ - ((u32_t)IORD_ALTERA_AVALON_TIMER_SNAPH(TIMER_0_BASE) << 16)\ - | ((u32_t)IORD_ALTERA_AVALON_TIMER_SNAPL(TIMER_0_BASE)))) + ((uint32_t)IORD_ALTERA_AVALON_TIMER_SNAPH(TIMER_0_BASE) << 16)\ + | ((uint32_t)IORD_ALTERA_AVALON_TIMER_SNAPL(TIMER_0_BASE)))) #define TIMING_INFO_GET_TIMER_VALUE() (\ - ((u32_t)IORD_ALTERA_AVALON_TIMER_SNAPH(TIMER_0_BASE) << 16)\ - | ((u32_t)IORD_ALTERA_AVALON_TIMER_SNAPL(TIMER_0_BASE))) + ((uint32_t)IORD_ALTERA_AVALON_TIMER_SNAPH(TIMER_0_BASE) << 16)\ + | ((uint32_t)IORD_ALTERA_AVALON_TIMER_SNAPL(TIMER_0_BASE))) #define SUBTRACT_CLOCK_CYCLES(val) \ ((IORD_ALTERA_AVALON_TIMER_PERIODH(TIMER_0_BASE) \ << 16 | \ (IORD_ALTERA_AVALON_TIMER_PERIODL(TIMER_0_BASE))) \ - - ((u32_t)val)) + - ((uint32_t)val)) #else #define TIMING_INFO_PRE_READ() #define TIMING_INFO_OS_GET_TIME() (k_cycle_get_32()) #define TIMING_INFO_GET_TIMER_VALUE() (k_cycle_get_32()) -#define SUBTRACT_CLOCK_CYCLES(val) ((u32_t)val) +#define SUBTRACT_CLOCK_CYCLES(val) ((uint32_t)val) #endif /* CONFIG_NRF_RTC_TIMER */ @@ -87,7 +87,7 @@ void read_timer_start_of_swap(void) { if (arch_timing_value_swap_end == 1U) { TIMING_INFO_PRE_READ(); - arch_timing_swap_start = (u32_t) TIMING_INFO_OS_GET_TIME(); + arch_timing_swap_start = (uint32_t) TIMING_INFO_OS_GET_TIME(); } } @@ -97,7 +97,7 @@ void read_timer_end_of_swap(void) TIMING_INFO_PRE_READ(); arch_timing_value_swap_end = 2U; arch_timing_value_swap_common = - (u64_t)TIMING_INFO_OS_GET_TIME(); + (uint64_t)TIMING_INFO_OS_GET_TIME(); } } @@ -107,29 +107,29 @@ void read_timer_end_of_swap(void) void read_timer_start_of_isr(void) { TIMING_INFO_PRE_READ(); - arch_timing_irq_start = (u32_t) TIMING_INFO_GET_TIMER_VALUE(); + arch_timing_irq_start = (uint32_t) TIMING_INFO_GET_TIMER_VALUE(); } void read_timer_end_of_isr(void) { TIMING_INFO_PRE_READ(); - arch_timing_irq_end = (u32_t) TIMING_INFO_GET_TIMER_VALUE(); + arch_timing_irq_end = (uint32_t) TIMING_INFO_GET_TIMER_VALUE(); } void read_timer_start_of_tick_handler(void) { TIMING_INFO_PRE_READ(); - arch_timing_tick_start = (u32_t)TIMING_INFO_GET_TIMER_VALUE(); + arch_timing_tick_start = (uint32_t)TIMING_INFO_GET_TIMER_VALUE(); } void read_timer_end_of_tick_handler(void) { TIMING_INFO_PRE_READ(); - arch_timing_tick_end = (u32_t) TIMING_INFO_GET_TIMER_VALUE(); + arch_timing_tick_end = (uint32_t) TIMING_INFO_GET_TIMER_VALUE(); } void read_timer_end_of_userspace_enter(void) { TIMING_INFO_PRE_READ(); - arch_timing_enter_user_mode_end = (u32_t)TIMING_INFO_GET_TIMER_VALUE(); + arch_timing_enter_user_mode_end = (uint32_t)TIMING_INFO_GET_TIMER_VALUE(); } diff --git a/arch/nios2/core/cache.c b/arch/nios2/core/cache.c index bdf1f499d6..58027cbda9 100644 --- a/arch/nios2/core/cache.c +++ b/arch/nios2/core/cache.c @@ -24,7 +24,7 @@ #if ALT_CPU_ICACHE_SIZE > 0 void z_nios2_icache_flush_all(void) { - u32_t i; + uint32_t i; for (i = 0U; i < ALT_CPU_ICACHE_SIZE; i += ALT_CPU_ICACHE_LINE_SIZE) { z_nios2_icache_flush(i); @@ -53,7 +53,7 @@ void z_nios2_icache_flush_all(void) #if ALT_CPU_DCACHE_SIZE > 0 void z_nios2_dcache_flush_all(void) { - u32_t i; + uint32_t i; for (i = 0U; i < ALT_CPU_DCACHE_SIZE; i += ALT_CPU_DCACHE_LINE_SIZE) { z_nios2_dcache_flush(i); @@ -70,10 +70,10 @@ void z_nios2_dcache_flush_all(void) * use the z_nios2_dcache_flush() routine instead. */ #if ALT_CPU_DCACHE_SIZE > 0 -void z_nios2_dcache_flush_no_writeback(void *start, u32_t len) +void z_nios2_dcache_flush_no_writeback(void *start, uint32_t len) { - u8_t *i; - u8_t *end = ((char *) start) + len; + uint8_t *i; + uint8_t *end = ((char *) start) + len; for (i = start; i < end; i += ALT_CPU_DCACHE_LINE_SIZE) { __asm__ volatile ("initda (%0)" :: "r" (i)); @@ -85,7 +85,7 @@ void z_nios2_dcache_flush_no_writeback(void *start, u32_t len) * multiple of 2 (which it always is). */ - if (((u32_t) start) & (ALT_CPU_DCACHE_LINE_SIZE - 1)) { + if (((uint32_t) start) & (ALT_CPU_DCACHE_LINE_SIZE - 1)) { __asm__ volatile ("initda (%0)" :: "r" (i)); } } diff --git a/arch/nios2/core/crt0.S b/arch/nios2/core/crt0.S index a24ce74f2d..c9ce8de918 100644 --- a/arch/nios2/core/crt0.S +++ b/arch/nios2/core/crt0.S @@ -113,7 +113,7 @@ SECTION_FUNC(TEXT, __start) ori r3, r3, 0xaaaa 1: /* Loop through the z_interrupt_stacks treating it as an array of - * u32_t, setting each element to r3 */ + * uint32_t, setting each element to r3 */ stw r3, (r1) subi r2, r2, 4 addi r1, r1, 4 diff --git a/arch/nios2/core/fatal.c b/arch/nios2/core/fatal.c index eef778eef1..e6188083c8 100644 --- a/arch/nios2/core/fatal.c +++ b/arch/nios2/core/fatal.c @@ -41,7 +41,7 @@ FUNC_NORETURN void z_nios2_fatal_error(unsigned int reason, #if defined(CONFIG_EXTRA_EXCEPTION_INFO) && \ (defined(CONFIG_PRINTK) || defined(CONFIG_LOG)) \ && defined(ALT_CPU_HAS_EXTRA_EXCEPTION_INFO) -static char *cause_str(u32_t cause_code) +static char *cause_str(uint32_t cause_code) { switch (cause_code) { case 0: @@ -105,7 +105,7 @@ FUNC_NORETURN void _Fault(const z_arch_esf_t *esf) #if defined(CONFIG_PRINTK) || defined(CONFIG_LOG) /* Unfortunately, completely unavailable on Nios II/e cores */ #ifdef ALT_CPU_HAS_EXTRA_EXCEPTION_INFO - u32_t exc_reg, badaddr_reg, eccftl; + uint32_t exc_reg, badaddr_reg, eccftl; enum nios2_exception_cause cause; exc_reg = z_nios2_creg_read(NIOS2_CR_EXCEPTION); diff --git a/arch/nios2/core/irq_manage.c b/arch/nios2/core/irq_manage.c index c8c666114d..5bc9e283ac 100644 --- a/arch/nios2/core/irq_manage.c +++ b/arch/nios2/core/irq_manage.c @@ -33,7 +33,7 @@ FUNC_NORETURN void z_irq_spurious(void *unused) void arch_irq_enable(unsigned int irq) { - u32_t ienable; + uint32_t ienable; unsigned int key; key = irq_lock(); @@ -49,7 +49,7 @@ void arch_irq_enable(unsigned int irq) void arch_irq_disable(unsigned int irq) { - u32_t ienable; + uint32_t ienable; unsigned int key; key = irq_lock(); @@ -63,7 +63,7 @@ void arch_irq_disable(unsigned int irq) int arch_irq_is_enabled(unsigned int irq) { - u32_t ienable; + uint32_t ienable; ienable = z_nios2_creg_read(NIOS2_CR_IENABLE); return ienable & BIT(irq); @@ -76,7 +76,7 @@ int arch_irq_is_enabled(unsigned int irq) * * @param ipending Bitfield of interrupts */ -void _enter_irq(u32_t ipending) +void _enter_irq(uint32_t ipending) { int index; @@ -122,7 +122,7 @@ void _enter_irq(u32_t ipending) #ifdef CONFIG_DYNAMIC_INTERRUPTS int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, void (*routine)(void *parameter), void *parameter, - u32_t flags) + uint32_t flags) { ARG_UNUSED(flags); ARG_UNUSED(priority); diff --git a/arch/nios2/core/thread.c b/arch/nios2/core/thread.c index f20fe21971..f339eec347 100644 --- a/arch/nios2/core/thread.c +++ b/arch/nios2/core/thread.c @@ -48,8 +48,8 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, iframe->arg2 = arg2; iframe->arg3 = arg3; - thread->callee_saved.sp = (u32_t)iframe; - thread->callee_saved.ra = (u32_t)z_thread_entry_wrapper; + thread->callee_saved.sp = (uint32_t)iframe; + thread->callee_saved.ra = (uint32_t)z_thread_entry_wrapper; thread->callee_saved.key = NIOS2_STATUS_PIE_MSK; /* Leave the rest of thread->callee_saved junk */ } diff --git a/arch/nios2/include/kernel_arch_func.h b/arch/nios2/include/kernel_arch_func.h index 588728eaf5..efb3582c90 100644 --- a/arch/nios2/include/kernel_arch_func.h +++ b/arch/nios2/include/kernel_arch_func.h @@ -58,7 +58,7 @@ void z_nios2_icache_flush_all(void); #if ALT_CPU_DCACHE_SIZE > 0 void z_nios2_dcache_flush_all(void); -void z_nios2_dcache_flush_no_writeback(void *start, u32_t len); +void z_nios2_dcache_flush_no_writeback(void *start, uint32_t len); #else #define z_nios2_dcache_flush_all() do { } while (0) #define z_nios2_dcache_flush_no_writeback(x, y) do { } while (0) diff --git a/arch/posix/core/irq.c b/arch/posix/core/irq.c index 0a4c00f666..d63835f676 100644 --- a/arch/posix/core/irq.c +++ b/arch/posix/core/irq.c @@ -47,7 +47,7 @@ int arch_irq_is_enabled(unsigned int irq) */ int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, void (*routine)(void *parameter), - void *parameter, u32_t flags) + void *parameter, uint32_t flags) { posix_isr_declare(irq, (int)flags, routine, parameter); posix_irq_priority_set(irq, priority, flags); diff --git a/arch/posix/core/swap.c b/arch/posix/core/swap.c index a1631eaa55..114290ad22 100644 --- a/arch/posix/core/swap.c +++ b/arch/posix/core/swap.c @@ -98,7 +98,7 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, void posix_irq_check_idle_exit(void) { if (_kernel.idle) { - s32_t idle_val = _kernel.idle; + int32_t idle_val = _kernel.idle; _kernel.idle = 0; z_sys_power_save_idle_exit(idle_val); diff --git a/arch/riscv/core/irq_manage.c b/arch/riscv/core/irq_manage.c index b852433e9e..247e25cfc0 100644 --- a/arch/riscv/core/irq_manage.c +++ b/arch/riscv/core/irq_manage.c @@ -32,7 +32,7 @@ FUNC_NORETURN void z_irq_spurious(void *unused) #ifdef CONFIG_DYNAMIC_INTERRUPTS int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, void (*routine)(void *parameter), void *parameter, - u32_t flags) + uint32_t flags) { ARG_UNUSED(flags); diff --git a/arch/x86/core/acpi.c b/arch/x86/core/acpi.c index 166c708082..1ec8c29bf7 100644 --- a/arch/x86/core/acpi.c +++ b/arch/x86/core/acpi.c @@ -20,8 +20,8 @@ static struct acpi_madt *madt; static bool validate_checksum(void *buf, int len) { - u8_t *cp = buf; - u8_t checksum = 0; + uint8_t *cp = buf; + uint8_t checksum = 0; while (len--) { checksum += *(cp++); @@ -88,7 +88,7 @@ void z_acpi_init(void) * If it's valid, then remember it for later. */ - int nr_sdts = (rsdt->sdt.length - sizeof(rsdt)) / sizeof(u32_t); + int nr_sdts = (rsdt->sdt.length - sizeof(rsdt)) / sizeof(uint32_t); for (int i = 0; i < nr_sdts; ++i) { struct acpi_sdt *sdt = UINT_TO_POINTER(rsdt->sdts[i]); diff --git a/arch/x86/core/fatal.c b/arch/x86/core/fatal.c index 8a3001adfd..44dba24c27 100644 --- a/arch/x86/core/fatal.c +++ b/arch/x86/core/fatal.c @@ -43,7 +43,7 @@ static inline uintptr_t esf_get_code(const z_arch_esf_t *esf) } #ifdef CONFIG_THREAD_STACK_INFO -bool z_x86_check_stack_bounds(uintptr_t addr, size_t size, u16_t cs) +bool z_x86_check_stack_bounds(uintptr_t addr, size_t size, uint16_t cs) { uintptr_t start, end; @@ -89,7 +89,7 @@ struct stack_frame { #define MAX_STACK_FRAMES 8 -static void unwind_stack(uintptr_t base_ptr, u16_t cs) +static void unwind_stack(uintptr_t base_ptr, uint16_t cs) { struct stack_frame *frame; int i; @@ -342,7 +342,7 @@ void z_x86_page_fault_handler(z_arch_esf_t *esf) #ifdef CONFIG_X86_64 if ((void *)esf->rip >= exceptions[i].start && (void *)esf->rip < exceptions[i].end) { - esf->rip = (u64_t)(exceptions[i].fixup); + esf->rip = (uint64_t)(exceptions[i].fixup); return; } #else diff --git a/arch/x86/core/ia32/excstub.S b/arch/x86/core/ia32/excstub.S index 16cec0fa48..cefe84cfe0 100644 --- a/arch/x86/core/ia32/excstub.S +++ b/arch/x86/core/ia32/excstub.S @@ -49,7 +49,7 @@ * * C function prototype: * - * void _exception_enter(u32_t error_code, void *handler) + * void _exception_enter(uint32_t error_code, void *handler) * */ diff --git a/arch/x86/core/ia32/fatal.c b/arch/x86/core/ia32/fatal.c index 1c7d1c8012..c00853e1bd 100644 --- a/arch/x86/core/ia32/fatal.c +++ b/arch/x86/core/ia32/fatal.c @@ -127,20 +127,20 @@ struct task_state_segment _main_tss = { * In a special kernel page that, unlike all other kernel pages, * is marked present in the user page table. */ - .esp0 = (u32_t)&z_trampoline_stack_end + .esp0 = (uint32_t)&z_trampoline_stack_end #endif }; /* Special TSS for handling double-faults with a known good stack */ Z_GENERIC_SECTION(.tss) struct task_state_segment _df_tss = { - .esp = (u32_t)(_df_stack + sizeof(_df_stack)), + .esp = (uint32_t)(_df_stack + sizeof(_df_stack)), .cs = CODE_SEG, .ds = DATA_SEG, .es = DATA_SEG, .ss = DATA_SEG, - .eip = (u32_t)df_handler_top, - .cr3 = (u32_t)&z_x86_kernel_ptables + .eip = (uint32_t)df_handler_top, + .cr3 = (uint32_t)&z_x86_kernel_ptables }; static __used void df_handler_bottom(void) @@ -149,8 +149,8 @@ static __used void df_handler_bottom(void) int reason = K_ERR_CPU_EXCEPTION; /* Restore the top half so it is runnable again */ - _df_tss.esp = (u32_t)(_df_stack + sizeof(_df_stack)); - _df_tss.eip = (u32_t)df_handler_top; + _df_tss.esp = (uint32_t)(_df_stack + sizeof(_df_stack)); + _df_tss.eip = (uint32_t)df_handler_top; LOG_ERR("Double Fault"); #ifdef CONFIG_THREAD_STACK_INFO @@ -181,14 +181,14 @@ static FUNC_NORETURN __used void df_handler_top(void) _df_esf.eflags = _main_tss.eflags; /* Restore the main IA task to a runnable state */ - _main_tss.esp = (u32_t)(ARCH_THREAD_STACK_BUFFER( + _main_tss.esp = (uint32_t)(ARCH_THREAD_STACK_BUFFER( z_interrupt_stacks[0]) + CONFIG_ISR_STACK_SIZE); _main_tss.cs = CODE_SEG; _main_tss.ds = DATA_SEG; _main_tss.es = DATA_SEG; _main_tss.ss = DATA_SEG; - _main_tss.eip = (u32_t)df_handler_bottom; - _main_tss.cr3 = (u32_t)&z_x86_kernel_ptables; + _main_tss.eip = (uint32_t)df_handler_bottom; + _main_tss.cr3 = (uint32_t)&z_x86_kernel_ptables; _main_tss.eflags = 0U; /* NT bit is set in EFLAGS so we will task switch back to _main_tss diff --git a/arch/x86/core/ia32/float.c b/arch/x86/core/ia32/float.c index b807ae6e8b..921e9a93e6 100644 --- a/arch/x86/core/ia32/float.c +++ b/arch/x86/core/ia32/float.c @@ -47,7 +47,7 @@ #include /* SSE control/status register default value (used by assembler code) */ -extern u32_t _sse_mxcsr_default_value; +extern uint32_t _sse_mxcsr_default_value; /** * @@ -190,7 +190,7 @@ void k_float_enable(struct k_thread *thread, unsigned int options) /* Indicate thread requires floating point context saving */ - thread->base.user_options |= (u8_t)options; + thread->base.user_options |= (uint8_t)options; /* * The current thread might not allow FP instructions, so clear CR0[TS] diff --git a/arch/x86/core/ia32/irq_manage.c b/arch/x86/core/ia32/irq_manage.c index 25a87a10eb..e474fdd553 100644 --- a/arch/x86/core/ia32/irq_manage.c +++ b/arch/x86/core/ia32/irq_manage.c @@ -169,7 +169,7 @@ static unsigned int priority_to_free_vector(unsigned int requested_priority) */ static void *get_dynamic_stub(int stub_idx) { - u32_t offset; + uint32_t offset; /* * Because we want the sizes of the stubs to be consistent and minimized, @@ -181,7 +181,7 @@ static void *get_dynamic_stub(int stub_idx) ((stub_idx / Z_DYN_STUB_PER_BLOCK) * Z_DYN_STUB_LONG_JMP_EXTRA_SIZE); - return (void *)((u32_t)&z_dynamic_stubs_begin + offset); + return (void *)((uint32_t)&z_dynamic_stubs_begin + offset); } extern const struct pseudo_descriptor z_x86_idt; @@ -192,13 +192,13 @@ static void idt_vector_install(int vector, void *irq_handler) key = irq_lock(); z_init_irq_gate(&z_x86_idt.entries[vector], CODE_SEG, - (u32_t)irq_handler, 0); + (uint32_t)irq_handler, 0); irq_unlock(key); } int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, void (*routine)(void *parameter), void *parameter, - u32_t flags) + uint32_t flags) { int vector, stub_idx, key; @@ -233,7 +233,7 @@ int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, * * @param stub_idx Index into the dyn_irq_list array */ -void z_x86_dynamic_irq_handler(u8_t stub_idx) +void z_x86_dynamic_irq_handler(uint8_t stub_idx) { dyn_irq_list[stub_idx].handler(dyn_irq_list[stub_idx].param); } diff --git a/arch/x86/core/ia32/thread.c b/arch/x86/core/ia32/thread.c index 409c8b13c3..39fe356896 100644 --- a/arch/x86/core/ia32/thread.c +++ b/arch/x86/core/ia32/thread.c @@ -23,13 +23,13 @@ * for when z_swap() switches to it for the first time. */ struct _x86_initial_frame { - u32_t swap_retval; - u32_t ebp; - u32_t ebx; - u32_t esi; - u32_t edi; + uint32_t swap_retval; + uint32_t ebp; + uint32_t ebx; + uint32_t esi; + uint32_t edi; void *thread_entry; - u32_t eflags; + uint32_t eflags; k_thread_entry_t entry; void *p1; void *p2; @@ -101,7 +101,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, initial_frame->p3 = parameter3; initial_frame->eflags = EFLAGS_INITIAL; #ifdef _THREAD_WRAPPER_REQUIRED - initial_frame->edi = (u32_t)swap_entry; + initial_frame->edi = (uint32_t)swap_entry; initial_frame->thread_entry = z_x86_thread_entry_wrapper; #else initial_frame->thread_entry = swap_entry; diff --git a/arch/x86/core/ia32/userspace.S b/arch/x86/core/ia32/userspace.S index 05d43d6878..3ac93a3e89 100644 --- a/arch/x86/core/ia32/userspace.S +++ b/arch/x86/core/ia32/userspace.S @@ -279,8 +279,8 @@ z_x86_user_string_nlen_fixup: /* FUNC_NORETURN void z_x86_userspace_enter(k_thread_entry_t user_entry, * void *p1, void *p2, void *p3, - * u32_t stack_end, - * u32_t stack_start) + * uint32_t stack_end, + * uint32_t stack_start) * * A one-way trip to userspace. */ diff --git a/arch/x86/core/intel64/cpu.c b/arch/x86/core/intel64/cpu.c index b98a328bf2..288c3c35e2 100644 --- a/arch/x86/core/intel64/cpu.c +++ b/arch/x86/core/intel64/cpu.c @@ -18,28 +18,28 @@ * The symbol is weak so that boards/SoC files can override. */ -__weak u8_t x86_cpu_loapics[] = { 0, 1, 2, 3 }; +__weak uint8_t x86_cpu_loapics[] = { 0, 1, 2, 3 }; extern char x86_ap_start[]; /* AP entry point in locore.S */ -extern u8_t _exception_stack[]; -extern u8_t _exception_stack1[]; -extern u8_t _exception_stack2[]; -extern u8_t _exception_stack3[]; +extern uint8_t _exception_stack[]; +extern uint8_t _exception_stack1[]; +extern uint8_t _exception_stack2[]; +extern uint8_t _exception_stack3[]; #ifdef CONFIG_X86_KPTI -extern u8_t z_x86_trampoline_stack[]; -extern u8_t z_x86_trampoline_stack1[]; -extern u8_t z_x86_trampoline_stack2[]; -extern u8_t z_x86_trampoline_stack3[]; +extern uint8_t z_x86_trampoline_stack[]; +extern uint8_t z_x86_trampoline_stack1[]; +extern uint8_t z_x86_trampoline_stack2[]; +extern uint8_t z_x86_trampoline_stack3[]; #endif /* CONFIG_X86_KPTI */ Z_GENERIC_SECTION(.tss) struct x86_tss64 tss0 = { #ifdef CONFIG_X86_KPTI - .ist2 = (u64_t) z_x86_trampoline_stack + Z_X86_TRAMPOLINE_STACK_SIZE, + .ist2 = (uint64_t) z_x86_trampoline_stack + Z_X86_TRAMPOLINE_STACK_SIZE, #endif - .ist7 = (u64_t) _exception_stack + CONFIG_EXCEPTION_STACK_SIZE, + .ist7 = (uint64_t) _exception_stack + CONFIG_EXCEPTION_STACK_SIZE, .iomapb = 0xFFFF, .cpu = &(_kernel.cpus[0]) }; @@ -48,9 +48,9 @@ struct x86_tss64 tss0 = { Z_GENERIC_SECTION(.tss) struct x86_tss64 tss1 = { #ifdef CONFIG_X86_KPTI - .ist2 = (u64_t) z_x86_trampoline_stack1 + Z_X86_TRAMPOLINE_STACK_SIZE, + .ist2 = (uint64_t) z_x86_trampoline_stack1 + Z_X86_TRAMPOLINE_STACK_SIZE, #endif - .ist7 = (u64_t) _exception_stack1 + CONFIG_EXCEPTION_STACK_SIZE, + .ist7 = (uint64_t) _exception_stack1 + CONFIG_EXCEPTION_STACK_SIZE, .iomapb = 0xFFFF, .cpu = &(_kernel.cpus[1]) }; @@ -60,9 +60,9 @@ struct x86_tss64 tss1 = { Z_GENERIC_SECTION(.tss) struct x86_tss64 tss2 = { #ifdef CONFIG_X86_KPTI - .ist2 = (u64_t) z_x86_trampoline_stack2 + Z_X86_TRAMPOLINE_STACK_SIZE, + .ist2 = (uint64_t) z_x86_trampoline_stack2 + Z_X86_TRAMPOLINE_STACK_SIZE, #endif - .ist7 = (u64_t) _exception_stack2 + CONFIG_EXCEPTION_STACK_SIZE, + .ist7 = (uint64_t) _exception_stack2 + CONFIG_EXCEPTION_STACK_SIZE, .iomapb = 0xFFFF, .cpu = &(_kernel.cpus[2]) }; @@ -72,9 +72,9 @@ struct x86_tss64 tss2 = { Z_GENERIC_SECTION(.tss) struct x86_tss64 tss3 = { #ifdef CONFIG_X86_KPTI - .ist2 = (u64_t) z_x86_trampoline_stack3 + Z_X86_TRAMPOLINE_STACK_SIZE, + .ist2 = (uint64_t) z_x86_trampoline_stack3 + Z_X86_TRAMPOLINE_STACK_SIZE, #endif - .ist7 = (u64_t) _exception_stack3 + CONFIG_EXCEPTION_STACK_SIZE, + .ist7 = (uint64_t) _exception_stack3 + CONFIG_EXCEPTION_STACK_SIZE, .iomapb = 0xFFFF, .cpu = &(_kernel.cpus[3]) }; @@ -86,7 +86,7 @@ struct x86_cpuboot x86_cpuboot[] = { { .tr = X86_KERNEL_CPU0_TR, .gs_base = &tss0, - .sp = (u64_t) (z_interrupt_stacks[0] + CONFIG_ISR_STACK_SIZE + + .sp = (uint64_t) (z_interrupt_stacks[0] + CONFIG_ISR_STACK_SIZE + ARCH_THREAD_STACK_RESERVED), .fn = z_x86_prep_c, #ifdef CONFIG_X86_MMU @@ -121,10 +121,10 @@ struct x86_cpuboot x86_cpuboot[] = { void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz, arch_cpustart_t fn, void *arg) { - u8_t vector = ((unsigned long) x86_ap_start) >> 12; - u8_t apic_id = x86_cpu_loapics[cpu_num]; + uint8_t vector = ((unsigned long) x86_ap_start) >> 12; + uint8_t apic_id = x86_cpu_loapics[cpu_num]; - x86_cpuboot[cpu_num].sp = (u64_t) Z_THREAD_STACK_BUFFER(stack) + sz; + x86_cpuboot[cpu_num].sp = (uint64_t) Z_THREAD_STACK_BUFFER(stack) + sz; x86_cpuboot[cpu_num].fn = fn; x86_cpuboot[cpu_num].arg = arg; #ifdef CONFIG_X86_MMU @@ -151,10 +151,10 @@ FUNC_NORETURN void z_x86_cpu_init(struct x86_cpuboot *cpuboot) #ifdef CONFIG_USERSPACE /* Set landing site for 'syscall' instruction */ - z_x86_msr_write(X86_LSTAR_MSR, (u64_t)z_x86_syscall_entry_stub); + z_x86_msr_write(X86_LSTAR_MSR, (uint64_t)z_x86_syscall_entry_stub); /* Set segment descriptors for syscall privilege transitions */ - z_x86_msr_write(X86_STAR_MSR, (u64_t)X86_STAR_UPPER << 32); + z_x86_msr_write(X86_STAR_MSR, (uint64_t)X86_STAR_UPPER << 32); /* Mask applied to RFLAGS when making a syscall */ z_x86_msr_write(X86_FMASK_MSR, EFLAGS_SYSCALL); diff --git a/arch/x86/core/intel64/irq.c b/arch/x86/core/intel64/irq.c index 9077906542..9b62c8f6c2 100644 --- a/arch/x86/core/intel64/irq.c +++ b/arch/x86/core/intel64/irq.c @@ -70,9 +70,9 @@ static int allocate_vector(unsigned int priority) */ int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, - void (*func)(void *arg), void *arg, u32_t flags) + void (*func)(void *arg), void *arg, uint32_t flags) { - u32_t key; + uint32_t key; int vector; __ASSERT(irq <= CONFIG_MAX_IRQ_LINES, "IRQ %u out of range", irq); diff --git a/arch/x86/core/multiboot.c b/arch/x86/core/multiboot.c index e9150195ad..cb0d14a950 100644 --- a/arch/x86/core/multiboot.c +++ b/arch/x86/core/multiboot.c @@ -42,10 +42,10 @@ void z_multiboot_init(struct multiboot_info *info) if ((info->flags & MULTIBOOT_INFO_FLAGS_MMAP) && (x86_memmap_source < X86_MEMMAP_SOURCE_MULTIBOOT_MMAP)) { - u32_t address = info->mmap_addr; + uint32_t address = info->mmap_addr; struct multiboot_mmap *mmap; int index = 0; - u32_t type; + uint32_t type; while ((address < (info->mmap_addr + info->mmap_length)) && (index < CONFIG_X86_MEMMAP_ENTRIES)) { @@ -124,9 +124,9 @@ static int multiboot_framebuf_init(struct device *dev) * the pitch and adjust the start address center our canvas. */ - u16_t adj_x; - u16_t adj_y; - u32_t *buffer; + uint16_t adj_x; + uint16_t adj_y; + uint32_t *buffer; adj_x = info->fb_width - CONFIG_MULTIBOOT_FRAMEBUF_X; adj_y = info->fb_height - CONFIG_MULTIBOOT_FRAMEBUF_Y; diff --git a/arch/x86/core/pcie.c b/arch/x86/core/pcie.c index 6bf284bff2..a1d8b7985b 100644 --- a/arch/x86/core/pcie.c +++ b/arch/x86/core/pcie.c @@ -32,7 +32,7 @@ * Helper function for exported configuration functions. Configuration access * ain't atomic, so spinlock to keep drivers from clobbering each other. */ -static void pcie_conf(pcie_bdf_t bdf, unsigned int reg, bool write, u32_t *data) +static void pcie_conf(pcie_bdf_t bdf, unsigned int reg, bool write, uint32_t *data) { static struct k_spinlock lock; k_spinlock_key_t k; @@ -56,15 +56,15 @@ static void pcie_conf(pcie_bdf_t bdf, unsigned int reg, bool write, u32_t *data) /* these functions are explained in include/drivers/pcie/pcie.h */ -u32_t pcie_conf_read(pcie_bdf_t bdf, unsigned int reg) +uint32_t pcie_conf_read(pcie_bdf_t bdf, unsigned int reg) { - u32_t data; + uint32_t data; pcie_conf(bdf, reg, false, &data); return data; } -void pcie_conf_write(pcie_bdf_t bdf, unsigned int reg, u32_t data) +void pcie_conf_write(pcie_bdf_t bdf, unsigned int reg, uint32_t data) { pcie_conf(bdf, reg, true, &data); } @@ -73,13 +73,13 @@ void pcie_conf_write(pcie_bdf_t bdf, unsigned int reg, u32_t data) /* these functions are explained in include/drivers/pcie/msi.h */ -u32_t pcie_msi_map(unsigned int irq) +uint32_t pcie_msi_map(unsigned int irq) { ARG_UNUSED(irq); return 0xFEE00000U; /* standard delivery to BSP local APIC */ } -u16_t pcie_msi_mdr(unsigned int irq) +uint16_t pcie_msi_mdr(unsigned int irq) { unsigned char vector = Z_IRQ_TO_INTERRUPT_VECTOR(irq); diff --git a/arch/x86/core/reboot_rst_cnt.c b/arch/x86/core/reboot_rst_cnt.c index a4fa94529a..1de24fbb34 100644 --- a/arch/x86/core/reboot_rst_cnt.c +++ b/arch/x86/core/reboot_rst_cnt.c @@ -22,7 +22,7 @@ static inline void cold_reboot(void) { - u8_t reset_value = X86_RST_CNT_CPU_RST | X86_RST_CNT_SYS_RST | + uint8_t reset_value = X86_RST_CNT_CPU_RST | X86_RST_CNT_SYS_RST | X86_RST_CNT_FULL_RST; sys_out8(reset_value, X86_RST_CNT_REG); } diff --git a/arch/x86/core/spec_ctrl.c b/arch/x86/core/spec_ctrl.c index 8603dba6e4..25a44d69ee 100644 --- a/arch/x86/core/spec_ctrl.c +++ b/arch/x86/core/spec_ctrl.c @@ -25,9 +25,9 @@ #define CPUID_SPEC_CTRL_IBRS BIT(26) #if defined(CONFIG_DISABLE_SSBD) || defined(CONFIG_ENABLE_EXTENDED_IBRS) -static u32_t cpuid_extended_features(void) +static uint32_t cpuid_extended_features(void) { - u32_t eax, ebx, ecx = 0U, edx; + uint32_t eax, ebx, ecx = 0U, edx; if (__get_cpuid(CPUID_EXTENDED_FEATURES_LVL, &eax, &ebx, &ecx, &edx) == 0) { @@ -41,8 +41,8 @@ static int spec_ctrl_init(struct device *dev) { ARG_UNUSED(dev); - u32_t enable_bits = 0U; - u32_t cpuid7 = cpuid_extended_features(); + uint32_t enable_bits = 0U; + uint32_t cpuid7 = cpuid_extended_features(); #ifdef CONFIG_DISABLE_SSBD if ((cpuid7 & CPUID_SPEC_CTRL_SSBD) != 0U) { @@ -55,7 +55,7 @@ static int spec_ctrl_init(struct device *dev) } #endif if (enable_bits != 0U) { - u64_t cur = z_x86_msr_read(X86_SPEC_CTRL_MSR); + uint64_t cur = z_x86_msr_read(X86_SPEC_CTRL_MSR); z_x86_msr_write(X86_SPEC_CTRL_MSR, cur | enable_bits); diff --git a/arch/x86/core/userspace.c b/arch/x86/core/userspace.c index 2e737d4064..11da53fa9a 100644 --- a/arch/x86/core/userspace.c +++ b/arch/x86/core/userspace.c @@ -68,7 +68,7 @@ void z_x86_swap_update_page_tables(struct k_thread *incoming) FUNC_NORETURN static void drop_to_user(k_thread_entry_t user_entry, void *p1, void *p2, void *p3) { - u32_t stack_end; + uint32_t stack_end; /* Transition will reset stack pointer to initial, discarding * any old context since this is a one-way operation diff --git a/arch/x86/core/x86_mmu.c b/arch/x86/core/x86_mmu.c index f06c971143..9ded09481f 100644 --- a/arch/x86/core/x86_mmu.c +++ b/arch/x86/core/x86_mmu.c @@ -76,7 +76,7 @@ MMU_BOOT_REGION(&__kernel_ram_start, &__kernel_ram_size, */ #ifdef CONFIG_X86_64 -static inline void pml4e_update_pdpt(u64_t *pml4e, struct x86_mmu_pdpt *pdpt) +static inline void pml4e_update_pdpt(uint64_t *pml4e, struct x86_mmu_pdpt *pdpt) { uintptr_t pdpt_addr = (uintptr_t)pdpt; @@ -85,7 +85,7 @@ static inline void pml4e_update_pdpt(u64_t *pml4e, struct x86_mmu_pdpt *pdpt) } #endif /* CONFIG_X86_64 */ -static inline void pdpte_update_pd(u64_t *pdpte, struct x86_mmu_pd *pd) +static inline void pdpte_update_pd(uint64_t *pdpte, struct x86_mmu_pd *pd) { uintptr_t pd_addr = (uintptr_t)pd; @@ -96,7 +96,7 @@ static inline void pdpte_update_pd(u64_t *pdpte, struct x86_mmu_pd *pd) (pd_addr & Z_X86_MMU_PDPTE_PD_MASK)); } -static inline void pde_update_pt(u64_t *pde, struct x86_mmu_pt *pt) +static inline void pde_update_pt(uint64_t *pde, struct x86_mmu_pt *pt) { uintptr_t pt_addr = (uintptr_t)pt; @@ -106,7 +106,7 @@ static inline void pde_update_pt(u64_t *pde, struct x86_mmu_pt *pt) (pt_addr & Z_X86_MMU_PDE_PT_MASK)); } -static inline void pte_update_addr(u64_t *pte, uintptr_t addr) +static inline void pte_update_addr(uint64_t *pte, uintptr_t addr) { *pte = ((*pte & ~Z_X86_MMU_PTE_ADDR_MASK) | (addr & Z_X86_MMU_PTE_ADDR_MASK)); @@ -121,7 +121,7 @@ static inline void pte_update_addr(u64_t *pte, uintptr_t addr) * Not trying to capture every flag, just the most interesting stuff, * Present, write, XD, user, in typically encountered combinations. */ -static bool dump_entry_flags(const char *name, u64_t flags) +static bool dump_entry_flags(const char *name, uint64_t flags) { if ((flags & Z_X86_MMU_P) == 0) { LOG_ERR("%s: Non-present", name); @@ -140,7 +140,7 @@ static bool dump_entry_flags(const char *name, u64_t flags) void z_x86_dump_mmu_flags(struct x86_page_tables *ptables, uintptr_t addr) { - u64_t entry; + uint64_t entry; #ifdef CONFIG_X86_64 entry = *z_x86_get_pml4e(ptables, addr); @@ -174,7 +174,7 @@ void z_x86_dump_mmu_flags(struct x86_page_tables *ptables, uintptr_t addr) } } -static char get_entry_code(u64_t value) +static char get_entry_code(uint64_t value) { char ret; @@ -209,7 +209,7 @@ static char get_entry_code(u64_t value) return ret; } -static void print_entries(u64_t entries_array[], size_t count) +static void print_entries(uint64_t entries_array[], size_t count) { int column = 0; @@ -245,7 +245,7 @@ static void z_x86_dump_pd(struct x86_mmu_pd *pd, uintptr_t base, int index) for (int i = 0; i < Z_X86_NUM_PD_ENTRIES; i++) { struct x86_mmu_pt *pt; - u64_t pde = pd->entry[i]; + uint64_t pde = pd->entry[i]; if (((pde & Z_X86_MMU_P) == 0) || ((pde & Z_X86_MMU_PS) != 0)) { /* Skip non-present, or 2MB directory entries, there's @@ -268,7 +268,7 @@ static void z_x86_dump_pdpt(struct x86_mmu_pdpt *pdpt, uintptr_t base, for (int i = 0; i < Z_X86_NUM_PDPT_ENTRIES; i++) { struct x86_mmu_pd *pd; - u64_t pdpte = pdpt->entry[i]; + uint64_t pdpte = pdpt->entry[i]; if ((pdpte & Z_X86_MMU_P) == 0) { continue; @@ -292,7 +292,7 @@ static void z_x86_dump_pml4(struct x86_mmu_pml4 *pml4) for (int i = 0; i < Z_X86_NUM_PML4_ENTRIES; i++) { struct x86_mmu_pdpt *pdpt; - u64_t pml4e = pml4->entry[i]; + uint64_t pml4e = pml4->entry[i]; if ((pml4e & Z_X86_MMU_P) == 0) { continue; @@ -316,7 +316,7 @@ void z_x86_dump_page_tables(struct x86_page_tables *ptables) #endif void z_x86_mmu_get_flags(struct x86_page_tables *ptables, void *addr, - u64_t *pde_flags, u64_t *pte_flags) + uint64_t *pde_flags, uint64_t *pte_flags) { *pde_flags = *z_x86_get_pde(ptables, (uintptr_t)addr) & ~Z_X86_MMU_PDE_PT_MASK; @@ -358,7 +358,7 @@ static int x86_mmu_validate_pt(struct x86_mmu_pt *pt, uintptr_t addr, int ret = 0; while (true) { - u64_t pte = *z_x86_pt_get_pte(pt, pos); + uint64_t pte = *z_x86_pt_get_pte(pt, pos); if ((pte & Z_X86_MMU_P) == 0 || (pte & Z_X86_MMU_US) == 0 || (write && (pte & Z_X86_MMU_RW) == 0)) { @@ -387,7 +387,7 @@ static int x86_mmu_validate_pd(struct x86_mmu_pd *pd, uintptr_t addr, size_t to_examine; while (remaining) { - u64_t pde = *z_x86_pd_get_pde(pd, pos); + uint64_t pde = *z_x86_pd_get_pde(pd, pos); if ((pde & Z_X86_MMU_P) == 0 || (pde & Z_X86_MMU_US) == 0 || (write && (pde & Z_X86_MMU_RW) == 0)) { @@ -429,7 +429,7 @@ static int x86_mmu_validate_pdpt(struct x86_mmu_pdpt *pdpt, uintptr_t addr, size_t to_examine; while (remaining) { - u64_t pdpte = *z_x86_pdpt_get_pdpte(pdpt, pos); + uint64_t pdpte = *z_x86_pdpt_get_pdpte(pdpt, pos); if ((pdpte & Z_X86_MMU_P) == 0) { /* Non-present */ @@ -478,7 +478,7 @@ static int x86_mmu_validate_pml4(struct x86_mmu_pml4 *pml4, uintptr_t addr, size_t to_examine; while (remaining) { - u64_t pml4e = *z_x86_pml4_get_pml4e(pml4, pos); + uint64_t pml4e = *z_x86_pml4_get_pml4e(pml4, pos); struct x86_mmu_pdpt *pdpt; if ((pml4e & Z_X86_MMU_P) == 0 || (pml4e & Z_X86_MMU_US) == 0 || @@ -553,7 +553,7 @@ static inline void tlb_flush_page(void *addr) Z_X86_MMU_PCD) void z_x86_mmu_set_flags(struct x86_page_tables *ptables, void *ptr, - size_t size, u64_t flags, u64_t mask, bool flush) + size_t size, uint64_t flags, uint64_t mask, bool flush) { uintptr_t addr = (uintptr_t)ptr; @@ -572,13 +572,13 @@ void z_x86_mmu_set_flags(struct x86_page_tables *ptables, void *ptr, * modified. */ while (size != 0) { - u64_t *pte; - u64_t *pde; - u64_t *pdpte; + uint64_t *pte; + uint64_t *pde; + uint64_t *pdpte; #ifdef CONFIG_X86_64 - u64_t *pml4e; + uint64_t *pml4e; #endif - u64_t cur_flags = flags; + uint64_t cur_flags = flags; bool exec = (flags & Z_X86_MMU_XD) == 0; #ifdef CONFIG_X86_64 @@ -678,7 +678,7 @@ static inline bool is_within_system_ram(uintptr_t addr) /* Ignored bit posiition at all levels */ #define IGNORED BIT64(11) -static void maybe_clear_xd(u64_t *entry, bool exec) +static void maybe_clear_xd(uint64_t *entry, bool exec) { /* Execute disable bit needs special handling, we should only set it at * intermediate levels if ALL containing pages have XD set (instead of @@ -696,17 +696,17 @@ static void maybe_clear_xd(u64_t *entry, bool exec) } static void add_mmu_region_page(struct x86_page_tables *ptables, - uintptr_t addr, u64_t flags, bool user_table) + uintptr_t addr, uint64_t flags, bool user_table) { #ifdef CONFIG_X86_64 - u64_t *pml4e; + uint64_t *pml4e; #endif struct x86_mmu_pdpt *pdpt; - u64_t *pdpte; + uint64_t *pdpte; struct x86_mmu_pd *pd; - u64_t *pde; + uint64_t *pde; struct x86_mmu_pt *pt; - u64_t *pte; + uint64_t *pte; bool exec = (flags & Z_X86_MMU_XD) == 0; #ifdef CONFIG_X86_KPTI @@ -795,7 +795,7 @@ static void add_mmu_region(struct x86_page_tables *ptables, bool user_table) { size_t size; - u64_t flags; + uint64_t flags; uintptr_t addr; __ASSERT((rgn->address & MMU_PAGE_MASK) == 0U, @@ -818,7 +818,7 @@ static void add_mmu_region(struct x86_page_tables *ptables, } -void z_x86_add_mmu_region(uintptr_t addr, size_t size, u64_t flags) +void z_x86_add_mmu_region(uintptr_t addr, size_t size, uint64_t flags) { struct mmu_region rgn = { .address = addr, @@ -883,7 +883,7 @@ static uintptr_t thread_pdpt_create(uintptr_t pages, uintptr_t pos = pages, phys_addr = Z_X86_PDPT_START; for (int i = 0; i < Z_X86_NUM_PDPT; i++, phys_addr += Z_X86_PDPT_AREA) { - u64_t *pml4e; + uint64_t *pml4e; struct x86_mmu_pdpt *master_pdpt, *dest_pdpt; /* obtain master PDPT tables for the address range and copy @@ -911,7 +911,7 @@ static uintptr_t thread_pd_create(uintptr_t pages, uintptr_t pos = pages, phys_addr = Z_X86_PD_START; for (int i = 0; i < Z_X86_NUM_PD; i++, phys_addr += Z_X86_PD_AREA) { - u64_t *pdpte; + uint64_t *pdpte; struct x86_mmu_pd *master_pd, *dest_pd; /* Obtain PD in master tables for the address range and copy @@ -941,7 +941,7 @@ static uintptr_t thread_pt_create(uintptr_t pages, uintptr_t pos = pages, phys_addr = Z_X86_PT_START; for (int i = 0; i < Z_X86_NUM_PT; i++, phys_addr += Z_X86_PT_AREA) { - u64_t *pde; + uint64_t *pde; struct x86_mmu_pt *master_pt, *dest_pt; /* Same as we did with the directories, obtain PT in master @@ -1067,7 +1067,7 @@ static void reset_mem_partition(struct x86_page_tables *thread_ptables, __ASSERT((size & MMU_PAGE_MASK) == 0U, "unaligned size provided"); while (size != 0) { - u64_t *thread_pte, *master_pte; + uint64_t *thread_pte, *master_pte; thread_pte = z_x86_get_pte(thread_ptables, addr); master_pte = z_x86_get_pte(&USER_PTABLES, addr); @@ -1082,8 +1082,8 @@ static void reset_mem_partition(struct x86_page_tables *thread_ptables, static void apply_mem_partition(struct x86_page_tables *ptables, struct k_mem_partition *partition) { - u64_t x86_attr; - u64_t mask; + uint64_t x86_attr; + uint64_t mask; if (IS_ENABLED(CONFIG_X86_KPTI)) { x86_attr = partition->attr | Z_X86_MMU_P; @@ -1171,7 +1171,7 @@ void z_x86_thread_pt_init(struct k_thread *thread) * configuration applied. */ void arch_mem_domain_partition_remove(struct k_mem_domain *domain, - u32_t partition_id) + uint32_t partition_id) { sys_dnode_t *node, *next_node; @@ -1230,7 +1230,7 @@ void arch_mem_domain_thread_remove(struct k_thread *thread) } void arch_mem_domain_partition_add(struct k_mem_domain *domain, - u32_t partition_id) + uint32_t partition_id) { sys_dnode_t *node, *next_node; diff --git a/arch/x86/include/intel64/kernel_arch_data.h b/arch/x86/include/intel64/kernel_arch_data.h index c46cddadef..06212a5d26 100644 --- a/arch/x86/include/intel64/kernel_arch_data.h +++ b/arch/x86/include/intel64/kernel_arch_data.h @@ -20,9 +20,9 @@ extern char _locore_start[], _locore_end[]; struct x86_cpuboot { volatile int ready; /* CPU has started */ - u16_t tr; /* selector for task register */ + uint16_t tr; /* selector for task register */ struct x86_tss64 *gs_base; /* Base address for GS segment */ - u64_t sp; /* initial stack pointer */ + uint64_t sp; /* initial stack pointer */ arch_cpustart_t fn; /* kernel entry function */ void *arg; /* argument for above function */ #ifdef CONFIG_X86_MMU @@ -32,7 +32,7 @@ struct x86_cpuboot { typedef struct x86_cpuboot x86_cpuboot_t; -extern u8_t x86_cpu_loapics[]; /* CPU logical ID -> local APIC ID */ +extern uint8_t x86_cpu_loapics[]; /* CPU logical ID -> local APIC ID */ #endif /* _ASMLANGUAGE */ diff --git a/arch/x86/include/kernel_arch_func.h b/arch/x86/include/kernel_arch_func.h index eef7dfd1a8..e0620c2743 100644 --- a/arch/x86/include/kernel_arch_func.h +++ b/arch/x86/include/kernel_arch_func.h @@ -87,7 +87,7 @@ void z_x86_page_fault_handler(z_arch_esf_t *esf); * @param cs Code segment of faulting context * @return true if addr/size region is not within the thread stack */ -bool z_x86_check_stack_bounds(uintptr_t addr, size_t size, u16_t cs); +bool z_x86_check_stack_bounds(uintptr_t addr, size_t size, uint16_t cs); #endif /* CONFIG_THREAD_STACK_INFO */ #ifdef CONFIG_USERSPACE diff --git a/arch/xtensa/core/irq_manage.c b/arch/xtensa/core/irq_manage.c index 4f6c97a8fb..de7ecaa6c5 100644 --- a/arch/xtensa/core/irq_manage.c +++ b/arch/xtensa/core/irq_manage.c @@ -27,7 +27,7 @@ * @return N/A */ -void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags) +void z_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags) { __ASSERT(prio < XCHAL_EXCM_LEVEL + 1, "invalid priority %d! values must be less than %d\n", @@ -41,7 +41,7 @@ void z_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags) #ifndef CONFIG_MULTI_LEVEL_INTERRUPTS int z_arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, void (*routine)(void *parameter), - void *parameter, u32_t flags) + void *parameter, uint32_t flags) { ARG_UNUSED(flags); ARG_UNUSED(priority); @@ -52,7 +52,7 @@ int z_arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, #else /* !CONFIG_MULTI_LEVEL_INTERRUPTS */ int z_arch_irq_connect_dynamic(unsigned int irq, unsigned int priority, void (*routine)(void *parameter), - void *parameter, u32_t flags) + void *parameter, uint32_t flags) { return z_soc_irq_connect_dynamic(irq, priority, routine, parameter, flags); diff --git a/arch/xtensa/core/xtensa-asm2.c b/arch/xtensa/core/xtensa-asm2.c index aba74df6e1..b17ec722f8 100644 --- a/arch/xtensa/core/xtensa-asm2.c +++ b/arch/xtensa/core/xtensa-asm2.c @@ -139,7 +139,7 @@ static inline unsigned int get_bits(int offset, int num_bits, unsigned int val) #define DEF_INT_C_HANDLER(l) \ void *xtensa_int##l##_c(void *interrupted_stack) \ { \ - u32_t irqs, intenable, m; \ + uint32_t irqs, intenable, m; \ __asm__ volatile("rsr.interrupt %0" : "=r"(irqs)); \ __asm__ volatile("rsr.intenable %0" : "=r"(intenable)); \ irqs &= intenable; \ @@ -188,7 +188,7 @@ void *xtensa_excint1_c(int *interrupted_stack) bsa[BSA_PC_OFF/4] += 3; } else { - u32_t ps = bsa[BSA_PS_OFF/4]; + uint32_t ps = bsa[BSA_PS_OFF/4]; __asm__ volatile("rsr.excvaddr %0" : "=r"(vaddr)); @@ -219,7 +219,7 @@ void *xtensa_excint1_c(int *interrupted_stack) int z_xtensa_irq_is_enabled(unsigned int irq) { - u32_t ie; + uint32_t ie; __asm__ volatile("rsr.intenable %0" : "=r"(ie)); diff --git a/boards/arc/em_starterkit/pmodmux.c b/boards/arc/em_starterkit/pmodmux.c index 3c4d9e1e2e..f41689b3d5 100644 --- a/boards/arc/em_starterkit/pmodmux.c +++ b/boards/arc/em_starterkit/pmodmux.c @@ -126,7 +126,7 @@ static int pmod_mux_init(struct device *device) { - volatile u32_t *mux_regs = (u32_t *)(PMODMUX_BASE_ADDR); + volatile uint32_t *mux_regs = (uint32_t *)(PMODMUX_BASE_ADDR); mux_regs[SPI_MAP_CTRL] = SPI_MAP_CTRL_DEFAULT; mux_regs[UART_MAP_CTRL] = UART_MAP_CTRL_DEFAULT; diff --git a/boards/arm/lpcxpresso54114/pinmux.c b/boards/arm/lpcxpresso54114/pinmux.c index 9ad0dc2b60..258382f3b0 100644 --- a/boards/arm/lpcxpresso54114/pinmux.c +++ b/boards/arm/lpcxpresso54114/pinmux.c @@ -25,7 +25,7 @@ static int lpcxpresso_54114_pinmux_init(struct device *dev) #if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_usart, okay) && CONFIG_SERIAL /* USART0 RX, TX */ - const u32_t port0_pin0_config = ( + const uint32_t port0_pin0_config = ( IOCON_PIO_FUNC1 | IOCON_PIO_MODE_INACT | IOCON_PIO_INV_DI | @@ -35,7 +35,7 @@ static int lpcxpresso_54114_pinmux_init(struct device *dev) IOCON_PIO_OPENDRAIN_DI ); - const u32_t port0_pin1_config = ( + const uint32_t port0_pin1_config = ( IOCON_PIO_FUNC1 | IOCON_PIO_MODE_INACT | IOCON_PIO_INV_DI | @@ -51,7 +51,7 @@ static int lpcxpresso_54114_pinmux_init(struct device *dev) #endif #if DT_NODE_HAS_STATUS(DT_NODELABEL(gpio0), okay) - const u32_t port0_pin29_config = ( + const uint32_t port0_pin29_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_MODE_PULLUP | IOCON_PIO_INV_DI | @@ -62,7 +62,7 @@ static int lpcxpresso_54114_pinmux_init(struct device *dev) pinmux_pin_set(port0, 29, port0_pin29_config); - const u32_t port0_pin24_config = ( + const uint32_t port0_pin24_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_INV_DI | IOCON_PIO_DIGITAL_EN | @@ -71,7 +71,7 @@ static int lpcxpresso_54114_pinmux_init(struct device *dev) ); pinmux_pin_set(port0, 24, port0_pin24_config); - const u32_t port0_pin31_config = ( + const uint32_t port0_pin31_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_MODE_PULLUP | IOCON_PIO_INV_DI | @@ -81,7 +81,7 @@ static int lpcxpresso_54114_pinmux_init(struct device *dev) ); pinmux_pin_set(port0, 31, port0_pin31_config); - const u32_t port0_pin4_config = ( + const uint32_t port0_pin4_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_MODE_PULLUP | IOCON_PIO_INV_DI | @@ -94,7 +94,7 @@ static int lpcxpresso_54114_pinmux_init(struct device *dev) #endif #if DT_NODE_HAS_STATUS(DT_NODELABEL(gpio1), okay) - const u32_t port1_pin10_config = ( + const uint32_t port1_pin10_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_MODE_PULLUP | IOCON_PIO_INV_DI | diff --git a/boards/arm/lpcxpresso55s16/pinmux.c b/boards/arm/lpcxpresso55s16/pinmux.c index 2bd22bd25a..0156944ef5 100644 --- a/boards/arm/lpcxpresso55s16/pinmux.c +++ b/boards/arm/lpcxpresso55s16/pinmux.c @@ -25,7 +25,7 @@ static int lpcxpresso_55s16_pinmux_init(struct device *dev) #if DT_PHA_HAS_CELL(DT_ALIAS(sw0), gpios, pin) /* Wakeup button */ - const u32_t sw0_config = ( + const uint32_t sw0_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_INV_DI | IOCON_PIO_DIGITAL_EN | @@ -37,7 +37,7 @@ static int lpcxpresso_55s16_pinmux_init(struct device *dev) #if DT_PHA_HAS_CELL(DT_ALIAS(sw1), gpios, pin) /* USR button */ - const u32_t sw1_config = ( + const uint32_t sw1_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_INV_DI | IOCON_PIO_DIGITAL_EN | @@ -49,7 +49,7 @@ static int lpcxpresso_55s16_pinmux_init(struct device *dev) #if DT_PHA_HAS_CELL(DT_ALIAS(sw2), gpios, pin) /* ISP button */ - const u32_t sw2_config = ( + const uint32_t sw2_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_INV_DI | IOCON_PIO_DIGITAL_EN | @@ -61,7 +61,7 @@ static int lpcxpresso_55s16_pinmux_init(struct device *dev) #if DT_PHA_HAS_CELL(DT_ALIAS(led0), gpios, pin) /* Red LED */ - const u32_t led0_config = ( + const uint32_t led0_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_INV_DI | IOCON_PIO_DIGITAL_EN | @@ -73,7 +73,7 @@ static int lpcxpresso_55s16_pinmux_init(struct device *dev) #if DT_PHA_HAS_CELL(DT_ALIAS(led1), gpios, pin) /* Green LED */ - const u32_t led1_config = ( + const uint32_t led1_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_INV_DI | IOCON_PIO_DIGITAL_EN | @@ -85,7 +85,7 @@ static int lpcxpresso_55s16_pinmux_init(struct device *dev) #if DT_PHA_HAS_CELL(DT_ALIAS(led2), gpios, pin) /* Blue LED */ - const u32_t led2_config = ( + const uint32_t led2_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_INV_DI | IOCON_PIO_DIGITAL_EN | @@ -97,7 +97,7 @@ static int lpcxpresso_55s16_pinmux_init(struct device *dev) #if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_usart, okay) && CONFIG_SERIAL /* USART0 RX, TX */ - const u32_t port0_pin29_config = ( + const uint32_t port0_pin29_config = ( IOCON_PIO_FUNC1 | IOCON_PIO_MODE_INACT | IOCON_PIO_INV_DI | @@ -105,7 +105,7 @@ static int lpcxpresso_55s16_pinmux_init(struct device *dev) IOCON_PIO_SLEW_STANDARD | IOCON_PIO_OPENDRAIN_DI ); - const u32_t port0_pin30_config = ( + const uint32_t port0_pin30_config = ( IOCON_PIO_FUNC1 | IOCON_PIO_MODE_INACT | IOCON_PIO_INV_DI | diff --git a/boards/arm/lpcxpresso55s69/pinmux.c b/boards/arm/lpcxpresso55s69/pinmux.c index e212474884..37fc154d95 100644 --- a/boards/arm/lpcxpresso55s69/pinmux.c +++ b/boards/arm/lpcxpresso55s69/pinmux.c @@ -25,7 +25,7 @@ static int lpcxpresso_55s69_pinmux_init(struct device *dev) #if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_usart, okay) && CONFIG_SERIAL /* USART0 RX, TX */ - const u32_t port0_pin29_config = ( + const uint32_t port0_pin29_config = ( IOCON_PIO_FUNC1 | IOCON_PIO_MODE_INACT | IOCON_PIO_INV_DI | @@ -34,7 +34,7 @@ static int lpcxpresso_55s69_pinmux_init(struct device *dev) IOCON_PIO_OPENDRAIN_DI ); - const u32_t port0_pin30_config = ( + const uint32_t port0_pin30_config = ( IOCON_PIO_FUNC1 | IOCON_PIO_MODE_INACT | IOCON_PIO_INV_DI | @@ -49,7 +49,7 @@ static int lpcxpresso_55s69_pinmux_init(struct device *dev) #endif #if DT_PHA_HAS_CELL(DT_ALIAS(sw0), gpios, pin) - const u32_t sw0_config = ( + const uint32_t sw0_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_MODE_PULLUP | IOCON_PIO_INV_DI | @@ -63,7 +63,7 @@ static int lpcxpresso_55s69_pinmux_init(struct device *dev) #if DT_PHA_HAS_CELL(DT_ALIAS(sw1), gpios, pin) - const u32_t sw1_config = ( + const uint32_t sw1_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_MODE_PULLUP | IOCON_PIO_INV_DI | @@ -76,7 +76,7 @@ static int lpcxpresso_55s69_pinmux_init(struct device *dev) #endif #if DT_PHA_HAS_CELL(DT_ALIAS(sw2), gpios, pin) - const u32_t sw2_config = ( + const uint32_t sw2_config = ( IOCON_PIO_FUNC0 | IOCON_PIO_MODE_PULLUP | IOCON_PIO_INV_DI | diff --git a/boards/arm/mimxrt1050_evk/pinmux.c b/boards/arm/mimxrt1050_evk/pinmux.c index 8afad26686..be9b8f6079 100644 --- a/boards/arm/mimxrt1050_evk/pinmux.c +++ b/boards/arm/mimxrt1050_evk/pinmux.c @@ -29,17 +29,17 @@ static gpio_pin_config_t enet_gpio_config = { */ static void mimxrt1050_evk_usdhc_pinmux( - u16_t nusdhc, bool init, - u32_t speed, u32_t strength) + uint16_t nusdhc, bool init, + uint32_t speed, uint32_t strength) { - u32_t cmd_data = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | + uint32_t cmd_data = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK | IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK | IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) | IOMUXC_SW_PAD_CTL_PAD_DSE(strength); - u32_t clk = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | + uint32_t clk = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK | IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(0) | diff --git a/boards/arm/mimxrt1060_evk/pinmux.c b/boards/arm/mimxrt1060_evk/pinmux.c index 961ea3c4d2..bab14ac590 100644 --- a/boards/arm/mimxrt1060_evk/pinmux.c +++ b/boards/arm/mimxrt1060_evk/pinmux.c @@ -31,10 +31,10 @@ static gpio_pin_config_t enet_gpio_config = { *Hyst. Enable Field: Hysteresis Enabled. */ -static void mimxrt1060_evk_usdhc_pinmux(u16_t nusdhc, bool init, u32_t speed, - u32_t strength) +static void mimxrt1060_evk_usdhc_pinmux(uint16_t nusdhc, bool init, uint32_t speed, + uint32_t strength) { - u32_t cmd_data = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | + uint32_t cmd_data = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK | IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK | @@ -42,7 +42,7 @@ static void mimxrt1060_evk_usdhc_pinmux(u16_t nusdhc, bool init, u32_t speed, IOMUXC_SW_PAD_CTL_PAD_PUS(1) | IOMUXC_SW_PAD_CTL_PAD_DSE(strength); - u32_t clk = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | + uint32_t clk = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK | IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(0) | diff --git a/boards/arm/mimxrt1064_evk/pinmux.c b/boards/arm/mimxrt1064_evk/pinmux.c index 829c7f12e8..0d243c945a 100644 --- a/boards/arm/mimxrt1064_evk/pinmux.c +++ b/boards/arm/mimxrt1064_evk/pinmux.c @@ -31,10 +31,10 @@ static gpio_pin_config_t enet_gpio_config = { *Hyst. Enable Field: Hysteresis Enabled. */ -static void mimxrt1064_evk_usdhc_pinmux(u16_t nusdhc, bool init, u32_t speed, - u32_t strength) +static void mimxrt1064_evk_usdhc_pinmux(uint16_t nusdhc, bool init, uint32_t speed, + uint32_t strength) { - u32_t cmd_data = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | + uint32_t cmd_data = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK | IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK | @@ -42,7 +42,7 @@ static void mimxrt1064_evk_usdhc_pinmux(u16_t nusdhc, bool init, u32_t speed, IOMUXC_SW_PAD_CTL_PAD_PUS(1) | IOMUXC_SW_PAD_CTL_PAD_DSE(strength); - u32_t clk = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | + uint32_t clk = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK | IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(0) | diff --git a/boards/arm/mm_swiftio/mmswiftio_flexspi_nor_config.h b/boards/arm/mm_swiftio/mmswiftio_flexspi_nor_config.h index 4aba23b694..58c8c3caa4 100644 --- a/boards/arm/mm_swiftio/mmswiftio_flexspi_nor_config.h +++ b/boards/arm/mm_swiftio/mmswiftio_flexspi_nor_config.h @@ -114,9 +114,9 @@ enum { kSerialFlash_1Pad = 1, struct flexspi_lut_seq_t { - u8_t seqNum; - u8_t seqId; - u16_t reserved; + uint8_t seqNum; + uint8_t seqId; + uint16_t reserved; }; @@ -129,54 +129,54 @@ enum { kDeviceConfigCmdType_Generic, struct flexspi_mem_config_t { - u32_t tag; - u32_t version; - u32_t reserved0; - u8_t readSampleClkSrc; - u8_t csHoldTime; - u8_t csSetupTime; - u8_t columnAddressWidth; + uint32_t tag; + uint32_t version; + uint32_t reserved0; + uint8_t readSampleClkSrc; + uint8_t csHoldTime; + uint8_t csSetupTime; + uint8_t columnAddressWidth; - u8_t deviceModeCfgEnable; - u8_t deviceModeType; + uint8_t deviceModeCfgEnable; + uint8_t deviceModeType; - u16_t waitTimeCfgCommands; + uint16_t waitTimeCfgCommands; struct flexspi_lut_seq_t deviceModeSeq; - u32_t deviceModeArg; - u8_t configCmdEnable; - u8_t configModeType[3]; + uint32_t deviceModeArg; + uint8_t configCmdEnable; + uint8_t configModeType[3]; struct flexspi_lut_seq_t configCmdSeqs[3]; - u32_t reserved1; - u32_t configCmdArgs[3]; - u32_t reserved2; - u32_t controllerMiscOption; + uint32_t reserved1; + uint32_t configCmdArgs[3]; + uint32_t reserved2; + uint32_t controllerMiscOption; - u8_t deviceType; - u8_t sflashPadType; - u8_t serialClkFreq; + uint8_t deviceType; + uint8_t sflashPadType; + uint8_t serialClkFreq; - u8_t lutCustomSeqEnable; + uint8_t lutCustomSeqEnable; - u32_t reserved3[2]; - u32_t sflashA1Size; - u32_t sflashA2Size; - u32_t sflashB1Size; - u32_t sflashB2Size; - u32_t csPadSettingOverride; - u32_t sclkPadSettingOverride; - u32_t dataPadSettingOverride; - u32_t dqsPadSettingOverride; - u32_t timeoutInMs; - u32_t commandInterval; - u16_t dataValidTime[2]; - u16_t busyOffset; - u16_t busyBitPolarity; + uint32_t reserved3[2]; + uint32_t sflashA1Size; + uint32_t sflashA2Size; + uint32_t sflashB1Size; + uint32_t sflashB2Size; + uint32_t csPadSettingOverride; + uint32_t sclkPadSettingOverride; + uint32_t dataPadSettingOverride; + uint32_t dqsPadSettingOverride; + uint32_t timeoutInMs; + uint32_t commandInterval; + uint16_t dataValidTime[2]; + uint16_t busyOffset; + uint16_t busyBitPolarity; - u32_t lookupTable[64]; + uint32_t lookupTable[64]; struct flexspi_lut_seq_t lutCustomSeq[12]; - u32_t reserved4[4]; + uint32_t reserved4[4]; }; @@ -217,17 +217,17 @@ struct flexspi_mem_config_t { struct flexspi_nor_config_t { struct flexspi_mem_config_t memConfig; - u32_t pageSize; - u32_t sectorSize; - u8_t ipcmdSerialClkFreq; - u8_t isUniformBlockSize; - u8_t reserved0[2]; - u8_t serialNorType; - u8_t needExitNoCmdMode; - u8_t halfClkForNonReadCmd; - u8_t needRestoreNoCmdMode; - u32_t blockSize; - u32_t reserve2[11]; + uint32_t pageSize; + uint32_t sectorSize; + uint8_t ipcmdSerialClkFreq; + uint8_t isUniformBlockSize; + uint8_t reserved0[2]; + uint8_t serialNorType; + uint8_t needExitNoCmdMode; + uint8_t halfClkForNonReadCmd; + uint8_t needRestoreNoCmdMode; + uint32_t blockSize; + uint32_t reserve2[11]; }; #ifdef __cplusplus diff --git a/boards/arm/mm_swiftio/mmswiftio_sdram_ini_dcd.c b/boards/arm/mm_swiftio/mmswiftio_sdram_ini_dcd.c index ff1074c12b..cac7fa33cc 100644 --- a/boards/arm/mm_swiftio/mmswiftio_sdram_ini_dcd.c +++ b/boards/arm/mm_swiftio/mmswiftio_sdram_ini_dcd.c @@ -16,7 +16,7 @@ __attribute__((section(".boot_hdr.dcd_data"))) #pragma location = ".boot_hdr.dcd_data" #endif -const u8_t dcd_data[] = { +const uint8_t dcd_data[] = { 0xD2, 0x04, 0x30, @@ -289,6 +289,6 @@ const u8_t dcd_data[] = { }; #else -const u8_t dcd_data[] = { 0x00 }; +const uint8_t dcd_data[] = { 0x00 }; #endif #endif diff --git a/boards/arm/mm_swiftio/pinmux.c b/boards/arm/mm_swiftio/pinmux.c index 0d0531b3ba..1f3d989f6b 100644 --- a/boards/arm/mm_swiftio/pinmux.c +++ b/boards/arm/mm_swiftio/pinmux.c @@ -29,17 +29,17 @@ static gpio_pin_config_t enet_gpio_config = { */ static void mm_swiftio_usdhc_pinmux( - u16_t nusdhc, bool init, - u32_t speed, u32_t strength) + uint16_t nusdhc, bool init, + uint32_t speed, uint32_t strength) { - u32_t cmd_data = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | + uint32_t cmd_data = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK | IOMUXC_SW_PAD_CTL_PAD_PKE_MASK | IOMUXC_SW_PAD_CTL_PAD_PUE_MASK | IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(1) | IOMUXC_SW_PAD_CTL_PAD_DSE(strength); - u32_t clk = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | + uint32_t clk = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) | IOMUXC_SW_PAD_CTL_PAD_SRE_MASK | IOMUXC_SW_PAD_CTL_PAD_HYS_MASK | IOMUXC_SW_PAD_CTL_PAD_PUS(0) | diff --git a/boards/arm/mps2_an385/pinmux.c b/boards/arm/mps2_an385/pinmux.c index ebe1cc1cb1..b9d4bd40d5 100644 --- a/boards/arm/mps2_an385/pinmux.c +++ b/boards/arm/mps2_an385/pinmux.c @@ -117,9 +117,9 @@ */ static void arm_mps2_pinmux_defaults(void) { - u32_t gpio_0 = 0U; - u32_t gpio_1 = 0U; - u32_t gpio_2 = 0U; + uint32_t gpio_0 = 0U; + uint32_t gpio_1 = 0U; + uint32_t gpio_2 = 0U; /* Set GPIO Alternate Functions */ diff --git a/boards/arm/mps2_an521/pinmux.c b/boards/arm/mps2_an521/pinmux.c index ebc2797456..116736f3dd 100644 --- a/boards/arm/mps2_an521/pinmux.c +++ b/boards/arm/mps2_an521/pinmux.c @@ -117,9 +117,9 @@ */ static void arm_mps2_pinmux_defaults(void) { - u32_t gpio_0 = 0; - u32_t gpio_1 = 0; - u32_t gpio_2 = 0; + uint32_t gpio_0 = 0; + uint32_t gpio_1 = 0; + uint32_t gpio_2 = 0; /* Set GPIO Alternate Functions */ diff --git a/boards/arm/nrf9160dk_nrf52840/board.c b/boards/arm/nrf9160dk_nrf52840/board.c index 44147c7123..58ae7608b4 100644 --- a/boards/arm/nrf9160dk_nrf52840/board.c +++ b/boards/arm/nrf9160dk_nrf52840/board.c @@ -56,8 +56,8 @@ LOG_MODULE_REGISTER(board_control, CONFIG_BOARD_NRF9160DK_LOG_LEVEL); */ __packed struct pin_config { - u8_t pin; - u8_t val; + uint8_t pin; + uint8_t val; }; /* The following tables specify the configuration of each pin based on the @@ -183,7 +183,7 @@ static int pins_configure(struct device *port, const struct pin_config cfg[], * so configure the pin as output with the proper initial * state. */ - u32_t flag = (cfg[i].val ? GPIO_OUTPUT_LOW + uint32_t flag = (cfg[i].val ? GPIO_OUTPUT_LOW : GPIO_OUTPUT_HIGH); err = gpio_pin_configure(port, cfg[i].pin, flag); if (err) { @@ -198,9 +198,9 @@ static int pins_configure(struct device *port, const struct pin_config cfg[], } static void chip_reset(struct device *gpio, - struct gpio_callback *cb, u32_t pins) + struct gpio_callback *cb, uint32_t pins) { - const u32_t stamp = k_cycle_get_32(); + const uint32_t stamp = k_cycle_get_32(); printk("GPIO reset line asserted, device reset.\n"); printk("Bye @ cycle32 %u\n", stamp); @@ -208,7 +208,7 @@ static void chip_reset(struct device *gpio, NVIC_SystemReset(); } -static void reset_pin_wait_low(struct device *port, u32_t pin) +static void reset_pin_wait_low(struct device *port, uint32_t pin) { int val; @@ -221,7 +221,7 @@ static void reset_pin_wait_low(struct device *port, u32_t pin) static int reset_pin_configure(struct device *p0, struct device *p1) { int err; - u32_t pin = 0; + uint32_t pin = 0; struct device *port = NULL; static struct gpio_callback gpio_ctx; diff --git a/boards/arm/qemu_cortex_m0/nrf_timer_timer.c b/boards/arm/qemu_cortex_m0/nrf_timer_timer.c index e654a28119..80d62b33aa 100644 --- a/boards/arm/qemu_cortex_m0/nrf_timer_timer.c +++ b/boards/arm/qemu_cortex_m0/nrf_timer_timer.c @@ -22,19 +22,19 @@ static struct k_spinlock lock; -static u32_t last_count; +static uint32_t last_count; -static u32_t counter_sub(u32_t a, u32_t b) +static uint32_t counter_sub(uint32_t a, uint32_t b) { return (a - b) & COUNTER_MAX; } -static void set_comparator(u32_t cyc) +static void set_comparator(uint32_t cyc) { nrf_timer_cc_set(TIMER, 0, cyc & COUNTER_MAX); } -static u32_t counter(void) +static uint32_t counter(void) { nrf_timer_task_trigger(TIMER, nrf_timer_capture_task_get(1)); @@ -47,13 +47,13 @@ void timer0_nrf_isr(void *arg) TIMER->EVENTS_COMPARE[0] = 0; k_spinlock_key_t key = k_spin_lock(&lock); - u32_t t = counter(); - u32_t dticks = counter_sub(t, last_count) / CYC_PER_TICK; + uint32_t t = counter(); + uint32_t dticks = counter_sub(t, last_count) / CYC_PER_TICK; last_count += dticks * CYC_PER_TICK; if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) { - u32_t next = last_count + CYC_PER_TICK; + uint32_t next = last_count + CYC_PER_TICK; /* As below: we're guaranteed to get an interrupt as * long as it's set two or more cycles in the future @@ -103,16 +103,16 @@ int z_clock_driver_init(struct device *device) return 0; } -void z_clock_set_timeout(s32_t ticks, bool idle) +void z_clock_set_timeout(int32_t ticks, bool idle) { ARG_UNUSED(idle); #ifdef CONFIG_TICKLESS_KERNEL ticks = (ticks == K_TICKS_FOREVER) ? MAX_TICKS : ticks; - ticks = MAX(MIN(ticks - 1, (s32_t)MAX_TICKS), 0); + ticks = MAX(MIN(ticks - 1, (int32_t)MAX_TICKS), 0); k_spinlock_key_t key = k_spin_lock(&lock); - u32_t cyc, dt, t = counter(); + uint32_t cyc, dt, t = counter(); bool zli_fixup = IS_ENABLED(CONFIG_ZERO_LATENCY_IRQS); /* Round up to next tick boundary */ @@ -164,23 +164,23 @@ void z_clock_set_timeout(s32_t ticks, bool idle) #endif /* CONFIG_TICKLESS_KERNEL */ } -u32_t z_clock_elapsed(void) +uint32_t z_clock_elapsed(void) { if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) { return 0; } k_spinlock_key_t key = k_spin_lock(&lock); - u32_t ret = counter_sub(counter(), last_count) / CYC_PER_TICK; + uint32_t ret = counter_sub(counter(), last_count) / CYC_PER_TICK; k_spin_unlock(&lock, key); return ret; } -u32_t z_timer_cycle_get_32(void) +uint32_t z_timer_cycle_get_32(void) { k_spinlock_key_t key = k_spin_lock(&lock); - u32_t ret = counter_sub(counter(), last_count) + last_count; + uint32_t ret = counter_sub(counter(), last_count) + last_count; k_spin_unlock(&lock, key); return ret; diff --git a/boards/arm/thingy52_nrf52832/board.c b/boards/arm/thingy52_nrf52832/board.c index 1d81408bc8..f904570918 100644 --- a/boards/arm/thingy52_nrf52832/board.c +++ b/boards/arm/thingy52_nrf52832/board.c @@ -13,7 +13,7 @@ struct pwr_ctrl_cfg { const char *port; - u32_t pin; + uint32_t pin; }; static int pwr_ctrl_init(struct device *dev) diff --git a/boards/arm/v2m_beetle/pinmux.c b/boards/arm/v2m_beetle/pinmux.c index e926db0dfa..4ebcd8781b 100644 --- a/boards/arm/v2m_beetle/pinmux.c +++ b/boards/arm/v2m_beetle/pinmux.c @@ -94,8 +94,8 @@ */ static void arm_v2m_beetle_pinmux_defaults(void) { - u32_t gpio_0 = 0U; - u32_t gpio_1 = 0U; + uint32_t gpio_0 = 0U; + uint32_t gpio_1 = 0U; /* Set GPIO Alternate Functions */ diff --git a/boards/arm/v2m_musca/pinmux.c b/boards/arm/v2m_musca/pinmux.c index cc8f46ce95..be78dd15ac 100644 --- a/boards/arm/v2m_musca/pinmux.c +++ b/boards/arm/v2m_musca/pinmux.c @@ -37,7 +37,7 @@ static void arm_musca_pinmux_defaults(void) */ static void arm_musca_pinmux_defaults(void) { - volatile u32_t *scc = (u32_t *)DT_REG_ADDR(DT_INST(0, arm_scc)); + volatile uint32_t *scc = (uint32_t *)DT_REG_ADDR(DT_INST(0, arm_scc)); /* there is only altfunc1, so steer all alt funcs to use 1 */ scc[IOMUX_ALTF1_INSEL] = 0xffff; diff --git a/boards/arm/v2m_musca_b1/pinmux.c b/boards/arm/v2m_musca_b1/pinmux.c index 71e82ad926..1d3d4074a0 100644 --- a/boards/arm/v2m_musca_b1/pinmux.c +++ b/boards/arm/v2m_musca_b1/pinmux.c @@ -37,7 +37,7 @@ static void arm_musca_b1_pinmux_defaults(void) */ static void arm_musca_b1_pinmux_defaults(void) { - volatile u32_t *scc = (u32_t *)DT_REG_ADDR(DT_INST(0, arm_scc)); + volatile uint32_t *scc = (uint32_t *)DT_REG_ADDR(DT_INST(0, arm_scc)); /* there is only altfunc1, so steer all alt funcs to use 1 */ scc[IOMUX_ALTF1_INSEL] = 0xffff; diff --git a/boards/posix/native_posix/board_irq.h b/boards/posix/native_posix/board_irq.h index 2eaac01d85..46f349f45a 100644 --- a/boards/posix/native_posix/board_irq.h +++ b/boards/posix/native_posix/board_irq.h @@ -17,7 +17,7 @@ extern "C" { void posix_isr_declare(unsigned int irq_p, int flags, void isr_p(void *), void *isr_param_p); -void posix_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags); +void posix_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags); /** * Configure a static interrupt. diff --git a/boards/posix/native_posix/cmdline_common.c b/boards/posix/native_posix/cmdline_common.c index 2f2cf58790..9528eaa93d 100644 --- a/boards/posix/native_posix/cmdline_common.c +++ b/boards/posix/native_posix/cmdline_common.c @@ -146,16 +146,16 @@ void cmd_read_option_value(const char *str, void *dest, const char type, endptr = (char *)str + strlen(str); break; case 'u': - *(u32_t *)dest = strtoul(str, &endptr, 0); + *(uint32_t *)dest = strtoul(str, &endptr, 0); break; case 'U': - *(u64_t *)dest = strtoull(str, &endptr, 0); + *(uint64_t *)dest = strtoull(str, &endptr, 0); break; case 'i': - *(s32_t *)dest = strtol(str, &endptr, 0); + *(int32_t *)dest = strtol(str, &endptr, 0); break; case 'I': - *(s64_t *)dest = strtoll(str, &endptr, 0); + *(int64_t *)dest = strtoll(str, &endptr, 0); break; case 'd': *(double *)dest = strtod(str, &endptr); @@ -201,16 +201,16 @@ void cmd_args_set_defaults(struct args_struct_t args_struct[]) *(char **)args_struct[count].dest = NULL; break; case 'u': - *(u32_t *)args_struct[count].dest = UINT32_MAX; + *(uint32_t *)args_struct[count].dest = UINT32_MAX; break; case 'U': - *(u64_t *)args_struct[count].dest = UINT64_MAX; + *(uint64_t *)args_struct[count].dest = UINT64_MAX; break; case 'i': - *(s32_t *)args_struct[count].dest = INT32_MAX; + *(int32_t *)args_struct[count].dest = INT32_MAX; break; case 'I': - *(s64_t *)args_struct[count].dest = INT64_MAX; + *(int64_t *)args_struct[count].dest = INT64_MAX; break; case 'd': *(double *)args_struct[count].dest = NAN; diff --git a/boards/posix/native_posix/hw_models_top.c b/boards/posix/native_posix/hw_models_top.c index cc87695900..629efe48c5 100644 --- a/boards/posix/native_posix/hw_models_top.c +++ b/boards/posix/native_posix/hw_models_top.c @@ -24,14 +24,14 @@ #include -static u64_t simu_time; /* The actual time as known by the HW models */ -static u64_t end_of_time = NEVER; /* When will this device stop */ +static uint64_t simu_time; /* The actual time as known by the HW models */ +static uint64_t end_of_time = NEVER; /* When will this device stop */ /* List of HW model timers: */ -extern u64_t hw_timer_timer; /* When should this timer_model be called */ -extern u64_t irq_ctrl_timer; +extern uint64_t hw_timer_timer; /* When should this timer_model be called */ +extern uint64_t irq_ctrl_timer; #ifdef CONFIG_HAS_SDL -extern u64_t sdl_event_timer; +extern uint64_t sdl_event_timer; #endif static enum { @@ -44,7 +44,7 @@ static enum { NONE } next_timer_index = NONE; -static u64_t *Timer_list[NUMBER_OF_TIMERS] = { +static uint64_t *Timer_list[NUMBER_OF_TIMERS] = { &hw_timer_timer, &irq_ctrl_timer, #ifdef CONFIG_HAS_SDL @@ -52,7 +52,7 @@ static u64_t *Timer_list[NUMBER_OF_TIMERS] = { #endif }; -static u64_t next_timer_time; +static uint64_t next_timer_time; /* Have we received a SIGTERM or SIGINT */ static volatile sig_atomic_t signaled_end; @@ -169,7 +169,7 @@ void hwm_main_loop(void) /** * Set the simulated time when the process will stop */ -void hwm_set_end_of_time(u64_t new_end_of_time) +void hwm_set_end_of_time(uint64_t new_end_of_time) { end_of_time = new_end_of_time; } @@ -177,12 +177,12 @@ void hwm_set_end_of_time(u64_t new_end_of_time) /** * Return the current time as known by the device */ -u64_t hwm_get_time(void) +uint64_t hwm_get_time(void) { return simu_time; } -u64_t posix_get_hw_cycle(void) +uint64_t posix_get_hw_cycle(void) { return hwm_get_time(); } diff --git a/boards/posix/native_posix/hw_models_top.h b/boards/posix/native_posix/hw_models_top.h index 2430811015..87ad2f3943 100644 --- a/boards/posix/native_posix/hw_models_top.h +++ b/boards/posix/native_posix/hw_models_top.h @@ -19,8 +19,8 @@ extern "C" { void hwm_main_loop(void); void hwm_init(void); void hwm_cleanup(void); -void hwm_set_end_of_time(u64_t new_end_of_time); -u64_t hwm_get_time(void); +void hwm_set_end_of_time(uint64_t new_end_of_time); +uint64_t hwm_get_time(void); void hwm_find_next_timer(void); #ifdef __cplusplus diff --git a/boards/posix/native_posix/irq_ctrl.c b/boards/posix/native_posix/irq_ctrl.c index 8cf8ec9b7a..76dcaffefe 100644 --- a/boards/posix/native_posix/irq_ctrl.c +++ b/boards/posix/native_posix/irq_ctrl.c @@ -16,11 +16,11 @@ #include "posix_soc.h" #include "zephyr/types.h" -u64_t irq_ctrl_timer = NEVER; +uint64_t irq_ctrl_timer = NEVER; -static u64_t irq_status; /* pending interrupts */ -static u64_t irq_premask; /* interrupts before the mask */ +static uint64_t irq_status; /* pending interrupts */ +static uint64_t irq_premask; /* interrupts before the mask */ /* * Mask of which interrupts will actually cause the cpu to vector into its @@ -30,7 +30,7 @@ static u64_t irq_premask; /* interrupts before the mask */ * If the irq_mask enables and interrupt pending in irq_premask, it will cause * the controller to raise the interrupt immediately */ -static u64_t irq_mask; +static uint64_t irq_mask; /* * Interrupts lock/disable. When set, interrupts are registered @@ -40,7 +40,7 @@ static u64_t irq_mask; static bool irqs_locked; static bool lock_ignore; /* For the hard fake IRQ, temporarily ignore lock */ -static u8_t irq_prio[N_IRQS]; /* Priority of each interrupt */ +static uint8_t irq_prio[N_IRQS]; /* Priority of each interrupt */ /* note that prio = 0 == highest, prio=255 == lowest */ static int currently_running_prio = 256; /* 255 is the lowest prio interrupt */ @@ -77,7 +77,7 @@ void hw_irq_ctrl_prio_set(unsigned int irq, unsigned int prio) irq_prio[irq] = prio; } -u8_t hw_irq_ctrl_get_prio(unsigned int irq) +uint8_t hw_irq_ctrl_get_prio(unsigned int irq) { return irq_prio[irq]; } @@ -94,14 +94,14 @@ int hw_irq_ctrl_get_highest_prio_irq(void) return -1; } - u64_t irq_status = hw_irq_ctrl_get_irq_status(); + uint64_t irq_status = hw_irq_ctrl_get_irq_status(); int winner = -1; int winner_prio = 256; while (irq_status != 0U) { int irq_nbr = find_lsb_set(irq_status) - 1; - irq_status &= ~((u64_t) 1 << irq_nbr); + irq_status &= ~((uint64_t) 1 << irq_nbr); if ((winner_prio > (int)irq_prio[irq_nbr]) && (currently_running_prio > (int)irq_prio[irq_nbr])) { winner = irq_nbr; @@ -112,14 +112,14 @@ int hw_irq_ctrl_get_highest_prio_irq(void) } -u32_t hw_irq_ctrl_get_current_lock(void) +uint32_t hw_irq_ctrl_get_current_lock(void) { return irqs_locked; } -u32_t hw_irq_ctrl_change_lock(u32_t new_lock) +uint32_t hw_irq_ctrl_change_lock(uint32_t new_lock) { - u32_t previous_lock = irqs_locked; + uint32_t previous_lock = irqs_locked; irqs_locked = new_lock; @@ -150,23 +150,23 @@ void hw_irq_ctrl_clear_all_irqs(void) void hw_irq_ctrl_disable_irq(unsigned int irq) { - irq_mask &= ~((u64_t)1< -static char *us_time_to_str(char *dest, u64_t time) +static char *us_time_to_str(char *dest, uint64_t time) { if (time != NEVER) { unsigned int hour; @@ -64,13 +64,13 @@ static char *us_time_to_str(char *dest, u64_t time) } #endif -u64_t hw_timer_timer; +uint64_t hw_timer_timer; -u64_t hw_timer_tick_timer; -u64_t hw_timer_awake_timer; +uint64_t hw_timer_tick_timer; +uint64_t hw_timer_awake_timer; -static u64_t tick_p; /* Period of the ticker */ -static s64_t silent_ticks; +static uint64_t tick_p; /* Period of the ticker */ +static int64_t silent_ticks; static bool real_time_mode = #if defined(CONFIG_NATIVE_POSIX_SLOWDOWN_TO_REAL_TIME) @@ -85,7 +85,7 @@ static bool reset_rtc; /*"Reset" the RTC on boot*/ * When this executable started running, this value shall not be changed after * boot */ -static u64_t boot_time; +static uint64_t boot_time; /* * Ratio of the simulated clock to the real host time @@ -103,21 +103,21 @@ static double clock_ratio = 1.0; * * This variable is only kept for debugging purposes */ -static s64_t last_drift_offset; +static int64_t last_drift_offset; #endif /* * Offsets of the RTC relative to the hardware models simu_time * "simu_time" == simulated time which starts at 0 on boot */ -static s64_t rtc_offset; +static int64_t rtc_offset; /* Last host/real time when the ratio was adjusted */ -static u64_t last_radj_rtime; +static uint64_t last_radj_rtime; /* Last simulated time when the ratio was adjusted */ -static u64_t last_radj_stime; +static uint64_t last_radj_stime; -extern u64_t posix_get_hw_cycle(void); +extern uint64_t posix_get_hw_cycle(void); void hwtimer_set_real_time_mode(bool new_rt) { @@ -138,12 +138,12 @@ static inline void host_clock_gettime(struct timespec *tv) #endif } -u64_t get_host_us_time(void) +uint64_t get_host_us_time(void) { struct timespec tv; host_clock_gettime(&tv); - return (u64_t)tv.tv_sec * 1e6 + tv.tv_nsec / 1000; + return (uint64_t)tv.tv_sec * 1e6 + tv.tv_nsec / 1000; } void hwtimer_init(void) @@ -159,10 +159,10 @@ void hwtimer_init(void) } if (!reset_rtc) { struct timespec tv; - u64_t realhosttime; + uint64_t realhosttime; clock_gettime(CLOCK_REALTIME, &tv); - realhosttime = (u64_t)tv.tv_sec * 1e6 + tv.tv_nsec / 1000; + realhosttime = (uint64_t)tv.tv_sec * 1e6 + tv.tv_nsec / 1000; rtc_offset += realhosttime; } @@ -176,7 +176,7 @@ void hwtimer_cleanup(void) /** * Enable the HW timer tick interrupts with a period in micoseconds */ -void hwtimer_enable(u64_t period) +void hwtimer_enable(uint64_t period) { tick_p = period; hw_timer_tick_timer = hwm_get_time() + tick_p; @@ -187,12 +187,12 @@ void hwtimer_enable(u64_t period) static void hwtimer_tick_timer_reached(void) { if (real_time_mode) { - u64_t expected_rt = (hw_timer_tick_timer - last_radj_stime) + uint64_t expected_rt = (hw_timer_tick_timer - last_radj_stime) / clock_ratio + last_radj_rtime; - u64_t real_time = get_host_us_time(); + uint64_t real_time = get_host_us_time(); - s64_t diff = expected_rt - real_time; + int64_t diff = expected_rt - real_time; #if DEBUG_NP_TIMER char es[30]; @@ -236,7 +236,7 @@ static void hwtimer_awake_timer_reached(void) void hwtimer_timer_reached(void) { - u64_t Now = hw_timer_timer; + uint64_t Now = hw_timer_timer; if (hw_timer_awake_timer == Now) { hwtimer_awake_timer_reached(); @@ -255,7 +255,7 @@ void hwtimer_timer_reached(void) * * This is meant for k_busy_wait() like functionality */ -void hwtimer_wake_in_time(u64_t time) +void hwtimer_wake_in_time(uint64_t time) { if (hw_timer_awake_timer > time) { hw_timer_awake_timer = time; @@ -267,12 +267,12 @@ void hwtimer_wake_in_time(u64_t time) * The kernel wants to skip the next sys_ticks tick interrupts * If sys_ticks == 0, the next interrupt will be raised. */ -void hwtimer_set_silent_ticks(s64_t sys_ticks) +void hwtimer_set_silent_ticks(int64_t sys_ticks) { silent_ticks = sys_ticks; } -s64_t hwtimer_get_pending_silent_ticks(void) +int64_t hwtimer_get_pending_silent_ticks(void) { return silent_ticks; } @@ -291,7 +291,7 @@ void hwtimer_reset_rtc(void) * Set a time offset (microseconds) of the RTC simulated time * Note: This should not be used after starting */ -void hwtimer_set_rtc_offset(s64_t offset) +void hwtimer_set_rtc_offset(int64_t offset) { rtc_offset = offset; } @@ -308,7 +308,7 @@ void hwtimer_set_rt_ratio(double ratio) /** * Increase or decrease the RTC simulated time by offset_delta */ -void hwtimer_adjust_rtc_offset(s64_t offset_delta) +void hwtimer_adjust_rtc_offset(int64_t offset_delta) { rtc_offset += offset_delta; } @@ -318,8 +318,8 @@ void hwtimer_adjust_rtc_offset(s64_t offset_delta) */ void hwtimer_adjust_rt_ratio(double ratio_correction) { - u64_t current_stime = hwm_get_time(); - s64_t s_diff = current_stime - last_radj_stime; + uint64_t current_stime = hwm_get_time(); + int64_t s_diff = current_stime - last_radj_stime; /* Accumulated real time drift time since last adjustment: */ last_radj_rtime += s_diff / clock_ratio; @@ -327,7 +327,7 @@ void hwtimer_adjust_rt_ratio(double ratio_correction) #if DEBUG_NP_TIMER char ct[30]; - s64_t r_drift = (long double)(clock_ratio-1.0)/(clock_ratio)*s_diff; + int64_t r_drift = (long double)(clock_ratio-1.0)/(clock_ratio)*s_diff; last_drift_offset += r_drift; us_time_to_str(ct, current_stime); @@ -351,7 +351,7 @@ void hwtimer_adjust_rt_ratio(double ratio_correction) /** * Return the current simulated RTC time in microseconds */ -s64_t hwtimer_get_simu_rtc_time(void) +int64_t hwtimer_get_simu_rtc_time(void) { return hwm_get_time() + rtc_offset; } @@ -367,7 +367,7 @@ s64_t hwtimer_get_simu_rtc_time(void) * This will be the case in general if native_posix is not able to run at or * faster than real time. */ -void hwtimer_get_pseudohost_rtc_time(u32_t *nsec, u64_t *sec) +void hwtimer_get_pseudohost_rtc_time(uint32_t *nsec, uint64_t *sec) { /* * Note: long double has a 64bits mantissa in x86. @@ -396,8 +396,8 @@ void hwtimer_get_pseudohost_rtc_time(u32_t *nsec, u64_t *sec) host_clock_gettime(&tv); - u64_t rt_us = (u64_t)tv.tv_sec * 1000000ULL + tv.tv_nsec / 1000; - u32_t rt_ns = tv.tv_nsec % 1000; + uint64_t rt_us = (uint64_t)tv.tv_sec * 1000000ULL + tv.tv_nsec / 1000; + uint32_t rt_ns = tv.tv_nsec % 1000; long double drt_us = (long double)rt_us - last_radj_rtime; long double drt_ns = drt_us * 1000.0 + (long double)rt_ns; diff --git a/boards/posix/native_posix/timer_model.h b/boards/posix/native_posix/timer_model.h index 2bcdfbe35f..2c782d69da 100644 --- a/boards/posix/native_posix/timer_model.h +++ b/boards/posix/native_posix/timer_model.h @@ -18,19 +18,19 @@ void hwtimer_init(void); void hwtimer_cleanup(void); void hwtimer_set_real_time_mode(bool new_rt); void hwtimer_timer_reached(void); -void hwtimer_wake_in_time(u64_t time); -void hwtimer_set_silent_ticks(s64_t sys_ticks); -void hwtimer_enable(u64_t period); -s64_t hwtimer_get_pending_silent_ticks(void); +void hwtimer_wake_in_time(uint64_t time); +void hwtimer_set_silent_ticks(int64_t sys_ticks); +void hwtimer_enable(uint64_t period); +int64_t hwtimer_get_pending_silent_ticks(void); void hwtimer_reset_rtc(void); -void hwtimer_set_rtc_offset(s64_t offset); +void hwtimer_set_rtc_offset(int64_t offset); void hwtimer_set_rt_ratio(double ratio); -void hwtimer_adjust_rtc_offset(s64_t offset_delta); +void hwtimer_adjust_rtc_offset(int64_t offset_delta); void hwtimer_adjust_rt_ratio(double ratio_correction); -s64_t hwtimer_get_simu_rtc_time(void); -void hwtimer_get_pseudohost_rtc_time(u32_t *nsec, u64_t *sec); +int64_t hwtimer_get_simu_rtc_time(void); +void hwtimer_get_pseudohost_rtc_time(uint32_t *nsec, uint64_t *sec); #ifdef __cplusplus } diff --git a/boards/posix/nrf52_bsim/board_irq.h b/boards/posix/nrf52_bsim/board_irq.h index d590d5d243..6330ee0110 100644 --- a/boards/posix/nrf52_bsim/board_irq.h +++ b/boards/posix/nrf52_bsim/board_irq.h @@ -17,7 +17,7 @@ extern "C" { void posix_isr_declare(unsigned int irq_p, int flags, void isr_p(void *), void *isr_param_p); -void posix_irq_priority_set(unsigned int irq, unsigned int prio, u32_t flags); +void posix_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags); /** * Configure a static interrupt. diff --git a/boards/posix/nrf52_bsim/irq_handler.c b/boards/posix/nrf52_bsim/irq_handler.c index 16ea4feeba..6fcd989e8f 100644 --- a/boards/posix/nrf52_bsim/irq_handler.c +++ b/boards/posix/nrf52_bsim/irq_handler.c @@ -122,7 +122,7 @@ static inline void vector_to_irq(int irq_nbr, int *may_swap) */ void posix_irq_handler(void) { - u64_t irq_lock; + uint64_t irq_lock; int irq_nbr; static int may_swap; diff --git a/boards/posix/nrf52_bsim/k_busy_wait.c b/boards/posix/nrf52_bsim/k_busy_wait.c index 5dcb68824b..cc85a50faf 100644 --- a/boards/posix/nrf52_bsim/k_busy_wait.c +++ b/boards/posix/nrf52_bsim/k_busy_wait.c @@ -16,7 +16,7 @@ * Note that interrupts may be received in the meanwhile and that therefore this * thread may lose context */ -void arch_busy_wait(u32_t usec_to_wait) +void arch_busy_wait(uint32_t usec_to_wait) { bs_time_t time_end = tm_get_hw_time() + usec_to_wait; diff --git a/boards/posix/nrf52_bsim/main.c b/boards/posix/nrf52_bsim/main.c index fcf64d4f87..7e1d2f740c 100644 --- a/boards/posix/nrf52_bsim/main.c +++ b/boards/posix/nrf52_bsim/main.c @@ -38,7 +38,7 @@ uint8_t inner_main_clean_up(int exit_code) bs_clean_back_channels(); - u8_t bst_result = bst_delete(); + uint8_t bst_result = bst_delete(); if (bst_result != 0U) { bs_trace_raw_time(2, "main: The TESTCASE FAILED with return " diff --git a/boards/posix/nrf52_bsim/radio_sim_nrfxx.h b/boards/posix/nrf52_bsim/radio_sim_nrfxx.h index 980b9c7031..cca9a15bcc 100644 --- a/boards/posix/nrf52_bsim/radio_sim_nrfxx.h +++ b/boards/posix/nrf52_bsim/radio_sim_nrfxx.h @@ -206,10 +206,10 @@ static inline void hal_radio_ram_prio_setup(void) } -static inline u32_t hal_radio_phy_mode_get(u8_t phy, u8_t flags) +static inline uint32_t hal_radio_phy_mode_get(uint8_t phy, uint8_t flags) { ARG_UNUSED(flags); - u32_t mode; + uint32_t mode; switch (phy) { case BIT(0): @@ -225,58 +225,58 @@ static inline u32_t hal_radio_phy_mode_get(u8_t phy, u8_t flags) return mode; } -static inline u32_t hal_radio_tx_power_min_get(void) +static inline uint32_t hal_radio_tx_power_min_get(void) { return RADIO_TXPOWER_TXPOWER_Neg40dBm; } -static inline u32_t hal_radio_tx_power_max_get(void) +static inline uint32_t hal_radio_tx_power_max_get(void) { return RADIO_TXPOWER_TXPOWER_Pos4dBm; } -static inline u32_t hal_radio_tx_power_floor(s8_t tx_power_lvl) +static inline uint32_t hal_radio_tx_power_floor(int8_t tx_power_lvl) { - if (tx_power_lvl >= (s8_t)RADIO_TXPOWER_TXPOWER_Pos4dBm) { + if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Pos4dBm) { return RADIO_TXPOWER_TXPOWER_Pos4dBm; } - if (tx_power_lvl >= (s8_t)RADIO_TXPOWER_TXPOWER_Pos3dBm) { + if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Pos3dBm) { return RADIO_TXPOWER_TXPOWER_Pos3dBm; } - if (tx_power_lvl >= (s8_t)RADIO_TXPOWER_TXPOWER_0dBm) { + if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_0dBm) { return RADIO_TXPOWER_TXPOWER_0dBm; } - if (tx_power_lvl >= (s8_t)RADIO_TXPOWER_TXPOWER_Neg4dBm) { + if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg4dBm) { return RADIO_TXPOWER_TXPOWER_Neg4dBm; } - if (tx_power_lvl >= (s8_t)RADIO_TXPOWER_TXPOWER_Neg8dBm) { + if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg8dBm) { return RADIO_TXPOWER_TXPOWER_Neg8dBm; } - if (tx_power_lvl >= (s8_t)RADIO_TXPOWER_TXPOWER_Neg12dBm) { + if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg12dBm) { return RADIO_TXPOWER_TXPOWER_Neg12dBm; } - if (tx_power_lvl >= (s8_t)RADIO_TXPOWER_TXPOWER_Neg16dBm) { + if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg16dBm) { return RADIO_TXPOWER_TXPOWER_Neg16dBm; } - if (tx_power_lvl >= (s8_t)RADIO_TXPOWER_TXPOWER_Neg20dBm) { + if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg20dBm) { return RADIO_TXPOWER_TXPOWER_Neg20dBm; } - if (tx_power_lvl >= (s8_t)RADIO_TXPOWER_TXPOWER_Neg30dBm) { + if (tx_power_lvl >= (int8_t)RADIO_TXPOWER_TXPOWER_Neg30dBm) { return RADIO_TXPOWER_TXPOWER_Neg30dBm; } return RADIO_TXPOWER_TXPOWER_Neg40dBm; } -static inline u32_t hal_radio_tx_ready_delay_us_get(u8_t phy, u8_t flags) +static inline uint32_t hal_radio_tx_ready_delay_us_get(uint8_t phy, uint8_t flags) { ARG_UNUSED(flags); @@ -289,7 +289,7 @@ static inline u32_t hal_radio_tx_ready_delay_us_get(u8_t phy, u8_t flags) } } -static inline u32_t hal_radio_rx_ready_delay_us_get(u8_t phy, u8_t flags) +static inline uint32_t hal_radio_rx_ready_delay_us_get(uint8_t phy, uint8_t flags) { ARG_UNUSED(flags); @@ -302,7 +302,7 @@ static inline u32_t hal_radio_rx_ready_delay_us_get(u8_t phy, u8_t flags) } } -static inline u32_t hal_radio_tx_chain_delay_us_get(u8_t phy, u8_t flags) +static inline uint32_t hal_radio_tx_chain_delay_us_get(uint8_t phy, uint8_t flags) { ARG_UNUSED(phy); ARG_UNUSED(flags); @@ -310,7 +310,7 @@ static inline u32_t hal_radio_tx_chain_delay_us_get(u8_t phy, u8_t flags) return HAL_RADIO_NRF52832_TX_CHAIN_DELAY_US; } -static inline u32_t hal_radio_rx_chain_delay_us_get(u8_t phy, u8_t flags) +static inline uint32_t hal_radio_rx_chain_delay_us_get(uint8_t phy, uint8_t flags) { ARG_UNUSED(flags); @@ -323,7 +323,7 @@ static inline u32_t hal_radio_rx_chain_delay_us_get(u8_t phy, u8_t flags) } } -static inline u32_t hal_radio_tx_ready_delay_ns_get(u8_t phy, u8_t flags) +static inline uint32_t hal_radio_tx_ready_delay_ns_get(uint8_t phy, uint8_t flags) { ARG_UNUSED(flags); @@ -336,7 +336,7 @@ static inline u32_t hal_radio_tx_ready_delay_ns_get(u8_t phy, u8_t flags) } } -static inline u32_t hal_radio_rx_ready_delay_ns_get(u8_t phy, u8_t flags) +static inline uint32_t hal_radio_rx_ready_delay_ns_get(uint8_t phy, uint8_t flags) { ARG_UNUSED(flags); @@ -349,7 +349,7 @@ static inline u32_t hal_radio_rx_ready_delay_ns_get(u8_t phy, u8_t flags) } } -static inline u32_t hal_radio_tx_chain_delay_ns_get(u8_t phy, u8_t flags) +static inline uint32_t hal_radio_tx_chain_delay_ns_get(uint8_t phy, uint8_t flags) { ARG_UNUSED(phy); ARG_UNUSED(flags); @@ -357,7 +357,7 @@ static inline u32_t hal_radio_tx_chain_delay_ns_get(u8_t phy, u8_t flags) return HAL_RADIO_NRF52832_TX_CHAIN_DELAY_US; } -static inline u32_t hal_radio_rx_chain_delay_ns_get(u8_t phy, u8_t flags) +static inline uint32_t hal_radio_rx_chain_delay_ns_get(uint8_t phy, uint8_t flags) { ARG_UNUSED(flags); diff --git a/doc/guides/documentation/index.rst b/doc/guides/documentation/index.rst index df2f4b1336..3fe5817216 100644 --- a/doc/guides/documentation/index.rst +++ b/doc/guides/documentation/index.rst @@ -398,10 +398,10 @@ For example:: struct z_object { char *name; - u8_t perms[CONFIG_MAX_THREAD_BYTES]; - u8_t type; - u8_t flags; - u32_t data; + uint8_t perms[CONFIG_MAX_THREAD_BYTES]; + uint8_t type; + uint8_t flags; + uint32_t data; } __packed; Note the blank line between the ``code-block`` directive and the first @@ -414,10 +414,10 @@ This would be rendered as: struct z_object { char *name; - u8_t perms[CONFIG_MAX_THREAD_BYTES]; - u8_t type; - u8_t flags; - u32_t data; + uint8_t perms[CONFIG_MAX_THREAD_BYTES]; + uint8_t type; + uint8_t flags; + uint32_t data; } __packed; diff --git a/doc/guides/dts/howtos.rst b/doc/guides/dts/howtos.rst index 33d4175adc..e286ff55a7 100644 --- a/doc/guides/dts/howtos.rst +++ b/doc/guides/dts/howtos.rst @@ -370,13 +370,13 @@ device-specific configuration and data structures and API functions, like this: /* per-device values to store in RAM */ }; struct my_dev_cfg { - u32_t freq; /* Just an example: initial clock frequency in Hz */ + uint32_t freq; /* Just an example: initial clock frequency in Hz */ /* other configuration to store in ROM */ }; /* Implement driver API functions (drivers/some_api.h callbacks): */ - static int my_driver_api_func1(struct device *dev, u32_t *foo) { /* ... */ } - static int my_driver_api_func2(struct device *dev, u64_t bar) { /* ... */ } + static int my_driver_api_func1(struct device *dev, uint32_t *foo) { /* ... */ } + static int my_driver_api_func2(struct device *dev, uint64_t bar) { /* ... */ } static struct some_api my_api_funcs = { .func1 = my_driver_api_func1, .func2 = my_driver_api_func2, diff --git a/doc/guides/tracing/index.rst b/doc/guides/tracing/index.rst index b4d0798033..9dc4805c3d 100644 --- a/doc/guides/tracing/index.rst +++ b/doc/guides/tracing/index.rst @@ -77,10 +77,10 @@ CTF Top-Layer Example The CTF_EVENT macro will serialize each argument to a field:: /* Example for illustration */ - static inline void ctf_top_foo(u32_t thread_id, ctf_bounded_string_t name) + static inline void ctf_top_foo(uint32_t thread_id, ctf_bounded_string_t name) { CTF_EVENT( - CTF_LITERAL(u8_t, 42), + CTF_LITERAL(uint8_t, 42), thread_id, name, "hello, I was emitted from function: ", diff --git a/doc/reference/drivers/index.rst b/doc/reference/drivers/index.rst index 3088fb61fc..017e955582 100644 --- a/doc/reference/drivers/index.rst +++ b/doc/reference/drivers/index.rst @@ -279,7 +279,7 @@ with a different interrupt line. In ``drivers/subsystem/subsystem_my_driver.h``: typedef void (*my_driver_config_irq_t)(struct device *device); struct my_driver_config { - u32_t base_addr; + uint32_t base_addr; my_driver_config_irq_t config_func; }; diff --git a/doc/reference/kernel/data_passing/mailboxes.rst b/doc/reference/kernel/data_passing/mailboxes.rst index e01cea886c..6b431a75f5 100644 --- a/doc/reference/kernel/data_passing/mailboxes.rst +++ b/doc/reference/kernel/data_passing/mailboxes.rst @@ -254,7 +254,7 @@ portion of the message isn't used. while (1) { /* generate random value to send */ - u32_t random_value = sys_rand32_get(); + uint32_t random_value = sys_rand32_get(); /* prepare to send empty message */ send_msg.info = random_value; diff --git a/doc/reference/kernel/data_passing/message_queues.rst b/doc/reference/kernel/data_passing/message_queues.rst index 41bdc1e504..ed5d836de8 100644 --- a/doc/reference/kernel/data_passing/message_queues.rst +++ b/doc/reference/kernel/data_passing/message_queues.rst @@ -79,9 +79,9 @@ that is capable of holding 10 items, each of which is 12 bytes long. .. code-block:: c struct data_item_type { - u32_t field1; - u32_t field2; - u32_t field3; + uint32_t field1; + uint32_t field2; + uint32_t field3; }; char __aligned(4) my_msgq_buffer[10 * sizeof(data_item_type)]; diff --git a/doc/reference/kernel/other/interrupts.rst b/doc/reference/kernel/other/interrupts.rst index 05528360f1..7d6fa4e4e6 100644 --- a/doc/reference/kernel/other/interrupts.rst +++ b/doc/reference/kernel/other/interrupts.rst @@ -329,9 +329,9 @@ struct _isr_list which is placed in a special .intList section: struct _isr_list { /** IRQ line number */ - s32_t irq; + int32_t irq; /** Flags for this IRQ, see ISR_FLAG_* definitions */ - s32_t flags; + int32_t flags; /** ISR to call */ void *func; /** Parameter for non-direct IRQs */ @@ -347,8 +347,8 @@ the .intList section preceded by a header: struct { void *spurious_irq_handler; void *sw_irq_handler; - u32_t num_isrs; - u32_t num_vectors; + uint32_t num_isrs; + uint32_t num_vectors; struct _isr_list isrs[]; <- of size num_isrs }; diff --git a/doc/reference/kernel/other/ring_buffers.rst b/doc/reference/kernel/other/ring_buffers.rst index a5ddefcb2d..40cc0b56bd 100644 --- a/doc/reference/kernel/other/ring_buffers.rst +++ b/doc/reference/kernel/other/ring_buffers.rst @@ -130,7 +130,7 @@ is capable of holding 64 words of data and metadata information. struct my_struct { struct ring_buf rb; - u32_t buffer[MY_RING_BUF_SIZE]; + uint32_t buffer[MY_RING_BUF_SIZE]; ... }; struct my_struct ms; @@ -177,7 +177,7 @@ A data item is added to a ring buffer by calling .. code-block:: c - u32_t data[MY_DATA_WORDS]; + uint32_t data[MY_DATA_WORDS]; int ret; ret = ring_buf_item_put(&ring_buf, TYPE_FOO, 0, data, SIZE32_OF(data)); @@ -205,8 +205,8 @@ Bytes are copied to a **byte mode** ring buffer by calling .. code-block:: c - u8_t my_data[MY_RING_BUF_BYTES]; - u32_t ret; + uint8_t my_data[MY_RING_BUF_BYTES]; + uint32_t ret; ret = ring_buf_put(&ring_buf, my_data, SIZE_OF(my_data)); if (ret != SIZE_OF(my_data)) { @@ -219,9 +219,9 @@ ring buffer's memory. For example: .. code-block:: c - u32_t size; - u32_t rx_size; - u8_t *data; + uint32_t size; + uint32_t rx_size; + uint8_t *data; int err; /* Allocate buffer within a ring buffer memory. */ @@ -245,16 +245,16 @@ A data item is removed from a ring buffer by calling .. code-block:: c - u32_t my_data[MY_DATA_WORDS]; - u16_t my_type; - u8_t my_value; - u8_t my_size; + uint32_t my_data[MY_DATA_WORDS]; + uint16_t my_type; + uint8_t my_value; + uint8_t my_size; int ret; my_size = SIZE32_OF(my_data); ret = ring_buf_item_get(&ring_buf, &my_type, &my_value, my_data, &my_size); if (ret == -EMSGSIZE) { - printk("Buffer is too small, need %d u32_t\n", my_size); + printk("Buffer is too small, need %d uint32_t\n", my_size); } else if (ret == -EAGAIN) { printk("Ring buffer is empty\n"); } else { @@ -268,7 +268,7 @@ Data bytes are copied out from a **byte mode** ring buffer by calling .. code-block:: c - u8_t my_data[MY_DATA_BYTES]; + uint8_t my_data[MY_DATA_BYTES]; size_t ret; ret = ring_buf_get(&ring_buf, my_data, sizeof(my_data)); @@ -284,9 +284,9 @@ operations on the ring buffer's memory. For example: .. code-block:: c - u32_t size; - u32_t proc_size; - u8_t *data; + uint32_t size; + uint32_t proc_size; + uint8_t *data; int err; /* Get buffer within a ring buffer memory. */ diff --git a/doc/reference/kernel/threads/index.rst b/doc/reference/kernel/threads/index.rst index 244e82bcae..48f35e15d4 100644 --- a/doc/reference/kernel/threads/index.rst +++ b/doc/reference/kernel/threads/index.rst @@ -277,12 +277,12 @@ each thread calls a specific routine. int call_tracking_routine(void) { - u32_t call_count; + uint32_t call_count; if (k_is_in_isr()) { /* ignore any call made by an ISR */ } else { - call_count = (u32_t)k_thread_custom_data_get(); + call_count = (uint32_t)k_thread_custom_data_get(); call_count++; k_thread_custom_data_set((void *)call_count); } diff --git a/doc/reference/kernel/timing/clocks.rst b/doc/reference/kernel/timing/clocks.rst index 726c838f22..5e90891e57 100644 --- a/doc/reference/kernel/timing/clocks.rst +++ b/doc/reference/kernel/timing/clocks.rst @@ -321,10 +321,10 @@ code. For example, consider this design: .. code-block:: c - void my_wait_for_event(struct my_subsys *obj, s32_t timeout_in_ms) + void my_wait_for_event(struct my_subsys *obj, int32_t timeout_in_ms) { while (true) { - u32_t start = k_uptime_get_32(); + uint32_t start = k_uptime_get_32(); if (is_event_complete(obj)) { return; @@ -350,7 +350,7 @@ expire. So such a loop might look like: void my_wait_for_event(struct my_subsys *obj, k_timeout_t timeout_in_ms) { /* Compute the end time from the timeout */ - u64_t end = z_timeout_end_calc(timeout_in_ms); + uint64_t end = z_timeout_end_calc(timeout_in_ms); while (end < k_uptime_ticks()) { if (is_event_complete(obj)) { diff --git a/doc/reference/logging/index.rst b/doc/reference/logging/index.rst index 4f318edf92..4d3ed9a570 100644 --- a/doc/reference/logging/index.rst +++ b/doc/reference/logging/index.rst @@ -247,7 +247,7 @@ In order to use instance level filtering following steps must be performed: struct foo_object { LOG_INSTANCE_PTR_DECLARE(log); - u32_t id; + uint32_t id; } - module must provide macro for instantiation. In that macro, logger instance diff --git a/doc/reference/networking/can_api.rst b/doc/reference/networking/can_api.rst index 256454e74c..11f1aef8a4 100644 --- a/doc/reference/networking/can_api.rst +++ b/doc/reference/networking/can_api.rst @@ -169,7 +169,7 @@ occurred. It does not block until the message is sent like the example above. .. code-block:: C - void tx_irq_callback(u32_t error_flags, void *arg) + void tx_irq_callback(uint32_t error_flags, void *arg) { char *sender = (char *)arg; diff --git a/doc/reference/networking/coap.rst b/doc/reference/networking/coap.rst index 8fb6fa02d9..777711d03e 100644 --- a/doc/reference/networking/coap.rst +++ b/doc/reference/networking/coap.rst @@ -89,8 +89,8 @@ the ``.well-known/core`` CoAP message. /* Initialize the CoAP message */ char *path = "test"; struct coap_packet request; - u8_t data[100]; - u8_t payload[20]; + uint8_t data[100]; + uint8_t payload[20]; coap_packet_init(&request, data, sizeof(data), 1, COAP_TYPE_CON, 8, coap_next_token(), @@ -104,7 +104,7 @@ the ``.well-known/core`` CoAP message. coap_packet_append_payload_marker(&request); /* Append payload */ - coap_packet_append_payload(&request, (u8_t *)payload, + coap_packet_append_payload(&request, (uint8_t *)payload, sizeof(payload) - 1); /* send over sockets */ diff --git a/doc/reference/networking/lwm2m.rst b/doc/reference/networking/lwm2m.rst index bb6fdbaece..5b94c4e871 100644 --- a/doc/reference/networking/lwm2m.rst +++ b/doc/reference/networking/lwm2m.rst @@ -259,7 +259,7 @@ for: .. code-block:: c - static int device_reboot_cb(u16_t obj_inst_id) + static int device_reboot_cb(uint16_t obj_inst_id) { LOG_INF("Device rebooting."); LOG_PANIC(); diff --git a/doc/reference/networking/mqtt.rst b/doc/reference/networking/mqtt.rst index 438a5a8112..f32b4be871 100644 --- a/doc/reference/networking/mqtt.rst +++ b/doc/reference/networking/mqtt.rst @@ -36,8 +36,8 @@ defined: .. code-block:: c /* Buffers for MQTT client. */ - static u8_t rx_buffer[256]; - static u8_t tx_buffer[256]; + static uint8_t rx_buffer[256]; + static uint8_t tx_buffer[256]; /* MQTT client context */ static struct mqtt_client client_ctx; @@ -77,7 +77,7 @@ used. An example configuration for TCP transport is shown below: /* MQTT client configuration */ client_ctx.broker = &broker; client_ctx.evt_cb = mqtt_evt_handler; - client_ctx.client_id.utf8 = (u8_t *)"zephyr_mqtt_client"; + client_ctx.client_id.utf8 = (uint8_t *)"zephyr_mqtt_client"; client_ctx.client_id.size = sizeof("zephyr_mqtt_client") - 1; client_ctx.password = NULL; client_ctx.user_name = NULL; diff --git a/doc/reference/networking/net_buf.rst b/doc/reference/networking/net_buf.rst index 42d5394190..17a30a0819 100644 --- a/doc/reference/networking/net_buf.rst +++ b/doc/reference/networking/net_buf.rst @@ -77,9 +77,9 @@ Add void *net_buf_add(struct net_buf *buf, size_t len); void *net_buf_add_mem(struct net_buf *buf, const void *mem, size_t len); - u8_t *net_buf_add_u8(struct net_buf *buf, u8_t value); - void net_buf_add_le16(struct net_buf *buf, u16_t value); - void net_buf_add_le32(struct net_buf *buf, u32_t value); + uint8_t *net_buf_add_u8(struct net_buf *buf, uint8_t value); + void net_buf_add_le16(struct net_buf *buf, uint16_t value); + void net_buf_add_le32(struct net_buf *buf, uint32_t value); Push Prepend data to the beginning of the buffer. Modifies both the data @@ -89,8 +89,8 @@ Push .. code-block:: c void *net_buf_push(struct net_buf *buf, size_t len); - void net_buf_push_u8(struct net_buf *buf, u8_t value); - void net_buf_push_le16(struct net_buf *buf, u16_t value); + void net_buf_push_u8(struct net_buf *buf, uint8_t value); + void net_buf_push_le16(struct net_buf *buf, uint16_t value); Pull Remove data from the beginning of the buffer. Modifies both the data @@ -101,9 +101,9 @@ Pull void *net_buf_pull(struct net_buf *buf, size_t len); void *net_buf_pull_mem(struct net_buf *buf, size_t len); - u8_t net_buf_pull_u8(struct net_buf *buf); - u16_t net_buf_pull_le16(struct net_buf *buf); - u32_t net_buf_pull_le32(struct net_buf *buf); + uint8_t net_buf_pull_u8(struct net_buf *buf); + uint16_t net_buf_pull_le16(struct net_buf *buf); + uint32_t net_buf_pull_le32(struct net_buf *buf); The Add and Push operations are used when encoding data into the buffer, whereas Pull is used when decoding data from a buffer. diff --git a/doc/reference/networking/net_mgmt.rst b/doc/reference/networking/net_mgmt.rst index 54e7e74622..75c0e205a3 100644 --- a/doc/reference/networking/net_mgmt.rst +++ b/doc/reference/networking/net_mgmt.rst @@ -86,7 +86,7 @@ An example follows. struct net_mgmt_event_callback callback; - void callback_handler(struct net_mgmt_event_callback *cb, u32_t mgmt_event, + void callback_handler(struct net_mgmt_event_callback *cb, uint32_t mgmt_event, struct net_if *iface) { if (mgmt_event == NET_EVENT_xxx) { @@ -126,7 +126,7 @@ You define your handler modeled with this signature: .. code-block:: c - static int your_handler(u32_t mgmt_event, struct net_if *iface, + static int your_handler(uint32_t mgmt_event, struct net_if *iface, void *data, size_t len); and then register it with an associated mgmt_request code: diff --git a/doc/reference/networking/net_pkt.rst b/doc/reference/networking/net_pkt.rst index 9d22a94669..2dca1b7761 100644 --- a/doc/reference/networking/net_pkt.rst +++ b/doc/reference/networking/net_pkt.rst @@ -216,7 +216,7 @@ Now, let's write 8 bytes: net_pkt_write(pkt, data, 8); The buffer length is now 8 bytes. -There are various helpers to write a byte, or big endian u16_t, u32_t. +There are various helpers to write a byte, or big endian uint16_t, uint32_t. .. code-block:: c diff --git a/doc/reference/power_management/index.rst b/doc/reference/power_management/index.rst index 33a110b0d5..9c374be4f0 100644 --- a/doc/reference/power_management/index.rst +++ b/doc/reference/power_management/index.rst @@ -158,7 +158,7 @@ the following function. .. code-block:: c - enum power_states sys_pm_policy_next_state(s32_t ticks); + enum power_states sys_pm_policy_next_state(int32_t ticks); Dummy ----- @@ -279,7 +279,7 @@ Default Initializer Function .. code-block:: c - int device_pm_control_nop(struct device *unused_device, u32_t unused_ctrl_command, void *unused_context); + int device_pm_control_nop(struct device *unused_device, uint32_t unused_ctrl_command, void *unused_context); If the driver doesn't implement any power control operations, the driver can @@ -315,7 +315,7 @@ Device Set Power State .. code-block:: c - int device_set_power_state(struct device *device, u32_t device_power_state, device_pm_cb cb, void *arg); + int device_set_power_state(struct device *device, uint32_t device_power_state, device_pm_cb cb, void *arg); Calls the :c:func:`device_pm_control()` handler function implemented by the device driver with DEVICE_PM_SET_POWER_STATE command. @@ -325,7 +325,7 @@ Device Get Power State .. code-block:: c - int device_get_power_state(struct device *device, u32_t * device_power_state); + int device_get_power_state(struct device *device, uint32_t * device_power_state); Calls the :c:func:`device_pm_control()` handler function implemented by the device driver with DEVICE_PM_GET_POWER_STATE command. diff --git a/doc/reference/shell/index.rst b/doc/reference/shell/index.rst index cf4a5336f5..fcd8ddb8f8 100644 --- a/doc/reference/shell/index.rst +++ b/doc/reference/shell/index.rst @@ -154,7 +154,7 @@ Newly added commands can be prompted or autocompleted with the :kbd:`Tab` key. static char dynamic_cmd_buffer[10][50]; /* commands counter */ - static u8_t dynamic_cmd_cnt; + static uint8_t dynamic_cmd_cnt; /* Function returning command dynamically created * in dynamic_cmd_buffer. diff --git a/doc/reference/usermode/memory_domain.rst b/doc/reference/usermode/memory_domain.rst index be708c24e7..89cdd42d3b 100644 --- a/doc/reference/usermode/memory_domain.rst +++ b/doc/reference/usermode/memory_domain.rst @@ -195,7 +195,7 @@ a read-write partition for it which may be added to a domain: .. code-block:: c - u8_t __aligned(32) buf[32]; + uint8_t __aligned(32) buf[32]; K_MEM_PARTITION_DEFINE(my_partition, buf, sizeof(buf), K_MEM_PARTITION_P_RW_U_RW); @@ -346,8 +346,8 @@ a memory domain. .. code-block:: c /* the start address of the MPU region needs to align with its size */ - u8_t __aligned(32) app0_buf[32]; - u8_t __aligned(32) app1_buf[32]; + uint8_t __aligned(32) app0_buf[32]; + uint8_t __aligned(32) app1_buf[32]; K_MEM_PARTITION_DEFINE(app0_part0, app0_buf, sizeof(app0_buf), K_MEM_PARTITION_P_RW_U_RW); @@ -368,8 +368,8 @@ memory domain one by one. .. code-block:: c /* the start address of the MPU region needs to align with its size */ - u8_t __aligned(32) app0_buf[32]; - u8_t __aligned(32) app1_buf[32]; + uint8_t __aligned(32) app0_buf[32]; + uint8_t __aligned(32) app1_buf[32]; K_MEM_PARTITION_DEFINE(app0_part0, app0_buf, sizeof(app0_buf), K_MEM_PARTITION_P_RW_U_RW); diff --git a/doc/reference/usermode/syscalls.rst b/doc/reference/usermode/syscalls.rst index 0198d2cac1..e100b1f0dd 100644 --- a/doc/reference/usermode/syscalls.rst +++ b/doc/reference/usermode/syscalls.rst @@ -325,7 +325,7 @@ For example: .. code-block:: c - static int z_vrfy_k_sem_take(struct k_sem *sem, s32_t timeout) + static int z_vrfy_k_sem_take(struct k_sem *sem, int32_t timeout) { Z_OOPS(Z_SYSCALL_OBJ(sem, K_OBJ_SEM)); return z_impl_k_sem_take(sem, timeout); diff --git a/drivers/adc/adc_common.c b/drivers/adc/adc_common.c index 8959e035e7..df513f7d89 100644 --- a/drivers/adc/adc_common.c +++ b/drivers/adc/adc_common.c @@ -7,11 +7,11 @@ #include int adc_gain_invert(enum adc_gain gain, - s32_t *value) + int32_t *value) { struct gain_desc { - u8_t mul; - u8_t div; + uint8_t mul; + uint8_t div; }; static const struct gain_desc gains[] = { [ADC_GAIN_1_6] = {.mul = 6, .div = 1}, @@ -32,7 +32,7 @@ int adc_gain_invert(enum adc_gain gain, }; int rv = -EINVAL; - if ((u8_t)gain < ARRAY_SIZE(gains)) { + if ((uint8_t)gain < ARRAY_SIZE(gains)) { const struct gain_desc *gdp = &gains[gain]; if ((gdp->mul != 0) && (gdp->div != 0)) { diff --git a/drivers/adc/adc_context.h b/drivers/adc/adc_context.h index 3b4267e0d4..6c86d71e04 100644 --- a/drivers/adc/adc_context.h +++ b/drivers/adc/adc_context.h @@ -56,7 +56,7 @@ struct adc_context { struct adc_sequence sequence; struct adc_sequence_options options; - u16_t sampling_index; + uint16_t sampling_index; }; #ifdef ADC_CONTEXT_USES_KERNEL_TIMER @@ -92,8 +92,8 @@ static inline void adc_context_request_next_sampling(struct adc_context *ctx) #ifdef ADC_CONTEXT_USES_KERNEL_TIMER static inline void adc_context_enable_timer(struct adc_context *ctx) { - u32_t interval_us = ctx->options.interval_us; - u32_t interval_ms = ceiling_fraction(interval_us, 1000UL); + uint32_t interval_us = ctx->options.interval_us; + uint32_t interval_ms = ceiling_fraction(interval_us, 1000UL); k_timer_start(&ctx->timer, K_NO_WAIT, K_MSEC(interval_ms)); } diff --git a/drivers/adc/adc_lmp90xxx.c b/drivers/adc/adc_lmp90xxx.c index f3eeaf167d..b2b6893b62 100644 --- a/drivers/adc/adc_lmp90xxx.c +++ b/drivers/adc/adc_lmp90xxx.c @@ -109,14 +109,14 @@ LOG_MODULE_REGISTER(adc_lmp90xxx); struct lmp90xxx_config { const char *spi_dev_name; const char *spi_cs_dev_name; - u8_t spi_cs_pin; + uint8_t spi_cs_pin; struct spi_config spi_cfg; const char *drdyb_dev_name; gpio_pin_t drdyb_pin; gpio_dt_flags_t drdyb_flags; - u8_t rtd_current; - u8_t resolution; - u8_t channels; + uint8_t rtd_current; + uint8_t resolution; + uint8_t channels; }; struct lmp90xxx_data { @@ -125,16 +125,16 @@ struct lmp90xxx_data { struct spi_cs_control spi_cs; struct gpio_callback drdyb_cb; struct k_mutex ura_lock; - u8_t ura; - s32_t *buffer; - s32_t *repeat_buffer; - u32_t channels; + uint8_t ura; + int32_t *buffer; + int32_t *repeat_buffer; + uint32_t channels; bool calibrate; - u8_t channel_odr[LMP90XXX_MAX_CHANNELS]; + uint8_t channel_odr[LMP90XXX_MAX_CHANNELS]; #ifdef CONFIG_ADC_LMP90XXX_GPIO struct k_mutex gpio_lock; - u8_t gpio_dircn; - u8_t gpio_dat; + uint8_t gpio_dircn; + uint8_t gpio_dat; #endif /* CONFIG_ADC_LMP90XXX_GPIO */ struct k_thread thread; struct k_sem acq_sem; @@ -148,7 +148,7 @@ struct lmp90xxx_data { * Approximated LMP90xxx acquisition times in milliseconds. These are * used for the initial delay when polling for data ready. */ -static const s32_t lmp90xxx_odr_delay_tbl[8] = { +static const int32_t lmp90xxx_odr_delay_tbl[8] = { 596, /* 13.42/8 = 1.6775 SPS */ 298, /* 13.42/4 = 3.355 SPS */ 149, /* 13.42/2 = 6.71 SPS */ @@ -159,7 +159,7 @@ static const s32_t lmp90xxx_odr_delay_tbl[8] = { 5, /* 214.65 SPS (default) */ }; -static inline u8_t lmp90xxx_inst2_sz(size_t len) +static inline uint8_t lmp90xxx_inst2_sz(size_t len) { if (len == 1) { return LMP90XXX_INST2_SZ_1; @@ -172,14 +172,14 @@ static inline u8_t lmp90xxx_inst2_sz(size_t len) } } -static int lmp90xxx_read_reg(struct device *dev, u8_t addr, u8_t *dptr, +static int lmp90xxx_read_reg(struct device *dev, uint8_t addr, uint8_t *dptr, size_t len) { const struct lmp90xxx_config *config = dev->config_info; struct lmp90xxx_data *data = dev->driver_data; - u8_t ura = LMP90XXX_URA(addr); - u8_t inst1_uab[2] = { LMP90XXX_INST1_WAB, ura }; - u8_t inst2 = LMP90XXX_INST2_R | LMP90XXX_LRA(addr); + uint8_t ura = LMP90XXX_URA(addr); + uint8_t inst1_uab[2] = { LMP90XXX_INST1_WAB, ura }; + uint8_t inst2 = LMP90XXX_INST2_R | LMP90XXX_LRA(addr); struct spi_buf tx_buf[2]; struct spi_buf rx_buf[2]; struct spi_buf_set tx; @@ -241,19 +241,19 @@ static int lmp90xxx_read_reg(struct device *dev, u8_t addr, u8_t *dptr, return err; } -static int lmp90xxx_read_reg8(struct device *dev, u8_t addr, u8_t *val) +static int lmp90xxx_read_reg8(struct device *dev, uint8_t addr, uint8_t *val) { return lmp90xxx_read_reg(dev, addr, val, sizeof(val)); } -static int lmp90xxx_write_reg(struct device *dev, u8_t addr, u8_t *dptr, +static int lmp90xxx_write_reg(struct device *dev, uint8_t addr, uint8_t *dptr, size_t len) { const struct lmp90xxx_config *config = dev->config_info; struct lmp90xxx_data *data = dev->driver_data; - u8_t ura = LMP90XXX_URA(addr); - u8_t inst1_uab[2] = { LMP90XXX_INST1_WAB, ura }; - u8_t inst2 = LMP90XXX_INST2_WB | LMP90XXX_LRA(addr); + uint8_t ura = LMP90XXX_URA(addr); + uint8_t inst1_uab[2] = { LMP90XXX_INST1_WAB, ura }; + uint8_t inst2 = LMP90XXX_INST2_WB | LMP90XXX_LRA(addr); struct spi_buf tx_buf[3]; struct spi_buf_set tx; int i = 0; @@ -305,7 +305,7 @@ static int lmp90xxx_write_reg(struct device *dev, u8_t addr, u8_t *dptr, return err; } -static int lmp90xxx_write_reg8(struct device *dev, u8_t addr, u8_t val) +static int lmp90xxx_write_reg8(struct device *dev, uint8_t addr, uint8_t val) { return lmp90xxx_write_reg(dev, addr, &val, sizeof(val)); } @@ -325,7 +325,7 @@ static int lmp90xxx_soft_reset(struct device *dev) LMP90XXX_REG_AND_CNV_RST); } -static inline bool lmp90xxx_has_channel(struct device *dev, u8_t channel) +static inline bool lmp90xxx_has_channel(struct device *dev, uint8_t channel) { const struct lmp90xxx_config *config = dev->config_info; @@ -336,7 +336,7 @@ static inline bool lmp90xxx_has_channel(struct device *dev, u8_t channel) } } -static inline bool lmp90xxx_has_input(struct device *dev, u8_t input) +static inline bool lmp90xxx_has_input(struct device *dev, uint8_t input) { const struct lmp90xxx_config *config = dev->config_info; @@ -351,9 +351,9 @@ static inline bool lmp90xxx_has_input(struct device *dev, u8_t input) } } -static inline int lmp90xxx_acq_time_to_odr(u16_t acq_time) +static inline int lmp90xxx_acq_time_to_odr(uint16_t acq_time) { - u16_t acq_value; + uint16_t acq_value; if (acq_time == ADC_ACQ_TIME_DEFAULT) { return LMP90XXX_DEFAULT_ODR; @@ -380,10 +380,10 @@ static int lmp90xxx_adc_channel_setup(struct device *dev, const struct adc_channel_cfg *channel_cfg) { struct lmp90xxx_data *data = dev->driver_data; - u8_t chx_inputcn = LMP90XXX_BURNOUT_EN(0); /* No burnout currents */ - u8_t chx_config = LMP90XXX_BUF_EN(0); /* No buffer */ - u8_t payload[2]; - u8_t addr; + uint8_t chx_inputcn = LMP90XXX_BURNOUT_EN(0); /* No burnout currents */ + uint8_t chx_config = LMP90XXX_BUF_EN(0); /* No buffer */ + uint8_t payload[2]; + uint8_t addr; int ret; switch (channel_cfg->reference) { @@ -471,9 +471,9 @@ static int lmp90xxx_adc_channel_setup(struct device *dev, static int lmp90xxx_validate_buffer_size(const struct adc_sequence *sequence) { - u8_t channels = 0; + uint8_t channels = 0; size_t needed; - u32_t mask; + uint32_t mask; for (mask = BIT(LMP90XXX_MAX_CHANNELS - 1); mask != 0; mask >>= 1) { if (mask & sequence->channels) { @@ -481,7 +481,7 @@ static int lmp90xxx_validate_buffer_size(const struct adc_sequence *sequence) } } - needed = channels * sizeof(s32_t); + needed = channels * sizeof(int32_t); if (sequence->options) { needed *= (1 + sequence->options->extra_samplings); } @@ -566,16 +566,16 @@ static void adc_context_update_buffer_pointer(struct adc_context *ctx, } } -static int lmp90xxx_adc_read_channel(struct device *dev, u8_t channel, - s32_t *result) +static int lmp90xxx_adc_read_channel(struct device *dev, uint8_t channel, + int32_t *result) { const struct lmp90xxx_config *config = dev->config_info; struct lmp90xxx_data *data = dev->driver_data; - u8_t adc_done; - u8_t ch_scan; - u8_t buf[4]; /* ADC_DOUT + CRC */ - s32_t delay; - u8_t odr; + uint8_t adc_done; + uint8_t ch_scan; + uint8_t buf[4]; /* ADC_DOUT + CRC */ + int32_t delay; + uint8_t odr; int err; /* Single channel, single scan mode */ @@ -630,7 +630,7 @@ static int lmp90xxx_adc_read_channel(struct device *dev, u8_t channel, } if (IS_ENABLED(CONFIG_ADC_LMP90XXX_CRC)) { - u8_t crc = crc8(buf, 3, 0x31, 0, false) ^ 0xFFU; + uint8_t crc = crc8(buf, 3, 0x31, 0, false) ^ 0xFFU; if (buf[3] != crc) { LOG_ERR("CRC mismatch (0x%02x vs. 0x%02x)", buf[3], @@ -640,7 +640,7 @@ static int lmp90xxx_adc_read_channel(struct device *dev, u8_t channel, } /* Read result, get rid of CRC, and sign extend result */ - *result = (s32_t)sys_get_be32(buf); + *result = (int32_t)sys_get_be32(buf); *result >>= (32 - config->resolution); return 0; @@ -649,9 +649,9 @@ static int lmp90xxx_adc_read_channel(struct device *dev, u8_t channel, static void lmp90xxx_acquisition_thread(struct device *dev) { struct lmp90xxx_data *data = dev->driver_data; - u8_t bgcalcn = LMP90XXX_BGCALN(0x3); /* Default to BgCalMode3 */ - s32_t result = 0; - u8_t channel; + uint8_t bgcalcn = LMP90XXX_BGCALN(0x3); /* Default to BgCalMode3 */ + int32_t result = 0; + uint8_t channel; int err; while (true) { @@ -686,7 +686,7 @@ static void lmp90xxx_acquisition_thread(struct device *dev) result); /* - * ADC samples are stored as s32_t regardless of the + * ADC samples are stored as int32_t regardless of the * resolution in order to provide a uniform interface * for the driver. */ @@ -699,7 +699,7 @@ static void lmp90xxx_acquisition_thread(struct device *dev) } static void lmp90xxx_drdyb_callback(struct device *port, - struct gpio_callback *cb, u32_t pins) + struct gpio_callback *cb, uint32_t pins) { struct lmp90xxx_data *data = CONTAINER_OF(cb, struct lmp90xxx_data, drdyb_cb); @@ -709,11 +709,11 @@ static void lmp90xxx_drdyb_callback(struct device *port, } #ifdef CONFIG_ADC_LMP90XXX_GPIO -int lmp90xxx_gpio_set_output(struct device *dev, u8_t pin) +int lmp90xxx_gpio_set_output(struct device *dev, uint8_t pin) { struct lmp90xxx_data *data = dev->driver_data; int err = 0; - u8_t tmp; + uint8_t tmp; if (pin > LMP90XXX_GPIO_MAX) { return -EINVAL; @@ -734,11 +734,11 @@ int lmp90xxx_gpio_set_output(struct device *dev, u8_t pin) return err; } -int lmp90xxx_gpio_set_input(struct device *dev, u8_t pin) +int lmp90xxx_gpio_set_input(struct device *dev, uint8_t pin) { struct lmp90xxx_data *data = dev->driver_data; int err = 0; - u8_t tmp; + uint8_t tmp; if (pin > LMP90XXX_GPIO_MAX) { return -EINVAL; @@ -759,11 +759,11 @@ int lmp90xxx_gpio_set_input(struct device *dev, u8_t pin) return err; } -int lmp90xxx_gpio_set_pin_value(struct device *dev, u8_t pin, bool value) +int lmp90xxx_gpio_set_pin_value(struct device *dev, uint8_t pin, bool value) { struct lmp90xxx_data *data = dev->driver_data; int err = 0; - u8_t tmp; + uint8_t tmp; if (pin > LMP90XXX_GPIO_MAX) { return -EINVAL; @@ -786,11 +786,11 @@ int lmp90xxx_gpio_set_pin_value(struct device *dev, u8_t pin, bool value) return err; } -int lmp90xxx_gpio_get_pin_value(struct device *dev, u8_t pin, bool *value) +int lmp90xxx_gpio_get_pin_value(struct device *dev, uint8_t pin, bool *value) { struct lmp90xxx_data *data = dev->driver_data; int err = 0; - u8_t tmp; + uint8_t tmp; if (pin > LMP90XXX_GPIO_MAX) { return -EINVAL; @@ -811,7 +811,7 @@ int lmp90xxx_gpio_get_pin_value(struct device *dev, u8_t pin, bool *value) int lmp90xxx_gpio_port_get_raw(struct device *dev, gpio_port_value_t *value) { struct lmp90xxx_data *data = dev->driver_data; - u8_t tmp; + uint8_t tmp; int err; k_mutex_lock(&data->gpio_lock, K_FOREVER); @@ -830,7 +830,7 @@ int lmp90xxx_gpio_port_set_masked_raw(struct device *dev, { struct lmp90xxx_data *data = dev->driver_data; int err = 0; - u8_t tmp; + uint8_t tmp; mask &= LMP90XXX_GPIO_DAT_MASK; @@ -851,7 +851,7 @@ int lmp90xxx_gpio_port_set_bits_raw(struct device *dev, gpio_port_pins_t pins) { struct lmp90xxx_data *data = dev->driver_data; int err = 0; - u8_t tmp; + uint8_t tmp; tmp = pins & LMP90XXX_GPIO_DAT_MASK; @@ -873,7 +873,7 @@ int lmp90xxx_gpio_port_clear_bits_raw(struct device *dev, { struct lmp90xxx_data *data = dev->driver_data; int err = 0; - u8_t tmp; + uint8_t tmp; tmp = pins & LMP90XXX_GPIO_DAT_MASK; @@ -893,7 +893,7 @@ int lmp90xxx_gpio_port_clear_bits_raw(struct device *dev, int lmp90xxx_gpio_port_toggle_bits(struct device *dev, gpio_port_pins_t pins) { struct lmp90xxx_data *data = dev->driver_data; - u8_t tmp; + uint8_t tmp; int err; tmp = pins & LMP90XXX_GPIO_DAT_MASK; diff --git a/drivers/adc/adc_mchp_xec.c b/drivers/adc/adc_mchp_xec.c index 91860d5100..e6492ec248 100644 --- a/drivers/adc/adc_mchp_xec.c +++ b/drivers/adc/adc_mchp_xec.c @@ -31,22 +31,22 @@ LOG_MODULE_REGISTER(adc_mchp_xec); struct adc_xec_data { struct adc_context ctx; - u16_t *buffer; - u16_t *repeat_buffer; + uint16_t *buffer; + uint16_t *repeat_buffer; }; struct adc_xec_regs { - u32_t control_reg; - u32_t delay_reg; - u32_t status_reg; - u32_t single_reg; - u32_t repeat_reg; - u32_t channel_read_reg[8]; - u32_t unused[18]; - u32_t config_reg; - u32_t vref_channel_reg; - u32_t vref_control_reg; - u32_t sar_control_reg; + uint32_t control_reg; + uint32_t delay_reg; + uint32_t status_reg; + uint32_t single_reg; + uint32_t repeat_reg; + uint32_t channel_read_reg[8]; + uint32_t unused[18]; + uint32_t config_reg; + uint32_t vref_channel_reg; + uint32_t vref_control_reg; + uint32_t sar_control_reg; }; #define ADC_XEC_REG_BASE \ @@ -80,7 +80,7 @@ static int adc_xec_channel_setup(struct device *dev, const struct adc_channel_cfg *channel_cfg) { struct adc_xec_regs *adc_regs = ADC_XEC_REG_BASE; - u32_t reg; + uint32_t reg; ARG_UNUSED(dev); @@ -125,7 +125,7 @@ static bool adc_xec_validate_buffer_size(const struct adc_sequence *sequence) { int chan_count = 0; size_t buff_need; - u32_t chan_mask; + uint32_t chan_mask; for (chan_mask = 0x80; chan_mask != 0; chan_mask >>= 1) { if (chan_mask & sequence->channels) { @@ -133,7 +133,7 @@ static bool adc_xec_validate_buffer_size(const struct adc_sequence *sequence) } } - buff_need = chan_count * sizeof(u16_t); + buff_need = chan_count * sizeof(uint16_t); if (sequence->options) { buff_need *= 1 + sequence->options->extra_samplings; @@ -151,7 +151,7 @@ static int adc_xec_start_read(struct device *dev, { struct adc_xec_regs *adc_regs = ADC_XEC_REG_BASE; struct adc_xec_data *data = dev->driver_data; - u32_t reg; + uint32_t reg; if (sequence->channels & ~BIT_MASK(MCHP_ADC_MAX_CHAN)) { LOG_ERR("Incorrect channels, bitmask 0x%x", sequence->channels); @@ -224,10 +224,10 @@ static void xec_adc_get_sample(struct device *dev) { struct adc_xec_regs *adc_regs = ADC_XEC_REG_BASE; struct adc_xec_data *data = dev->driver_data; - u32_t idx; - u32_t channels = adc_regs->status_reg; - u32_t ch_status = channels; - u32_t bit; + uint32_t idx; + uint32_t channels = adc_regs->status_reg; + uint32_t ch_status = channels; + uint32_t bit; /* * Using the enabled channel bit set, from @@ -240,7 +240,7 @@ static void xec_adc_get_sample(struct device *dev) while (bit != 0) { idx = bit - 1; - *data->buffer = (u16_t)adc_regs->channel_read_reg[idx]; + *data->buffer = (uint16_t)adc_regs->channel_read_reg[idx]; data->buffer++; channels &= ~BIT(idx); @@ -255,7 +255,7 @@ static void adc_xec_isr(struct device *dev) { struct adc_xec_regs *adc_regs = ADC_XEC_REG_BASE; struct adc_xec_data *data = dev->driver_data; - u32_t reg; + uint32_t reg; /* Clear START_SINGLE bit and clear SINGLE_DONE_STATUS */ reg = adc_regs->control_reg; diff --git a/drivers/adc/adc_mcp320x.c b/drivers/adc/adc_mcp320x.c index 9369ceecad..8139687f36 100644 --- a/drivers/adc/adc_mcp320x.c +++ b/drivers/adc/adc_mcp320x.c @@ -28,19 +28,19 @@ LOG_MODULE_REGISTER(adc_mcp320x, CONFIG_ADC_LOG_LEVEL); struct mcp320x_config { const char *spi_dev_name; const char *spi_cs_dev_name; - u8_t spi_cs_pin; + uint8_t spi_cs_pin; struct spi_config spi_cfg; - u8_t channels; + uint8_t channels; }; struct mcp320x_data { struct adc_context ctx; struct device *spi_dev; struct spi_cs_control spi_cs; - u16_t *buffer; - u16_t *repeat_buffer; - u8_t channels; - u8_t differential; + uint16_t *buffer; + uint16_t *repeat_buffer; + uint8_t channels; + uint8_t differential; struct k_thread thread; struct k_sem sem; @@ -86,9 +86,9 @@ static int mcp320x_validate_buffer_size(struct device *dev, const struct adc_sequence *sequence) { const struct mcp320x_config *config = dev->config_info; - u8_t channels = 0; + uint8_t channels = 0; size_t needed; - u32_t mask; + uint32_t mask; for (mask = BIT(config->channels - 1); mask != 0; mask >>= 1) { if (mask & sequence->channels) { @@ -96,7 +96,7 @@ static int mcp320x_validate_buffer_size(struct device *dev, } } - needed = channels * sizeof(u16_t); + needed = channels * sizeof(uint16_t); if (sequence->options) { needed *= (1 + sequence->options->extra_samplings); } @@ -178,12 +178,12 @@ static void adc_context_update_buffer_pointer(struct adc_context *ctx, } } -static int mcp320x_read_channel(struct device *dev, u8_t channel, u16_t *result) +static int mcp320x_read_channel(struct device *dev, uint8_t channel, uint16_t *result) { const struct mcp320x_config *config = dev->config_info; struct mcp320x_data *data = dev->driver_data; - u8_t tx_bytes[2]; - u8_t rx_bytes[2]; + uint8_t tx_bytes[2]; + uint8_t rx_bytes[2]; int err; const struct spi_buf tx_buf[2] = { { @@ -239,8 +239,8 @@ static int mcp320x_read_channel(struct device *dev, u8_t channel, u16_t *result) static void mcp320x_acquisition_thread(struct device *dev) { struct mcp320x_data *data = dev->driver_data; - u16_t result = 0; - u8_t channel; + uint16_t result = 0; + uint8_t channel; int err; while (true) { diff --git a/drivers/adc/adc_mcux_adc12.c b/drivers/adc/adc_mcux_adc12.c index 21743c0397..a25eb5fbc8 100644 --- a/drivers/adc/adc_mcux_adc12.c +++ b/drivers/adc/adc_mcux_adc12.c @@ -31,16 +31,16 @@ struct mcux_adc12_config { struct mcux_adc12_data { struct device *dev; struct adc_context ctx; - u16_t *buffer; - u16_t *repeat_buffer; - u32_t channels; - u8_t channel_id; + uint16_t *buffer; + uint16_t *repeat_buffer; + uint32_t channels; + uint8_t channel_id; }; static int mcux_adc12_channel_setup(struct device *dev, const struct adc_channel_cfg *channel_cfg) { - u8_t channel_id = channel_cfg->channel_id; + uint8_t channel_id = channel_cfg->channel_id; if (channel_id > (ADC_SC1_ADCH_MASK >> ADC_SC1_ADCH_SHIFT)) { LOG_ERR("Invalid channel %d", channel_id); @@ -79,7 +79,7 @@ static int mcux_adc12_start_read(struct device *dev, adc12_resolution_t resolution; ADC_Type *base = config->base; int error; - u32_t tmp32; + uint32_t tmp32; switch (sequence->resolution) { case 8: @@ -156,7 +156,7 @@ static void mcux_adc12_start_channel(struct device *dev) struct mcux_adc12_data *data = dev->driver_data; adc12_channel_config_t channel_config; - u32_t channel_group = 0U; + uint32_t channel_group = 0U; data->channel_id = find_lsb_set(data->channels) - 1; @@ -194,8 +194,8 @@ static void mcux_adc12_isr(void *arg) const struct mcux_adc12_config *config = dev->config_info; struct mcux_adc12_data *data = dev->driver_data; ADC_Type *base = config->base; - u32_t channel_group = 0U; - u16_t result; + uint32_t channel_group = 0U; + uint16_t result; result = ADC12_GetChannelConversionValue(base, channel_group); LOG_DBG("Finished channel %d. Result is 0x%04x", diff --git a/drivers/adc/adc_mcux_adc16.c b/drivers/adc/adc_mcux_adc16.c index 49de71843d..4921401d47 100644 --- a/drivers/adc/adc_mcux_adc16.c +++ b/drivers/adc/adc_mcux_adc16.c @@ -25,16 +25,16 @@ struct mcux_adc16_config { struct mcux_adc16_data { struct device *dev; struct adc_context ctx; - u16_t *buffer; - u16_t *repeat_buffer; - u32_t channels; - u8_t channel_id; + uint16_t *buffer; + uint16_t *repeat_buffer; + uint32_t channels; + uint8_t channel_id; }; static int mcux_adc16_channel_setup(struct device *dev, const struct adc_channel_cfg *channel_cfg) { - u8_t channel_id = channel_cfg->channel_id; + uint8_t channel_id = channel_cfg->channel_id; if (channel_id > (ADC_SC1_ADCH_MASK >> ADC_SC1_ADCH_SHIFT)) { LOG_ERR("Channel %d is not valid", channel_id); @@ -71,7 +71,7 @@ static int start_read(struct device *dev, const struct adc_sequence *sequence) adc16_hardware_average_mode_t mode; adc16_resolution_t resolution; int error; - u32_t tmp32; + uint32_t tmp32; ADC_Type *base = config->base; switch (sequence->resolution) { @@ -166,7 +166,7 @@ static void mcux_adc16_start_channel(struct device *dev) struct mcux_adc16_data *data = dev->driver_data; adc16_channel_config_t channel_config; - u32_t channel_group = 0U; + uint32_t channel_group = 0U; data->channel_id = find_lsb_set(data->channels) - 1; @@ -208,8 +208,8 @@ static void mcux_adc16_isr(void *arg) const struct mcux_adc16_config *config = dev->config_info; struct mcux_adc16_data *data = dev->driver_data; ADC_Type *base = config->base; - u32_t channel_group = 0U; - u16_t result; + uint32_t channel_group = 0U; + uint16_t result; result = ADC16_GetChannelConversionValue(base, channel_group); LOG_DBG("Finished channel %d. Result is 0x%04x", diff --git a/drivers/adc/adc_nrfx_adc.c b/drivers/adc/adc_nrfx_adc.c index 40de7efdcf..7d40437e03 100644 --- a/drivers/adc/adc_nrfx_adc.c +++ b/drivers/adc/adc_nrfx_adc.c @@ -18,7 +18,7 @@ struct driver_data { struct adc_context ctx; nrf_adc_value_t *buffer; - u8_t active_channels; + uint8_t active_channels; }; static struct driver_data m_data = { @@ -34,7 +34,7 @@ static nrfx_adc_channel_t m_channels[CONFIG_ADC_NRFX_ADC_CHANNEL_COUNT]; static int adc_nrfx_channel_setup(struct device *dev, const struct adc_channel_cfg *channel_cfg) { - u8_t channel_id = channel_cfg->channel_id; + uint8_t channel_id = channel_cfg->channel_id; nrf_adc_config_t *config = &m_channels[channel_id].config; if (channel_id >= CONFIG_ADC_NRFX_ADC_CHANNEL_COUNT) { @@ -118,7 +118,7 @@ static void adc_context_update_buffer_pointer(struct adc_context *ctx, } static int check_buffer_size(const struct adc_sequence *sequence, - u8_t active_channels) + uint8_t active_channels) { size_t needed_buffer_size; @@ -139,9 +139,9 @@ static int check_buffer_size(const struct adc_sequence *sequence, static int start_read(struct device *dev, const struct adc_sequence *sequence) { int error; - u32_t selected_channels = sequence->channels; - u8_t active_channels; - u8_t channel_id; + uint32_t selected_channels = sequence->channels; + uint8_t active_channels; + uint8_t channel_id; nrf_adc_config_resolution_t nrf_resolution; /* Signal an error if channel selection is invalid (no channels or diff --git a/drivers/adc/adc_nrfx_saadc.c b/drivers/adc/adc_nrfx_saadc.c index f67d52943e..77b98f4533 100644 --- a/drivers/adc/adc_nrfx_saadc.c +++ b/drivers/adc/adc_nrfx_saadc.c @@ -17,7 +17,7 @@ LOG_MODULE_REGISTER(adc_nrfx_saadc); struct driver_data { struct adc_context ctx; - u8_t positive_inputs[SAADC_CH_NUM]; + uint8_t positive_inputs[SAADC_CH_NUM]; }; static struct driver_data m_data = { @@ -36,7 +36,7 @@ static int adc_nrfx_channel_setup(struct device *dev, .resistor_n = NRF_SAADC_RESISTOR_DISABLED, .burst = NRF_SAADC_BURST_DISABLED, }; - u8_t channel_id = channel_cfg->channel_id; + uint8_t channel_id = channel_cfg->channel_id; if (channel_id >= SAADC_CH_NUM) { return -EINVAL; @@ -186,7 +186,7 @@ static int set_resolution(const struct adc_sequence *sequence) } static int set_oversampling(const struct adc_sequence *sequence, - u8_t active_channels) + uint8_t active_channels) { nrf_saadc_oversample_t nrf_oversampling; @@ -235,7 +235,7 @@ static int set_oversampling(const struct adc_sequence *sequence, } static int check_buffer_size(const struct adc_sequence *sequence, - u8_t active_channels) + uint8_t active_channels) { size_t needed_buffer_size; @@ -256,9 +256,9 @@ static int check_buffer_size(const struct adc_sequence *sequence, static int start_read(struct device *dev, const struct adc_sequence *sequence) { int error; - u32_t selected_channels = sequence->channels; - u8_t active_channels; - u8_t channel_id; + uint32_t selected_channels = sequence->channels; + uint8_t active_channels; + uint8_t channel_id; /* Signal an error if channel selection is invalid (no channels or * a non-existing one is selected). diff --git a/drivers/adc/adc_sam0.c b/drivers/adc/adc_sam0.c index 1bd9227334..50b40e8129 100644 --- a/drivers/adc/adc_sam0.c +++ b/drivers/adc/adc_sam0.c @@ -28,16 +28,16 @@ struct adc_sam0_data { struct adc_context ctx; struct device *dev; - u16_t *buffer; + uint16_t *buffer; /* * Saved initial start, so we can reset the advances we've done * if required */ - u16_t *repeat_buffer; + uint16_t *repeat_buffer; #ifdef ADC_SAM0_REFERENCE_GLITCH - u8_t reference_changed; + uint8_t reference_changed; #endif }; @@ -45,15 +45,15 @@ struct adc_sam0_cfg { Adc *regs; #ifdef MCLK - u32_t mclk_mask; - u32_t gclk_mask; - u16_t gclk_id; + uint32_t mclk_mask; + uint32_t gclk_mask; + uint16_t gclk_id; #else - u32_t gclk; + uint32_t gclk; #endif - u32_t freq; - u16_t prescaler; + uint32_t freq; + uint16_t prescaler; void (*config_func)(struct device *dev); }; @@ -75,10 +75,10 @@ static void wait_synchronization(Adc *const adc) } static int adc_sam0_acquisition_to_clocks(struct device *dev, - u16_t acquisition_time) + uint16_t acquisition_time) { const struct adc_sam0_cfg *const cfg = DEV_CFG(dev); - u64_t scaled_acq; + uint64_t scaled_acq; switch (ADC_ACQ_TIME_UNIT(acquisition_time)) { case ADC_ACQ_TIME_TICKS: @@ -88,11 +88,11 @@ static int adc_sam0_acquisition_to_clocks(struct device *dev, return (int)ADC_ACQ_TIME_VALUE(acquisition_time) - 1; case ADC_ACQ_TIME_MICROSECONDS: - scaled_acq = (u64_t)ADC_ACQ_TIME_VALUE(acquisition_time) * + scaled_acq = (uint64_t)ADC_ACQ_TIME_VALUE(acquisition_time) * 1000000U; break; case ADC_ACQ_TIME_NANOSECONDS: - scaled_acq = (u64_t)ADC_ACQ_TIME_VALUE(acquisition_time) * + scaled_acq = (uint64_t)ADC_ACQ_TIME_VALUE(acquisition_time) * 1000U; break; default: @@ -125,7 +125,7 @@ static int adc_sam0_channel_setup(struct device *dev, const struct adc_sam0_cfg *const cfg = DEV_CFG(dev); Adc *const adc = cfg->regs; int retval; - u8_t SAMPCTRL = 0; + uint8_t SAMPCTRL = 0; if (channel_cfg->acquisition_time != ADC_ACQ_TIME_DEFAULT) { retval = adc_sam0_acquisition_to_clocks(dev, @@ -142,7 +142,7 @@ static int adc_sam0_channel_setup(struct device *dev, wait_synchronization(adc); - u8_t REFCTRL; + uint8_t REFCTRL; switch (channel_cfg->reference) { case ADC_REF_INTERNAL: @@ -189,7 +189,7 @@ static int adc_sam0_channel_setup(struct device *dev, } - u32_t INPUTCTRL = 0; + uint32_t INPUTCTRL = 0; switch (channel_cfg->gain) { case ADC_GAIN_1: @@ -316,11 +316,11 @@ static void adc_context_update_buffer_pointer(struct adc_context *ctx, } static int check_buffer_size(const struct adc_sequence *sequence, - u8_t active_channels) + uint8_t active_channels) { size_t needed_buffer_size; - needed_buffer_size = active_channels * sizeof(u16_t); + needed_buffer_size = active_channels * sizeof(uint16_t); if (sequence->options) { needed_buffer_size *= (1U + sequence->options->extra_samplings); } @@ -434,11 +434,11 @@ static void adc_sam0_isr(void *arg) struct adc_sam0_data *data = DEV_DATA(dev); const struct adc_sam0_cfg *const cfg = DEV_CFG(dev); Adc *const adc = cfg->regs; - u16_t result; + uint16_t result; adc->INTFLAG.reg = ADC_INTFLAG_MASK; - result = (u16_t)(adc->RESULT.reg); + result = (uint16_t)(adc->RESULT.reg); #ifdef ADC_SAM0_REFERENCE_GLITCH if (data->reference_changed) { @@ -535,25 +535,25 @@ static const struct adc_driver_api adc_sam0_api = { #define ADC_SAM0_BIASCOMP_SHIFT(n) \ (ADC0_FUSES_BIASCOMP_Pos + DT_INST_PROP(n, calib_offset)) #define ADC_SAM0_BIASCOMP(n) \ - (((*(u32_t *)NVMCTRL_SW0) >> ADC_SAM0_BIASCOMP_SHIFT(n)) & 0x7) + (((*(uint32_t *)NVMCTRL_SW0) >> ADC_SAM0_BIASCOMP_SHIFT(n)) & 0x7) #define ADC_SAM0_BIASR2R_SHIFT(n) \ (ADC0_FUSES_BIASR2R_Pos + DT_INST_PROP(n, calib_offset)) #define ADC_SAM0_BIASR2R(n) \ - (((*(u32_t *)NVMCTRL_SW0) >> ADC_SAM0_BIASR2R_SHIFT(n)) & 0x7) + (((*(uint32_t *)NVMCTRL_SW0) >> ADC_SAM0_BIASR2R_SHIFT(n)) & 0x7) #define ADC_SAM0_BIASREFBUF_SHIFT(n) \ (ADC0_FUSES_BIASREFBUF_Pos + DT_INST_PROP(n, calib_offset)) #define ADC_SAM0_BIASREFBUF(n) \ - (((*(u32_t *)NVMCTRL_SW0) >> ADC_SAM0_BIASREFBUF_SHIFT(n)) & 0x7) + (((*(uint32_t *)NVMCTRL_SW0) >> ADC_SAM0_BIASREFBUF_SHIFT(n)) & 0x7) #define ADC_SAM0_CONFIGURE(n) \ do { \ const struct adc_sam0_cfg *const cfg = DEV_CFG(dev); \ Adc * const adc = cfg->regs; \ - u32_t comp = ADC_SAM0_BIASCOMP(n); \ - u32_t r2r = ADC_SAM0_BIASR2R(n); \ - u32_t rbuf = ADC_SAM0_BIASREFBUF(n); \ + uint32_t comp = ADC_SAM0_BIASCOMP(n); \ + uint32_t r2r = ADC_SAM0_BIASR2R(n); \ + uint32_t rbuf = ADC_SAM0_BIASREFBUF(n); \ adc->CALIB.reg = ADC_CALIB_BIASCOMP(comp) | \ ADC_CALIB_BIASR2R(r2r) | \ ADC_CALIB_BIASREFBUF(rbuf); \ @@ -572,13 +572,13 @@ do { \ const struct adc_sam0_cfg *const cfg = DEV_CFG(dev); \ Adc * const adc = cfg->regs; \ /* Linearity is split across two words */ \ - u32_t lin = ((*(u32_t *)ADC_FUSES_LINEARITY_0_ADDR) & \ + uint32_t lin = ((*(uint32_t *)ADC_FUSES_LINEARITY_0_ADDR) & \ ADC_FUSES_LINEARITY_0_Msk) >> \ ADC_FUSES_LINEARITY_0_Pos; \ - lin |= (((*(u32_t *)ADC_FUSES_LINEARITY_1_ADDR) & \ + lin |= (((*(uint32_t *)ADC_FUSES_LINEARITY_1_ADDR) & \ ADC_FUSES_LINEARITY_1_Msk) >> \ ADC_FUSES_LINEARITY_1_Pos) << 4; \ - u32_t bias = ((*(u32_t *)ADC_FUSES_BIASCAL_ADDR) & \ + uint32_t bias = ((*(uint32_t *)ADC_FUSES_BIASCAL_ADDR) & \ ADC_FUSES_BIASCAL_Msk) >> ADC_FUSES_BIASCAL_Pos; \ adc->CALIB.reg = ADC_CALIB_BIAS_CAL(bias) | \ ADC_CALIB_LINEARITY_CAL(lin); \ diff --git a/drivers/adc/adc_sam_afec.c b/drivers/adc/adc_sam_afec.c index e3c11336e7..34ff6f925d 100644 --- a/drivers/adc/adc_sam_afec.c +++ b/drivers/adc/adc_sam_afec.c @@ -40,25 +40,25 @@ struct adc_sam_data { struct device *dev; /* Pointer to the buffer in the sequence. */ - u16_t *buffer; + uint16_t *buffer; /* Pointer to the beginning of a sample. Consider the number of * channels in the sequence: this buffer changes by that amount * so all the channels would get repeated. */ - u16_t *repeat_buffer; + uint16_t *repeat_buffer; /* Bit mask of the channels to be sampled. */ - u32_t channels; + uint32_t channels; /* Index of the channel being sampled. */ - u8_t channel_id; + uint8_t channel_id; }; struct adc_sam_cfg { Afec *regs; cfg_func_t cfg_func; - u32_t periph_id; + uint32_t periph_id; struct soc_gpio_pin afec_trg_pin; }; @@ -74,7 +74,7 @@ static int adc_sam_channel_setup(struct device *dev, const struct adc_sam_cfg * const cfg = DEV_CFG(dev); Afec *const afec = cfg->regs; - u8_t channel_id = channel_cfg->channel_id; + uint8_t channel_id = channel_cfg->channel_id; /* Clear the gain bits for the channel. */ afec->AFEC_CGR &= ~(3 << channel_id * 2U); @@ -168,10 +168,10 @@ static void adc_context_update_buffer_pointer(struct adc_context *ctx, } static int check_buffer_size(const struct adc_sequence *sequence, - u8_t active_channels) + uint8_t active_channels) { size_t needed_buffer_size; - needed_buffer_size = active_channels * sizeof(u16_t); + needed_buffer_size = active_channels * sizeof(uint16_t); if (sequence->options) { needed_buffer_size *= (1 + sequence->options->extra_samplings); } @@ -187,7 +187,7 @@ static int start_read(struct device *dev, const struct adc_sequence *sequence) { struct adc_sam_data *data = DEV_DATA(dev); int error = 0; - u32_t channels = sequence->channels; + uint32_t channels = sequence->channels; data->channels = 0U; @@ -214,8 +214,8 @@ static int start_read(struct device *dev, const struct adc_sequence *sequence) return -EINVAL; } - u8_t num_active_channels = 0U; - u8_t channel = 0U; + uint8_t num_active_channels = 0U; + uint8_t channel = 0U; while (channels > 0) { if (channels & 1) { @@ -330,13 +330,13 @@ static void adc_sam_isr(void *arg) struct adc_sam_data *data = DEV_DATA(dev); const struct adc_sam_cfg *const cfg = DEV_CFG(dev); Afec *const afec = cfg->regs; - u16_t result; + uint16_t result; afec->AFEC_CHDR |= BIT(data->channel_id); afec->AFEC_IDR |= BIT(data->channel_id); afec->AFEC_CSELR = AFEC_CSELR_CSEL(data->channel_id); - result = (u16_t)(afec->AFEC_CDR); + result = (uint16_t)(afec->AFEC_CDR); *data->buffer++ = result; data->channels &= ~BIT(data->channel_id); diff --git a/drivers/adc/adc_shell.c b/drivers/adc/adc_shell.c index b404011cd8..19d63e895b 100644 --- a/drivers/adc/adc_shell.c +++ b/drivers/adc/adc_shell.c @@ -37,7 +37,7 @@ LOG_MODULE_REGISTER(adc_shell); struct adc_hdl { char *device_name; struct adc_channel_cfg channel_config; - u8_t resolution; + uint8_t resolution; }; #define ADC_HDL_LIST_ENTRY(inst) \ @@ -69,19 +69,19 @@ struct adc_hdl adc_list[] = { }; struct args_index { - s8_t adc; - s8_t parent_adc; - u8_t channel; - u8_t conf; - u8_t acq_unit; + int8_t adc; + int8_t parent_adc; + uint8_t channel; + uint8_t conf; + uint8_t acq_unit; }; struct args_number { - u8_t help; - u8_t channel; - u8_t acq_time; - u8_t resolution; - u8_t read; + uint8_t help; + uint8_t channel; + uint8_t acq_time; + uint8_t resolution; + uint8_t read; }; static const struct args_index args_indx = { @@ -143,7 +143,7 @@ static int cmd_adc_channel(const struct shell *shell, size_t argc, char **argv) return -EINVAL; } adc_list[chosen_adc].channel_config.channel_id = - (u8_t)strtol(argv[args_indx.conf], NULL, 10); + (uint8_t)strtol(argv[args_indx.conf], NULL, 10); retval = adc_channel_setup(adc_dev, &adc_list[chosen_adc].channel_config); LOG_DBG("Channel setup returned %i\n", retval); @@ -209,7 +209,7 @@ static int cmd_adc_acq(const struct shell *shell, size_t argc, char **argv) int retval = 0; struct device *adc_dev; int chosen_adc; - u16_t acq_time; + uint16_t acq_time; if (argc != args_no.acq_time) { shell_fprintf(shell, SHELL_NORMAL, @@ -233,7 +233,7 @@ static int cmd_adc_acq(const struct shell *shell, size_t argc, char **argv) shell_error(shell, "