patrick/zephyr
1
0
Fork 0
Code Issues Pull requests Actions 7 Packages Projects Releases Wiki Activity

soc: arm64: qemu: bump highest IRQ when ITS is enabled

Browse source 
The purpose of the GIC ITS is to translate message-passing interrupts into
LPIs. The LPI range starts at value 8192, which means the current default
value (200) is too low. Therefore, bump the highest IRQ number when ITS
is enabled.

Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
This commit is contained in:
Rodrigo Cataldo 2023-03-06 16:01:16 +01:00 committed by Carles Cufí
parent df98af0c23
commit a25996a661
2 changed files with 6 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
soc/arm64/qemu_cortex_a53/Kconfig.defconfig
View file

@ -9,7 +9,9 @@ config SOC
config NUM_IRQS
# must be >= the highest interrupt number used
# - include the UART interrupts
default 220
# - LPIs (starting at 8192) if GIC_V3_ITS is used
default 16384 if GIC_V3_ITS
default 220 if !GIC_V3_ITS
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 62500000

4
soc/arm64/qemu_virt_arm64/Kconfig.defconfig
View file

@ -9,7 +9,9 @@ config SOC
config NUM_IRQS
# must be >= the highest interrupt number used
# - include the UART interrupts
default 220
# - LPIs (starting at 8192) if GIC_V3_ITS is used
default 16384 if GIC_V3_ITS
default 220 if !GIC_V3_ITS
# Dummy value, read at runtime
config SYS_CLOCK_HW_CYCLES_PER_SEC