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treewide: rename Microsemi to Microchip

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Do a treewide Microsemi to Microchip rename and update obsolete links in
the board docs.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commit is contained in:
Filip Kokosinski 2023-04-28 14:37:21 +02:00 committed by Carles Cufí
parent bf51945b22
commit a30862455e
13 changed files with 20 additions and 22 deletions
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2
CODEOWNERS
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@ -519,7 +519,7 @@
/dts/arm/silabs/efr32fg13* @yonsch
/dts/riscv/ @kgugala @pgielda
/dts/riscv/ite/ @ite
/dts/riscv/microsemi/microsemi-miv.dtsi @galak
/dts/riscv/microchip/microchip-miv.dtsi @galak
/dts/riscv/openisa/rv32m1* @dleach02
/dts/riscv/riscv32-litex-vexriscv.dtsi @mateusz-holenko @kgugala @pgielda
/dts/riscv/starfive/ @rajnesh-kanwal

2
boards/riscv/m2gl025_miv/Kconfig.board
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@ -1,5 +1,5 @@
# SPDX-License-Identifier: Apache-2.0
config BOARD_M2GL025_MIV
bool "Microsemi M2GL025 IGLOO2 dev board with Mi-V CPU"
bool "Microchip M2GL025 IGLOO2 dev board with Mi-V CPU"
depends on SOC_RISCV32_MIV

10
boards/riscv/m2gl025_miv/doc/index.rst
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@ -1,15 +1,15 @@
.. _m2gl025-miv:
Microsemi M2GL025 Mi-V
Microchip M2GL025 Mi-V
######################
Overview
********
The Microsemi M2GL025 board is an IGLOO2 FPGA based development board.
The Microchip M2GL025 board is an IGLOO2 FPGA based development board.
The Mi-V RISC-V soft CPU can be deployed on the MGL025 board.
More information can be found on
`Microsemi's website <https://www.microsemi.com/product-directory/embedded-processing/4406-cpus>`_.
`Microchip's website <https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/mi-v>`_.
Programming and debugging
*************************
@ -31,8 +31,8 @@ In order to upload the application to the device, you'll need OpenOCD and GDB
with RISC-V support.
You can get them as a part of SoftConsole SDK.
Download and installation instructions can be found on
`Microsemi's SoftConsole website
<https://www.microsemi.com/product-directory/design-tools/4879-softconsole>`_.
`Microchip's SoftConsole website
<https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/soc-fpga/softconsole>`_.
With the necessary tools installed, you can connect to the board using OpenOCD.
To establish an OpenOCD connection run:

2
boards/riscv/m2gl025_miv/m2gl025_miv.dts
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@ -6,7 +6,7 @@
/dts-v1/;
#include <microsemi/microsemi-miv.dtsi>
#include <microchip/microchip-miv.dtsi>
/ {
model = "SiFive HiFive 1";

2
boards/riscv/m2gl025_miv/m2gl025_miv.yaml
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@ -1,5 +1,5 @@
identifier: m2gl025_miv
name: Microsemi M2GL025 with MiV target
name: Microchip M2GL025 with MiV target
type: mcu
arch: riscv32
toolchain:

2
boards/riscv/mpfs_icicle/Kconfig.board
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@ -2,7 +2,7 @@
# SPDX-License-Identifier: Apache-2.0
config BOARD_MPFS_ICICLE
bool "Microsemi PolarFire SoC ICICLE kit"
bool "Microchip PolarFire SoC ICICLE kit"
depends on SOC_MPFS
select 64BIT
select SCHED_IPI_SUPPORTED

2
drivers/serial/Kconfig.miv
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@ -6,7 +6,7 @@
config UART_MIV
bool "Mi-V serial driver"
default y
depends on DT_HAS_MICROSEMI_COREUART_ENABLED
depends on DT_HAS_MICROCHIP_COREUART_ENABLED
select SERIAL_HAS_DRIVER
select SERIAL_SUPPORT_INTERRUPT
help

2
drivers/serial/uart_miv.c
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@ -4,7 +4,7 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT microsemi_coreuart
#define DT_DRV_COMPAT microchip_coreuart
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>

2
dts/bindings/serial/microsemi,coreuart.yaml → dts/bindings/serial/microchip,coreuart.yaml
View file

@ -3,7 +3,7 @@
description: SiFive UART
compatible: "microsemi,coreuart"
compatible: "microchip,coreuart"
include: uart-controller.yaml

2
dts/bindings/vendor-prefixes.txt
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@ -375,7 +375,6 @@ microbit Micro:bit Educational Foundation
microchip Microchip Technology Inc.
microcrystal Micro Crystal AG
micron Micron Technology Inc.
microsemi Microchip Technology Inc. (formerly Microsemi Corporation)
microsoft Microsoft Corporation
microsys MicroSys Electronics GmbH
mikroe MikroElektronika d.o.o.
@ -392,7 +391,6 @@ mpl MPL AG
mps Monolithic Power Systems Inc.
mqmaker mqmaker Inc.
mrvl Marvell Technology Group Ltd.
mscc Microsemi Corporation
msi Micro-Star International Co. Ltd.
mstar MStar Semiconductor, Inc. (acquired by MediaTek Inc.)
mti Imagination Technologies Ltd. (formerly MIPS Technologies Inc.)

6
dts/riscv/microsemi/microsemi-miv.dtsi → dts/riscv/microchip/microchip-miv.dtsi
View file

@ -13,7 +13,7 @@
#size-cells = <0>;
cpu@0 {
clock-frequency = <0>;
compatible = "microsemi,miv", "riscv";
compatible = "microchip,miv", "riscv";
device_type = "cpu";
reg = <0>;
riscv,isa = "rv32imac";
@ -29,7 +29,7 @@
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "microsemi,miv-soc", "simple-bus";
compatible = "microchip,miv-soc", "simple-bus";
ranges;
flash0: flash@80000000 {
@ -63,7 +63,7 @@
};
uart0: uart@70001000 {
compatible = "microsemi,coreuart";
compatible = "microchip,coreuart";
reg = <0x70001000 0x1000>;
status = "disabled";
current-speed = <0>;

4
soc/riscv/riscv-privilege/miv/Kconfig.series
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@ -4,8 +4,8 @@
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_RISCV32_MIV
bool "Microsemi Mi-V implementation"
bool "Microchip Mi-V implementation"
select RISCV
select SOC_FAMILY_RISCV_PRIVILEGE
help
Enable support for Microsemi Mi-V
Enable support for Microchip Mi-V

4
soc/riscv/riscv-privilege/miv/Kconfig.soc
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@ -4,11 +4,11 @@
# SPDX-License-Identifier: Apache-2.0
choice
prompt "Microsemi Mi-V system implementation"
prompt "Microchip Mi-V system implementation"
depends on SOC_SERIES_RISCV32_MIV
config SOC_RISCV32_MIV
bool "Microsemi Mi-V system implementation"
bool "Microchip Mi-V system implementation"
select ATOMIC_OPERATIONS_C
select INCLUDE_RESET_VECTOR
select RISCV_ISA_RV32I