boards: fvp_baser_aemv8r: fix UART enablement

Fix the interrupt setting in the fvp_baser_aemv8r dts:
- The correct interrupt number is 5, not 0.
- The interrupt priority and type are swapped.

This patch also enables interrupt driven mode for this platform as this
is the ideal setting for a Fast Models based platform.

Issue-ID: SCM-4037
Signed-off-by: Filipe Rinaldi <filipe.rinaldi@arm.com>
Change-Id: Ic4815f5afe4c9df9d8fe373d47d2773d64087c96

boards/arm64/fvp_baser_aemv8r/fvp_baser_aemv8r_defconfig

@@ -21,6 +21,7 @@ CONFIG_SERIAL=y
 # Enable serial port
 CONFIG_UART_PL011=y
 CONFIG_UART_PL011_PORT0=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
 
 # Enable console
 CONFIG_CONSOLE=y

dts/arm64/fvp-aemv8r/fvp-aemv8r.dtsi

@@ -74,8 +74,8 @@
 			compatible = "arm,pl011";
 			reg = <0x9c090000 0x1000>;
 			status = "disabled";
-			interrupts = <GIC_SPI 1 0 IRQ_TYPE_LEVEL>;
-			interrupt-names = "irq_0";
+			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
+			interrupt-names = "irq_5";
 			label = "UART_0";
 			clocks = <&uartclk>;
 		};