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arch: riscv: smp: define MSIP_BASE

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Instead of relying on definitions included indirectly.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
Gerard Marull-Paretas 2024-01-16 14:54:01 +01:00 committed by Fabio Baltieri
parent 7af4f7eb8a
commit a5ded8aa9f
3 changed files with 2 additions and 5 deletions
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3
arch/riscv/core/smp.c
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@ -79,7 +79,8 @@ void arch_secondary_cpu_init(int hartid)
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
#define MSIP(hartid) ((volatile uint32_t *)RISCV_MSIP_BASE)[hartid] #define MSIP_BASE 0x2000000UL
#define MSIP(hartid) ((volatile uint32_t *)MSIP_BASE)[hartid]
static atomic_val_t cpu_pending_ipi[CONFIG_MP_MAX_NUM_CPUS]; static atomic_val_t cpu_pending_ipi[CONFIG_MP_MAX_NUM_CPUS];
#define IPI_SCHED 0 #define IPI_SCHED 0

3
soc/riscv/microchip_miv/polarfire/soc.h
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@ -8,7 +8,4 @@
#include <zephyr/devicetree.h> #include <zephyr/devicetree.h>
#define RISCV_MSIP_BASE 0x02000000
#endif /* __RISCV64_MPFS_SOC_H_ */ #endif /* __RISCV64_MPFS_SOC_H_ */

1
soc/riscv/virt/soc.h
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@ -8,6 +8,5 @@
#define __RISCV_VIRT_SOC_H_ #define __RISCV_VIRT_SOC_H_
#define SIFIVE_SYSCON_TEST 0x00100000 #define SIFIVE_SYSCON_TEST 0x00100000
#define RISCV_MSIP_BASE 0x02000000
#endif #endif