arch: riscv: smp: define MSIP_BASE

Instead of relying on definitions included indirectly. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-01-16 14:54:01 +01:00 · 2024-01-16 14:54:01 +01:00 · a5ded8aa9f
parent 7af4f7eb8a
commit a5ded8aa9f
3 changed files with 2 additions and 5 deletions
--- a/arch/riscv/core/smp.c
+++ b/arch/riscv/core/smp.c
@ -79,7 +79,8 @@ void arch_secondary_cpu_init(int hartid)

 #ifdef CONFIG_SMP

-#define MSIP(hartid) ((volatile uint32_t *)RISCV_MSIP_BASE)[hartid]
+#define MSIP_BASE 0x2000000UL
+#define MSIP(hartid) ((volatile uint32_t *)MSIP_BASE)[hartid]

 static atomic_val_t cpu_pending_ipi[CONFIG_MP_MAX_NUM_CPUS];
 #define IPI_SCHED	0
--- a/soc/riscv/microchip_miv/polarfire/soc.h
+++ b/soc/riscv/microchip_miv/polarfire/soc.h
@ -8,7 +8,4 @@

 #include <zephyr/devicetree.h>

-
-#define RISCV_MSIP_BASE					0x02000000
-
 #endif /* __RISCV64_MPFS_SOC_H_ */
--- a/soc/riscv/virt/soc.h
+++ b/soc/riscv/virt/soc.h
@ -8,6 +8,5 @@
 #define __RISCV_VIRT_SOC_H_

 #define SIFIVE_SYSCON_TEST           0x00100000
-#define RISCV_MSIP_BASE              0x02000000

 #endif