dma: add EDMA test support for MCUX
for RT series CONFIG_NOCACHE_MEMORY need enabled for Kinetis series CONFIG_DMA_TEST_SLOT_START for test modify the target and dest alignment frdmk64f need replace strlen to sizeof in irq callback clean the unused receive buffer, so output is tidy Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
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@ -26,8 +26,16 @@
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#define DMA_DEVICE_NAME CONFIG_DMA_0_NAME
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#define RX_BUFF_SIZE (48)
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static const char tx_data[] = "It is harder to be kind than to be wise";
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#ifdef CONFIG_NOCACHE_MEMORY
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static __aligned(32) char tx_data[RX_BUFF_SIZE] __used
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__attribute__((__section__(".nocache")));
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static const char TX_DATA[] = "It is harder to be kind than to be wise........";
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static __aligned(32) char rx_data[RX_BUFF_SIZE] __used
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__attribute__((__section__(".nocache.dma")));
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#else
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static const char tx_data[] = "It is harder to be kind than to be wise........";
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static char rx_data[RX_BUFF_SIZE] = { 0 };
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#endif
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static void test_done(void *arg, uint32_t id, int error_code)
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{
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@ -40,8 +48,8 @@ static void test_done(void *arg, uint32_t id, int error_code)
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static int test_task(uint32_t chan_id, uint32_t blen)
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{
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struct dma_config dma_cfg = {0};
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struct dma_block_config dma_block_cfg = {0};
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struct dma_config dma_cfg = { 0 };
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struct dma_block_config dma_block_cfg = { 0 };
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struct device *dma = device_get_binding(DMA_DEVICE_NAME);
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if (!dma) {
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@ -49,6 +57,10 @@ static int test_task(uint32_t chan_id, uint32_t blen)
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return TC_FAIL;
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}
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#ifdef CONFIG_NOCACHE_MEMORY
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memcpy(tx_data, TX_DATA, sizeof(TX_DATA));
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#endif
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dma_cfg.channel_direction = MEMORY_TO_MEMORY;
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dma_cfg.source_data_size = 1U;
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dma_cfg.dest_data_size = 1U;
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@ -59,9 +71,12 @@ static int test_task(uint32_t chan_id, uint32_t blen)
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dma_cfg.error_callback_en = 1U;
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dma_cfg.block_count = 1U;
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dma_cfg.head_block = &dma_block_cfg;
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#ifdef CONFIG_DMA_MCUX_TEST_SLOT_START
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dma_cfg.dma_slot = CONFIG_DMA_MCUX_TEST_SLOT_START;
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#endif
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TC_PRINT("Preparing DMA Controller: Chan_ID=%u, BURST_LEN=%u\n",
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chan_id, blen >> 3);
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chan_id, blen >> 3);
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TC_PRINT("Starting the transfer\n");
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(void)memset(rx_data, 0, sizeof(rx_data));
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@ -14,13 +14,23 @@
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#include <string.h>
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/* in millisecond */
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#define SLEEPTIME 1000
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#define SLEEPTIME 1000
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#define TRANSFER_LOOPS (5)
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#define RX_BUFF_SIZE (50)
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#define RX_BUFF_SIZE (64)
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static const char tx_data[] = "The quick brown fox jumps over the lazy dog";
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static char rx_data[TRANSFER_LOOPS][RX_BUFF_SIZE] = {{ 0 } };
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#if CONFIG_NOCACHE_MEMORY
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static const char TX_DATA[] = "The quick brown fox jumps over the lazy dog";
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static __aligned(16) char tx_data[64] __used
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__attribute__((__section__(".nocache")));
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static __aligned(16) char rx_data[TRANSFER_LOOPS][RX_BUFF_SIZE] __used
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__attribute__((__section__(".nocache.dma")));
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#else
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/* pad to times of 8*/
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static const char tx_data[] =
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"The quick brown fox jumps over the lazy dog ....";
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static __aligned(16) char rx_data[TRANSFER_LOOPS][RX_BUFF_SIZE] = { { 0 } };
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#endif
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#define DMA_DEVICE_NAME "DMA_0"
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@ -31,7 +41,6 @@ static struct dma_block_config dma_block_cfg = {0};
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static void test_transfer(struct device *dev, uint32_t id)
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{
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int ret;
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transfer_count++;
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if (transfer_count < TRANSFER_LOOPS) {
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dma_block_cfg.block_size = strlen(tx_data);
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@ -67,9 +76,16 @@ void main(void)
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static uint32_t chan_id;
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printk("DMA memory to memory transfer started on %s\n",
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DMA_DEVICE_NAME);
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DMA_DEVICE_NAME);
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printk("Preparing DMA Controller\n");
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#if CONFIG_NOCACHE_MEMORY
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memset(tx_data, 0, sizeof(tx_data));
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memcpy(tx_data, TX_DATA, sizeof(TX_DATA));
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#endif
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memset(rx_data, 0, sizeof(rx_data));
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dma = device_get_binding(DMA_DEVICE_NAME);
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if (!dma) {
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printk("Cannot get dma controller\n");
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@ -85,10 +101,15 @@ void main(void)
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dma_cfg.dma_callback = dma_user_callback;
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dma_cfg.block_count = 1U;
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dma_cfg.head_block = &dma_block_cfg;
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#ifdef CONFIG_DMA_MCUX_TEST_SLOT_START
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dma_cfg.dma_slot = CONFIG_DMA_MCUX_TEST_SLOT_START;
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#endif
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chan_id = 0U;
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transfer_count = 0;
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printk("Starting the transfer and waiting for 1 second\n");
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printk("TX data: %s\n", tx_data);
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printk("block_size %d\n", strlen(tx_data));
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dma_block_cfg.block_size = strlen(tx_data);
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dma_block_cfg.source_address = (uint32_t)tx_data;
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dma_block_cfg.dest_address = (uint32_t)rx_data[transfer_count];
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