From ad25668313221f81a0f26d4140dc62964934d24c Mon Sep 17 00:00:00 2001 From: Johann Fischer Date: Thu, 14 Sep 2023 23:28:32 +0200 Subject: [PATCH] samples: usb shell: add DT overlay to support snps,dwc2 on nucleo_f413zh Add DT overlay to be able to support and test UDC DWC2 driver (snps,dwc2) on nucleo_f413zh board. This disables STM32 shim driver described and configured on the SoC and board level. Obviously,it should work with other STM32F4 boards as well and we could have a mechanism to apply it generically using snippets. Signed-off-by: Johann Fischer --- .../usb/shell/nucleo_f413zh_dwc2.overlay | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 samples/subsys/usb/shell/nucleo_f413zh_dwc2.overlay diff --git a/samples/subsys/usb/shell/nucleo_f413zh_dwc2.overlay b/samples/subsys/usb/shell/nucleo_f413zh_dwc2.overlay new file mode 100644 index 0000000000..ff51b08078 --- /dev/null +++ b/samples/subsys/usb/shell/nucleo_f413zh_dwc2.overlay @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2023 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/delete-node/ &zephyr_udc0; + +/ { + soc { + dwc2_fsotg0: usb@50000000 { + compatible = "st,stm32f4-fsotg", "snps,dwc2"; + reg = <0x50000000 0x40000>; + interrupts = <67 0>; + interrupt-names = "fsotg"; + clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000080>, + <&rcc STM32_SRC_PLL_Q NO_SEL>; + }; + }; +}; + +zephyr_udc0: &dwc2_fsotg0 { + pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>; + pinctrl-names = "default"; + status = "okay"; +};