patrick/zephyr
1
0
Fork 0
Code Issues Pull requests Actions 8 Packages Projects Releases Wiki Activity

dts: Rename RW pinctrl to MCI IO MUX

Browse source 
"RW pinctrl" is clearly SOC specific naming for an IP
that is not necessarily constrained to live on one SOC series.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2024-03-19 15:53:03 -05:00 committed by Alberto Escolar
parent c420733c33
commit ad393fbbfa
7 changed files with 17 additions and 17 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
drivers/pinctrl/CMakeLists.txt
View file

@ -34,7 +34,7 @@ zephyr_library_sources_ifdef(CONFIG_PINCTRL_EMSDP pinctrl_emsdp.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_TI_CC32XX pinctrl_ti_cc32xx.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_NUMAKER pinctrl_numaker.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_QUICKLOGIC_EOS_S3 pinctrl_eos_s3.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_RW pinctrl_rw_iomux.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_MCI_IO_MUX pinctrl_mci_io_mux.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_ENE_KB1200 pinctrl_ene_kb1200.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_IMX_SCU pinctrl_imx_scu.c)

2
drivers/pinctrl/Kconfig
View file

@ -62,7 +62,7 @@ source "drivers/pinctrl/Kconfig.emsdp"
source "drivers/pinctrl/Kconfig.ti_cc32xx"
source "drivers/pinctrl/Kconfig.numaker"
source "drivers/pinctrl/Kconfig.eos_s3"
source "drivers/pinctrl/Kconfig.rw"
source "drivers/pinctrl/Kconfig.mci_io_mux"
source "drivers/pinctrl/Kconfig.ene"
source "drivers/pinctrl/Kconfig.zynqmp"

9
drivers/pinctrl/Kconfig.mci_io_mux Normal file
View file

@ -0,0 +1,9 @@
# Copyright 2022 NXP
# SPDX-License-Identifier: Apache-2.0
config PINCTRL_MCI_IO_MUX
bool "NXP MCI IO MUX Pinctrl Driver"
default y
depends on DT_HAS_NXP_MCI_IO_MUX_ENABLED
help
Enable pin controller driver for NXP MCI_IO_MUX

9
drivers/pinctrl/Kconfig.rw
View file

@ -1,9 +0,0 @@
# Copyright 2022 NXP
# SPDX-License-Identifier: Apache-2.0
config PINCTRL_RW
bool "Pin controller driver for NXP RW MCUs"
default y
depends on DT_HAS_NXP_RW_IOMUX_PINCTRL_ENABLED
help
Enable pin controller driver for NXP RW61x series MCUs

0
drivers/pinctrl/pinctrl_rw_iomux.c → drivers/pinctrl/pinctrl_mci_io_mux.c
View file

2
dts/arm/nxp/nxp_rw6xx_common.dtsi
View file

@ -58,7 +58,7 @@
};
pinctrl: mci_iomux@4000 {
compatible = "nxp,rw-iomux-pinctrl";
compatible = "nxp,mci-io-mux";
reg = <0x4000 0x1000>;
status = "okay";
};

10
dts/bindings/pinctrl/nxp,rw-iomux-pinctrl.yaml → dts/bindings/pinctrl/nxp,mci-io-mux.yaml
View file

@ -1,8 +1,8 @@
# Copyright 2022, NXP
# Copyright 2022, 2024 NXP
# SPDX-License-Identifier: Apache-2.0
description: |
RW61x pin control node. This node defines pin configurations in pin
MCI IO MUX pin control node. This node defines pin configurations in pin
groups, and has the 'pinctrl' node identifier in the SOC's devicetree. Each
group within the pin configuration defines a peripheral's pin configuration.
Each numbered subgroup represents pins with shared configuration for that
@ -30,16 +30,16 @@ description: |
bias-pull-up: PAD_PU_PD_ENx= (0x1 << pin_index)
bias-pull-down: PAD_PU_PD_ENx= (0x10 << pin_index)
compatible: "nxp,rw-iomux-pinctrl"
compatible: "nxp,mci-io-mux"
include:
- name: base.yaml
child-binding:
description: iMX RW IOMUX pin controller pin group
description: MCI IO MUX pin controller pin group
child-binding:
description: |
iMX RW IOMUX pin controller pin configuration node
MCI IO MUX pin controller pin configuration node
include:
- name: pincfg-node.yaml
property-allowlist: