drivers: adc: add driver for AD5592
Add MFD subdriver for the built-in ADC controller in AD5592 chip. Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
This commit is contained in:
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ad3c5a27b4
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@ -245,6 +245,7 @@
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/drivers/adc/adc_rpi_pico.c @soburi
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/drivers/adc/*ads114s0x* @benediktibk
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/drivers/adc/*max11102_17* @benediktibk
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/drivers/adc/adc_ad5592.c @bbilas
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/drivers/audio/*nrfx* @anangl
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/drivers/auxdisplay/*pt6314* @xingrz
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/drivers/auxdisplay/* @thedjnK
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@ -46,3 +46,4 @@ zephyr_library_sources_ifdef(CONFIG_ADC_TLA2021 adc_tla2021.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_NXP_S32_ADC_SAR adc_nxp_s32_adc_sar.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_MAX1125X adc_max1125x.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_MAX11102_17 adc_max11102_17.c)
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zephyr_library_sources_ifdef(CONFIG_ADC_AD5592 adc_ad5592.c)
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@ -116,4 +116,6 @@ source "drivers/adc/Kconfig.max1125x"
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source "drivers/adc/Kconfig.max11102_17"
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source "drivers/adc/Kconfig.ad5592"
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endif # ADC
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25
drivers/adc/Kconfig.ad5592
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25
drivers/adc/Kconfig.ad5592
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@ -0,0 +1,25 @@
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# Copyright (c) 2023 Grinn
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# SPDX -License-Identifier: Apache-2.0
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config ADC_AD5592
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bool "AD5592 ADC driver"
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default y
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depends on DT_HAS_ADI_AD5592_ADC_ENABLED
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select MFD
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help
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Enable the AD5592 ADC driver.
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config ADC_AD5592_ACQUISITION_THREAD_STACK_SIZE
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int "Stack size for the ADC data acquisition thread"
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depends on ADC_AD5592
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default 384
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help
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Size of the stack used for the internal data acquisition
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thread.
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config ADC_AD5592_ACQUISITION_THREAD_PRIO
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int "Priority for the ADC data acquisition thread"
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depends on ADC_AD5592
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default 0
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help
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Priority level for the internal ADC data acquisition thread.
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255
drivers/adc/adc_ad5592.c
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255
drivers/adc/adc_ad5592.c
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@ -0,0 +1,255 @@
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/*
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* Copyright (c) 2023 Grinn
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT adi_ad5592_adc
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#include <zephyr/drivers/adc.h>
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#include <zephyr/kernel.h>
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#include <zephyr/sys/byteorder.h>
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#include <zephyr/drivers/mfd/ad5592.h>
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#define ADC_CONTEXT_USES_KERNEL_TIMER
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#include "adc_context.h"
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(adc_ad5592, CONFIG_ADC_LOG_LEVEL);
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#define AD5592_ADC_RESOLUTION 12U
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#define AD5592_ADC_MAX_VAL 4096
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struct adc_ad5592_config {
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const struct device *mfd_dev;
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};
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struct adc_ad5592_data {
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struct adc_context ctx;
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const struct device *dev;
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uint8_t adc_conf;
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uint16_t *buffer;
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uint16_t *repeat_buffer;
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uint8_t channels;
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struct k_thread thread;
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struct k_sem sem;
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K_KERNEL_STACK_MEMBER(stack, CONFIG_ADC_AD5592_ACQUISITION_THREAD_STACK_SIZE);
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};
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static int adc_ad5592_channel_setup(const struct device *dev,
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const struct adc_channel_cfg *channel_cfg)
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{
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const struct adc_ad5592_config *config = dev->config;
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struct adc_ad5592_data *data = dev->data;
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if (channel_cfg->channel_id >= AD5592_PIN_MAX) {
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LOG_ERR("invalid channel id %d", channel_cfg->channel_id);
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return -EINVAL;
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}
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data->adc_conf |= BIT(channel_cfg->channel_id);
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return mfd_ad5592_write_reg(config->mfd_dev, AD5592_REG_ADC_CONFIG, data->adc_conf);
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}
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static int adc_ad5592_validate_buffer_size(const struct device *dev,
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const struct adc_sequence *sequence)
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{
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uint8_t channels;
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size_t needed;
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channels = POPCOUNT(sequence->channels);
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needed = channels * sizeof(uint16_t);
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if (sequence->buffer_size < needed) {
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return -ENOMEM;
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}
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return 0;
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}
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static int adc_ad5592_start_read(const struct device *dev, const struct adc_sequence *sequence)
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{
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struct adc_ad5592_data *data = dev->data;
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int ret;
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if (sequence->resolution != AD5592_ADC_RESOLUTION) {
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LOG_ERR("invalid resolution %d", sequence->resolution);
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return -EINVAL;
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}
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if (find_msb_set(sequence->channels) > AD5592_PIN_MAX) {
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LOG_ERR("invalid channels in mask: 0x%08x", sequence->channels);
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return -EINVAL;
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}
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ret = adc_ad5592_validate_buffer_size(dev, sequence);
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if (ret < 0) {
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LOG_ERR("insufficient buffer size");
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return ret;
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}
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data->buffer = sequence->buffer;
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adc_context_start_read(&data->ctx, sequence);
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return adc_context_wait_for_completion(&data->ctx);
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}
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static int adc_ad5592_read_channel(const struct device *dev, uint8_t channel, uint16_t *result)
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{
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const struct adc_ad5592_config *config = dev->config;
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uint16_t val;
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int ret;
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ret = mfd_ad5592_write_reg(config->mfd_dev, AD5592_REG_SEQ_ADC, BIT(channel));
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if (ret < 0) {
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return ret;
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}
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/*
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* Invalid data:
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* See Figure 46. Single-Channel ADC Conversion Sequence.
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* The first conversion result always returns invalid data.
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*/
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(void) mfd_ad5592_read_raw(config->mfd_dev, &val);
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ret = mfd_ad5592_read_raw(config->mfd_dev, &val);
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if (ret < 0) {
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return ret;
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}
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val = sys_be16_to_cpu(val);
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if (channel >= 1) {
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val -= channel * AD5592_ADC_MAX_VAL;
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}
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*result = val;
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return 0;
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}
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static void adc_context_start_sampling(struct adc_context *ctx)
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{
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struct adc_ad5592_data *data = CONTAINER_OF(ctx, struct adc_ad5592_data, ctx);
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data->channels = ctx->sequence.channels;
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data->repeat_buffer = data->buffer;
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k_sem_give(&data->sem);
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}
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static void adc_context_update_buffer_pointer(struct adc_context *ctx,
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bool repeat_sampling)
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{
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struct adc_ad5592_data *data = CONTAINER_OF(ctx, struct adc_ad5592_data, ctx);
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if (repeat_sampling) {
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data->buffer = data->repeat_buffer;
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}
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}
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static void adc_ad5592_acquisition_thread(struct adc_ad5592_data *data)
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{
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uint16_t result;
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uint8_t channel;
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int ret;
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while (true) {
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k_sem_take(&data->sem, K_FOREVER);
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while (data->channels != 0) {
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channel = find_lsb_set(data->channels) - 1;
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ret = adc_ad5592_read_channel(data->dev, channel, &result);
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if (ret < 0) {
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LOG_ERR("failed to read channel %d (ret %d)", channel, ret);
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adc_context_complete(&data->ctx, ret);
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break;
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}
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*data->buffer++ = result;
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WRITE_BIT(data->channels, channel, 0);
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}
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adc_context_on_sampling_done(&data->ctx, data->dev);
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}
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}
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static int adc_ad5592_read_async(const struct device *dev,
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const struct adc_sequence *sequence,
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struct k_poll_signal *async)
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{
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struct adc_ad5592_data *data = dev->data;
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int ret;
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adc_context_lock(&data->ctx, async ? true : false, async);
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ret = adc_ad5592_start_read(dev, sequence);
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adc_context_release(&data->ctx, ret);
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return ret;
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}
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static int adc_ad5592_read(const struct device *dev,
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const struct adc_sequence *sequence)
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{
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return adc_ad5592_read_async(dev, sequence, NULL);
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}
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static int adc_ad5592_init(const struct device *dev)
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{
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const struct adc_ad5592_config *config = dev->config;
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struct adc_ad5592_data *data = dev->data;
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k_tid_t tid;
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int ret;
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if (!device_is_ready(config->mfd_dev)) {
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return -ENODEV;
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}
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ret = mfd_ad5592_write_reg(config->mfd_dev, AD5592_REG_PD_REF_CTRL, AD5592_EN_REF);
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if (ret < 0) {
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return ret;
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}
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data->dev = dev;
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k_sem_init(&data->sem, 0, 1);
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adc_context_init(&data->ctx);
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tid = k_thread_create(&data->thread, data->stack,
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CONFIG_ADC_AD5592_ACQUISITION_THREAD_STACK_SIZE,
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(k_thread_entry_t)adc_ad5592_acquisition_thread, data, NULL, NULL,
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CONFIG_ADC_AD5592_ACQUISITION_THREAD_PRIO, 0, K_NO_WAIT);
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ret = k_thread_name_set(tid, "adc_ad5592");
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if (ret < 0) {
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return ret;
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}
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adc_context_unlock_unconditionally(&data->ctx);
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return 0;
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}
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static const struct adc_driver_api adc_ad5592_api = {
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.channel_setup = adc_ad5592_channel_setup,
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.read = adc_ad5592_read,
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#ifdef CONFIG_ADC_ASYNC
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.read_async = adc_ad5592_read_async,
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#endif
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};
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#define ADC_AD5592_DEFINE(inst) \
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static const struct adc_ad5592_config adc_ad5592_config##inst = { \
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.mfd_dev = DEVICE_DT_GET(DT_INST_PARENT(inst)), \
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}; \
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\
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struct adc_ad5592_data adc_ad5592_data##inst; \
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\
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DEVICE_DT_INST_DEFINE(inst, adc_ad5592_init, NULL, \
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&adc_ad5592_data##inst, &adc_ad5592_config##inst, \
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POST_KERNEL, CONFIG_MFD_INIT_PRIORITY, \
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&adc_ad5592_api);
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DT_INST_FOREACH_STATUS_OKAY(ADC_AD5592_DEFINE)
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@ -104,6 +104,7 @@ static struct adc_hdl {
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DT_FOREACH_STATUS_OKAY(maxim_max11115, ADC_HDL_LIST_ENTRY)
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DT_FOREACH_STATUS_OKAY(maxim_max11116, ADC_HDL_LIST_ENTRY)
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DT_FOREACH_STATUS_OKAY(maxim_max11117, ADC_HDL_LIST_ENTRY)
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DT_FOREACH_STATUS_OKAY(adi_ad5592_adc, ADC_HDL_LIST_ENTRY)
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};
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static struct adc_hdl *get_adc(const char *device_label)
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15
dts/bindings/adc/adi,ad5592-adc.yaml
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15
dts/bindings/adc/adi,ad5592-adc.yaml
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# Copyright (c) 2023 Grinn
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# SPDX-License-Identifier: Apache-2.0
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description: AD5592 ADC Controller
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compatible: "adi,ad5592-adc"
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include: adc-controller.yaml
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properties:
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"#io-channel-cells":
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const: 1
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io-channel-cells:
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- input
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50
tests/drivers/build_all/adc/app.overlay
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50
tests/drivers/build_all/adc/app.overlay
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/*
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* Copyright (c) 2023 Grinn
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Application overlay for testing driver builds
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*
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* Names in this file should be chosen in a way that won't conflict
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* with real-world devicetree nodes, to allow these tests to run on
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* (and be extended to test) real hardware.
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*/
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/ {
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test {
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#address-cells = <1>;
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#size-cells = <1>;
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test_gpio: gpio@deadbeef {
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compatible = "vnd,gpio";
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gpio-controller;
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reg = <0xdeadbeef 0x1000>;
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#gpio-cells = <0x2>;
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status = "okay";
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};
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test_spi: spi@33334444 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "vnd,spi";
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reg = <0x33334444 0x1000>;
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status = "okay";
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clock-frequency = <2000000>;
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cs-gpios = <&test_gpio 0 0>;
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test_spi_ad5592: ad5592@0 {
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compatible = "adi,ad5592";
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status = "okay";
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reg = <0x0>;
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spi-max-frequency = <0>;
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reset-gpios = <&test_gpio 0 0>;
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ad5592_adc: adc-controller {
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compatible = "adi,ad5592-adc";
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#io-channel-cells = <1>;
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};
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};
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};
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};
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};
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@ -4,3 +4,4 @@ CONFIG_ADC=y
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CONFIG_MAX_THREAD_BYTES=4
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CONFIG_ADC_INIT_PRIORITY=80
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CONFIG_KOBJECT_RODATA_AREA_EXTRA_BYTES=256
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CONFIG_SPI=y
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