arch: introduce DSP_SHARING and CPU_HAS_DSP configs
introduce global DSP_SHARING and CPU_HAS_DSP to be used by all architectures and change existing usage in ARC to use those global configs. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
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arch/Kconfig
16
arch/Kconfig
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@ -656,6 +656,11 @@ config CPU_HAS_FPU
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This option is enabled when the CPU has hardware floating point
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unit.
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config CPU_HAS_DSP
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bool
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help
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This option is enabled when the CPU has hardware DSP unit.
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config CPU_HAS_FPU_DOUBLE_PRECISION
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bool
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select CPU_HAS_FPU
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@ -820,6 +825,17 @@ config CODE_DATA_RELOCATION
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the target regions should be specified in CMakeLists.txt using
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zephyr_code_relocate().
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menu "DSP Options"
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config DSP_SHARING
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bool "DSP register sharing"
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depends on CPU_HAS_DSP
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help
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This option enables preservation of the hardware DSP registers
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across context switches to allow multiple threads to perform concurrent
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DSP operations.
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endmenu
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menu "Floating Point Options"
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config FPU
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@ -3,13 +3,8 @@
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# Copyright (c) 2022 Synopsys
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# SPDX-License-Identifier: Apache-2.0
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config ARC_HAS_DSP
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bool
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help
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This option is enabled when the ARC CPU has hardware DSP unit.
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menu "ARC DSP Options"
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depends on ARC_HAS_DSP
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depends on CPU_HAS_DSP
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config ARC_DSP
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bool "digital signal processing (DSP)"
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@ -22,7 +17,7 @@ config ARC_DSP_TURNED_OFF
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help
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This option disables DSP block via resetting DSP_CRTL register.
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config ARC_DSP_SHARING
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config DSP_SHARING
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bool "DSP register sharing"
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depends on ARC_DSP && MULTITHREADING
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select ARC_HAS_ACCL_REGS
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@ -49,7 +44,7 @@ config ARC_XY_ENABLE
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config ARC_AGU_SHARING
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bool "ARC address generation unit register sharing"
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depends on ARC_XY_ENABLE && MULTITHREADING
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default y if ARC_DSP_SHARING
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default y if DSP_SHARING
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help
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This option enables preservation of the hardware AGU registers
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across context switches to allow multiple threads to perform concurrent
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@ -9,7 +9,7 @@
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* @brief ARCv2 DSP and AGU structure member offset definition file
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*
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*/
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#ifdef CONFIG_ARC_DSP_SHARING
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#ifdef CONFIG_DSP_SHARING
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GEN_OFFSET_SYM(_callee_saved_stack_t, dsp_ctrl);
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GEN_OFFSET_SYM(_callee_saved_stack_t, acc0_glo);
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GEN_OFFSET_SYM(_callee_saved_stack_t, acc0_ghi);
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@ -10,7 +10,7 @@
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*
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*/
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.macro _save_dsp_regs
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#ifdef CONFIG_ARC_DSP_SHARING
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#ifdef CONFIG_DSP_SHARING
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ld_s r13, [r2, ___thread_base_t_user_options_OFFSET]
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bbit0 r13, K_DSP_IDX, dsp_skip_save
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lr r13, [_ARC_V2_DSP_CTRL]
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@ -136,7 +136,7 @@ agu_skip_save :
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.endm
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.macro _load_dsp_regs
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#ifdef CONFIG_ARC_DSP_SHARING
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#ifdef CONFIG_DSP_SHARING
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ld_s r13, [r2, ___thread_base_t_user_options_OFFSET]
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bbit0 r13, K_DSP_IDX, dsp_skip_load
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ld_s r13, [sp, ___callee_saved_stack_t_dsp_ctrl_OFFSET]
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@ -26,7 +26,7 @@
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#include <kernel_arch_data.h>
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#include <gen_offset.h>
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#include <kernel_offsets.h>
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#ifdef CONFIG_ARC_DSP_SHARING
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#ifdef CONFIG_DSP_SHARING
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#include "../dsp/dsp_offsets.c"
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#endif
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@ -19,7 +19,7 @@
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#include <zephyr/arch/arc/v2/mpu/arc_core_mpu.h>
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#endif
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#if defined(CONFIG_ARC_DSP) && defined(CONFIG_ARC_DSP_SHARING)
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#if defined(CONFIG_ARC_DSP) && defined(CONFIG_DSP_SHARING)
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#include <zephyr/arch/arc/v2/dsp/arc_dsp.h>
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static struct k_spinlock lock;
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#endif
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@ -297,7 +297,7 @@ FUNC_NORETURN void z_arc_switch_to_main_no_multithreading(k_thread_entry_t main_
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}
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#endif /* !CONFIG_MULTITHREADING */
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#if defined(CONFIG_ARC_DSP) && defined(CONFIG_ARC_DSP_SHARING)
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#if defined(CONFIG_ARC_DSP) && defined(CONFIG_DSP_SHARING)
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void arc_dsp_disable(struct k_thread *thread, unsigned int options)
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{
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/* Ensure a preemptive context switch does not occur */
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@ -319,4 +319,4 @@ void arc_dsp_enable(struct k_thread *thread, unsigned int options)
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k_spin_unlock(&lock, key);
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}
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#endif /* CONFIG_ARC_DSP && CONFIG_ARC_DSP_SHARING */
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#endif /* CONFIG_ARC_DSP && CONFIG_DSP_SHARING */
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@ -160,7 +160,7 @@ struct _callee_saved_stack {
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#endif
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#endif
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#ifdef CONFIG_ARC_DSP_SHARING
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#ifdef CONFIG_DSP_SHARING
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#ifdef CONFIG_ARC_DSP_BFLY_SHARING
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uintptr_t dsp_fft_ctrl;
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uintptr_t dsp_bfly0;
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@ -5,4 +5,4 @@ config SOC_ARC_HSDK4XD
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bool "Synopsys ARC HSDK4XD SoC"
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select ARC
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select CPU_HAS_FPU
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select ARC_HAS_DSP
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select CPU_HAS_DSP
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@ -18,7 +18,7 @@ config SOC_NSIM_EM7D_V22
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config SOC_NSIM_EM11D
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bool "Synopsys ARC EM11D in nSIM"
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select CPU_HAS_MPU
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select ARC_HAS_DSP
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select CPU_HAS_DSP
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config SOC_NSIM_SEM
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bool "Synopsys ARC SEM in nSIM"
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@ -1,5 +1,5 @@
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CONFIG_ZTEST=y
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CONFIG_ARC_DSP=y
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CONFIG_ARC_DSP_SHARING=y
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CONFIG_DSP_SHARING=y
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CONFIG_MAIN_STACK_SIZE=1024
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CONFIG_ARC_DSP_BFLY_SHARING=y
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@ -11,7 +11,7 @@
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#error Rebuild with the ARC_DSP config option enabled
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#endif
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#ifndef CONFIG_ARC_DSP_SHARING
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#ifndef CONFIG_DSP_SHARING
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#error Rebuild with the ARC_DSP_SHARING config option enabled
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#endif
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@ -1,8 +1,8 @@
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tests:
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arch.arc.dsp_sharing.test_load_store:
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filter: CONFIG_ISA_ARCV2 and CONFIG_ARC_HAS_DSP
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filter: CONFIG_ISA_ARCV2 and CONFIG_CPU_HAS_DSP
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platform_allow: nsim_em11d
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arch.arc.dsp_sharing.test_calculation:
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filter: CONFIG_ISA_ARCV2 and CONFIG_ARC_HAS_DSP
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filter: CONFIG_ISA_ARCV2 and CONFIG_CPU_HAS_DSP
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toolchain_allow: arcmwdt
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platform_allow: nsim_em11d
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