From b0dfda1584270800d1cd275dc191590155d7e7b7 Mon Sep 17 00:00:00 2001 From: Daniel DeGrasse Date: Thu, 2 Dec 2021 09:57:54 -0600 Subject: [PATCH] drivers: pwm_mcux: Update MCUX pwm driver to use clock bindings MCUX PWM driver used hardcoded clock source. update driver to use clock bindings to determine PWM peripheral clock frequency. Signed-off-by: Daniel DeGrasse --- .../clock_control/clock_control_mcux_ccm.c | 6 ++++ .../clock_control_mcux_ccm_rev2.c | 6 ++++ drivers/pwm/pwm_mcux.c | 28 ++++++++++++++----- dts/arm/nxp/nxp_rt.dtsi | 16 +++++++++++ dts/arm/nxp/nxp_rt11xx.dtsi | 16 +++++++++++ include/dt-bindings/clock/imx_ccm.h | 1 + include/dt-bindings/clock/imx_ccm_rev2.h | 4 +++ 7 files changed, 70 insertions(+), 7 deletions(-) diff --git a/drivers/clock_control/clock_control_mcux_ccm.c b/drivers/clock_control/clock_control_mcux_ccm.c index 31cfe00d30..598e8294d9 100644 --- a/drivers/clock_control/clock_control_mcux_ccm.c +++ b/drivers/clock_control/clock_control_mcux_ccm.c @@ -102,6 +102,12 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev, break; #endif +#ifdef CONFIG_PWM_MCUX + case IMX_CCM_PWM_CLK: + *rate = CLOCK_GetIpgFreq(); + break; +#endif + #ifdef CONFIG_UART_MCUX_IUART case IMX_CCM_UART_CLK: *rate = CLOCK_GetPllFreq(kCLOCK_SystemPll1Ctrl) / diff --git a/drivers/clock_control/clock_control_mcux_ccm_rev2.c b/drivers/clock_control/clock_control_mcux_ccm_rev2.c index 007816df1d..120eeec1b0 100644 --- a/drivers/clock_control/clock_control_mcux_ccm_rev2.c +++ b/drivers/clock_control/clock_control_mcux_ccm_rev2.c @@ -67,6 +67,12 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev, break; #endif +#ifdef CONFIG_PWM_MCUX + case IMX_CCM_PWM_CLK: + clock_root = kCLOCK_Root_Bus; + break; +#endif + #ifdef CONFIG_CAN_MCUX_FLEXCAN case IMX_CCM_CAN1_CLK: clock_root = kCLOCK_Root_Can1 + instance; diff --git a/drivers/pwm/pwm_mcux.c b/drivers/pwm/pwm_mcux.c index f4ea9b8869..7a801e30b9 100644 --- a/drivers/pwm/pwm_mcux.c +++ b/drivers/pwm/pwm_mcux.c @@ -8,9 +8,9 @@ #include #include +#include #include #include -#include #define LOG_LEVEL CONFIG_PWM_LOG_LEVEL #include @@ -21,7 +21,8 @@ LOG_MODULE_REGISTER(pwm_mcux); struct pwm_mcux_config { PWM_Type *base; uint8_t index; - clock_name_t clock_source; + const struct device *clock_dev; + clock_control_subsys_t clock_subsys; pwm_clock_prescale_t prescale; pwm_mode_t mode; }; @@ -75,7 +76,11 @@ static int mcux_pwm_pin_set(const struct device *dev, uint32_t pwm, LOG_DBG("SETUP dutycycle to %u\n", duty_cycle); - clock_freq = CLOCK_GetFreq(config->clock_source); + if (clock_control_get_rate(config->clock_dev, config->clock_subsys, + &clock_freq)) { + return -EINVAL; + } + pwm_freq = (clock_freq >> config->prescale) / period_cycles; if (pwm_freq == 0) { @@ -112,8 +117,13 @@ static int mcux_pwm_get_cycles_per_sec(const struct device *dev, uint32_t pwm, uint64_t *cycles) { const struct pwm_mcux_config *config = dev->config; + uint32_t clock_freq; - *cycles = CLOCK_GetFreq(config->clock_source) >> config->prescale; + if (clock_control_get_rate(config->clock_dev, config->clock_subsys, + &clock_freq)) { + return -EINVAL; + } + *cycles = clock_freq >> config->prescale; return 0; } @@ -124,10 +134,12 @@ static int pwm_mcux_init(const struct device *dev) struct pwm_mcux_data *data = dev->data; pwm_config_t pwm_config; status_t status; + int i; PWM_GetDefaultConfig(&pwm_config); pwm_config.prescale = config->prescale; pwm_config.reloadLogic = kPWM_ReloadPwmFullCycle; + pwm_config.clockSource = kPWM_BusClock; status = PWM_Init(config->base, config->index, &pwm_config); if (status != kStatus_Success) { @@ -136,8 +148,9 @@ static int pwm_mcux_init(const struct device *dev) } /* Disable fault sources */ - ((PWM_Type *)config->base)->SM[config->index].DISMAP[0] = 0x0000; - ((PWM_Type *)config->base)->SM[config->index].DISMAP[1] = 0x0000; + for (i = 0; i < FSL_FEATURE_PWM_FAULT_CH_COUNT; i++) { + ((PWM_Type *)config->base)->SM[config->index].DISMAP[i] = 0x0000; + } data->channel[0].pwmChannel = kPWM_PwmA; data->channel[0].level = kPWM_HighTrue; @@ -160,7 +173,8 @@ static const struct pwm_driver_api pwm_mcux_driver_api = { .index = DT_INST_PROP(n, index), \ .mode = kPWM_EdgeAligned, \ .prescale = kPWM_Prescale_Divide_128, \ - .clock_source = kCLOCK_IpgClk, \ + .clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \ + .clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\ }; \ \ DEVICE_DT_INST_DEFINE(n, \ diff --git a/dts/arm/nxp/nxp_rt.dtsi b/dts/arm/nxp/nxp_rt.dtsi index a327a09c5f..8783512f9e 100644 --- a/dts/arm/nxp/nxp_rt.dtsi +++ b/dts/arm/nxp/nxp_rt.dtsi @@ -379,6 +379,7 @@ label = "FLEXPWM1_PWM0"; interrupts = <102 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -388,6 +389,7 @@ label = "FLEXPWM1_PWM1"; interrupts = <103 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -397,6 +399,7 @@ label = "FLEXPWM1_PWM2"; interrupts = <104 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -406,6 +409,7 @@ label = "FLEXPWM1_PWM3"; interrupts = <105 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; }; @@ -421,6 +425,7 @@ label = "FLEXPWM2_PWM0"; interrupts = <137 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -430,6 +435,7 @@ label = "FLEXPWM2_PWM1"; interrupts = <138 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -439,6 +445,7 @@ label = "FLEXPWM2_PWM2"; interrupts = <139 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -448,6 +455,7 @@ label = "FLEXPWM2_PWM3"; interrupts = <140 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; }; @@ -463,6 +471,7 @@ label = "FLEXPWM3_PWM0"; interrupts = <142 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -472,6 +481,7 @@ label = "FLEXPWM3_PWM1"; interrupts = <143 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -481,6 +491,7 @@ label = "FLEXPWM3_PWM2"; interrupts = <144 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -490,6 +501,7 @@ label = "FLEXPWM3_PWM3"; interrupts = <145 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; }; @@ -505,6 +517,7 @@ label = "FLEXPWM4_PWM0"; interrupts = <147 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -514,6 +527,7 @@ label = "FLEXPWM4_PWM1"; interrupts = <148 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -523,6 +537,7 @@ label = "FLEXPWM4_PWM2"; interrupts = <149 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -532,6 +547,7 @@ label = "FLEXPWM4_PWM3"; interrupts = <150 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; }; diff --git a/dts/arm/nxp/nxp_rt11xx.dtsi b/dts/arm/nxp/nxp_rt11xx.dtsi index 39a3119749..cb45a52133 100644 --- a/dts/arm/nxp/nxp_rt11xx.dtsi +++ b/dts/arm/nxp/nxp_rt11xx.dtsi @@ -471,6 +471,7 @@ label = "FLEXPWM1_PWM0"; interrupts = <125 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -480,6 +481,7 @@ label = "FLEXPWM1_PWM1"; interrupts = <126 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -489,6 +491,7 @@ label = "FLEXPWM1_PWM2"; interrupts = <127 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -498,6 +501,7 @@ label = "FLEXPWM1_PWM3"; interrupts = <128 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; }; @@ -513,6 +517,7 @@ label = "FLEXPWM2_PWM0"; interrupts = <177 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -522,6 +527,7 @@ label = "FLEXPWM2_PWM1"; interrupts = <178 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -531,6 +537,7 @@ label = "FLEXPWM2_PWM2"; interrupts = <179 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -540,6 +547,7 @@ label = "FLEXPWM2_PWM3"; interrupts = <180 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; }; @@ -555,6 +563,7 @@ label = "FLEXPWM3_PWM0"; interrupts = <182 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -564,6 +573,7 @@ label = "FLEXPWM3_PWM1"; interrupts = <183 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -573,6 +583,7 @@ label = "FLEXPWM3_PWM2"; interrupts = <184 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -582,6 +593,7 @@ label = "FLEXPWM3_PWM3"; interrupts = <185 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; }; @@ -597,6 +609,7 @@ label = "FLEXPWM4_PWM0"; interrupts = <187 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -606,6 +619,7 @@ label = "FLEXPWM4_PWM1"; interrupts = <188 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -615,6 +629,7 @@ label = "FLEXPWM4_PWM2"; interrupts = <189 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; @@ -624,6 +639,7 @@ label = "FLEXPWM4_PWM3"; interrupts = <190 0>; #pwm-cells = <1>; + clocks = <&ccm IMX_CCM_PWM_CLK 0 0>; status = "disabled"; }; }; diff --git a/include/dt-bindings/clock/imx_ccm.h b/include/dt-bindings/clock/imx_ccm.h index 17d4b52063..64543dc4d0 100644 --- a/include/dt-bindings/clock/imx_ccm.h +++ b/include/dt-bindings/clock/imx_ccm.h @@ -22,5 +22,6 @@ #define IMX_CCM_SAI1_CLK 12 #define IMX_CCM_SAI2_CLK 13 #define IMX_CCM_SAI3_CLK 14 +#define IMX_CCM_PWM_CLK 15 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IMX_CCM_H_ */ diff --git a/include/dt-bindings/clock/imx_ccm_rev2.h b/include/dt-bindings/clock/imx_ccm_rev2.h index 062eb3d765..9864d421c1 100644 --- a/include/dt-bindings/clock/imx_ccm_rev2.h +++ b/include/dt-bindings/clock/imx_ccm_rev2.h @@ -60,6 +60,9 @@ #define IMX_CCM_EDMA_CLK 0x700UL #define IMX_CCM_EDMA_LPSR_CLK 0x701UL +/* PWM */ +#define IMX_CCM_PWM_CLK 0x800UL + /* CAN */ #define IMX_CCM_CAN_CLK 0x900UL #define IMX_CCM_CAN1_CLK 0x900UL @@ -75,4 +78,5 @@ #define IMX_CCM_GPT5_CLK 0x1004UL #define IMX_CCM_GPT6_CLK 0x1005UL + #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IMX_CCM_REV2_H_ */