drivers: led: Microchip XEC LED driver using BBLED controller
Implement a LED driver for Microchip XEC using the breathing, blinking LED controller. The driver supports LED on, off, and blink API's. The BBLED block uses the 32768 Hz clock domain allowing the module to operate in light and deep sleep states. Blink frequency is 32768 divided by 256 * (prescale + 1) where prescale is a 12-bit value. Duty cycle is specified by an 8-bit value where 0 = full off, 127 is 50%, and 255 is full on. Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
This commit is contained in:
Jay Vasanth
Carles Cufí
parent
55da0217da
commit
b15f01ddce
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@ -5,6 +5,7 @@ zephyr_library()
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zephyr_library_sources_ifdef(CONFIG_HT16K33 ht16k33.c)
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zephyr_library_sources_ifdef(CONFIG_LED_GPIO led_gpio.c)
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zephyr_library_sources_ifdef(CONFIG_LED_PWM led_pwm.c)
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zephyr_library_sources_ifdef(CONFIG_LED_XEC led_mchp_xec.c)
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zephyr_library_sources_ifdef(CONFIG_LP3943 lp3943.c)
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zephyr_library_sources_ifdef(CONFIG_LP503X lp503x.c)
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zephyr_library_sources_ifdef(CONFIG_LP5562 lp5562.c)
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@ -34,5 +34,6 @@ source "drivers/led/Kconfig.lp5562"
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source "drivers/led/Kconfig.pca9633"
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source "drivers/led/Kconfig.pwm"
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source "drivers/led/Kconfig.tlc59108"
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source "drivers/led/Kconfig.xec"
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endif # LED
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10
drivers/led/Kconfig.xec
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10
drivers/led/Kconfig.xec
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@ -0,0 +1,10 @@
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# Copyright (c) 2022 Microchip Technology Inc.
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# SPDX-License-Identifier: Apache-2.0
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config LED_XEC
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bool "Microchip XEC BB-LED driver"
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default y
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depends on DT_HAS_MICROCHIP_XEC_BBLED_ENABLED
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help
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Enable driver for the Microchip XEC Breathing-Blinking
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LED controller for MEC15xx and MEC172x
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288
drivers/led/led_mchp_xec.c
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288
drivers/led/led_mchp_xec.c
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@ -0,0 +1,288 @@
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/*
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* Copyright (c) 2022 Microchip Technology Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT microchip_xec_bbled
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/**
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* @file
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* @brief Microchip Breathing-Blinking LED controller
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*/
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#include <soc.h>
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#ifndef CONFIG_SOC_SERIES_MEC1501X
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#include <zephyr/drivers/clock_control/mchp_xec_clock_control.h>
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#include <zephyr/drivers/interrupt_controller/intc_mchp_xec_ecia.h>
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#endif
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#include <zephyr/drivers/led.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/device.h>
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#include <zephyr/kernel.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(led_xec, CONFIG_LED_LOG_LEVEL);
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/* Same BBLED hardware block in MEC15xx and MEC172x families
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* Config register
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*/
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#define XEC_BBLED_CFG_MSK 0x1ffffu
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#define XEC_BBLED_CFG_MODE_POS 0
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#define XEC_BBLED_CFG_MODE_MSK 0x3u
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#define XEC_BBLED_CFG_MODE_OFF 0
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#define XEC_BBLED_CFG_MODE_BREATHING 0x1u
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#define XEC_BBLED_CFG_MODE_PWM 0x2u
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#define XEC_BBLED_CFG_MODE_ALWAYS_ON 0x3u
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#define XEC_BBLED_CFG_CLK_SRC_48M_POS 2
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#define XEC_BBLED_CFG_EN_UPDATE_POS 6
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#define XEC_BBLED_CFG_RST_PWM_POS 7
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#define XEC_BBLED_CFG_WDT_RLD_POS 8
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#define XEC_BBLED_CFG_WDT_RLD_MSK0 0xffu
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#define XEC_BBLED_CFG_WDT_RLD_MSK 0xff00u
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#define XEC_BBLED_CFG_WDT_RLD_DFLT 0x1400u
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/* Limits register */
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#define XEC_BBLED_LIM_MSK 0xffffu
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#define XEC_BBLED_LIM_MIN_POS 0
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#define XEC_BBLED_LIM_MIN_MSK 0xffu
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#define XEC_BBLED_LIM_MAX_POS 8
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#define XEC_BBLED_LIM_MAX_MSK 0xff00u
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/* Delay register */
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#define XEC_BBLED_DLY_MSK 0xffffffu
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#define XEC_BBLED_DLY_LO_POS 0
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#define XEC_BBLED_DLY_LO_MSK 0xfffu
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#define XEC_BBLED_DLY_HI_POS 12
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#define XEC_BBLED_DLY_HI_MSK 0xfff000u
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/* Update step size and update interval registers implement
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* eight 4-bit fields numbered 0 to 7
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*/
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#define XEC_BBLED_UPD_SSI_POS(n) ((uint32_t)(n) * 4u)
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#define XEC_BBLED_UPD_SSI0_MSK(n) ((uint32_t)0xfu << XEC_BBLED_UPD_SSI_POS(n))
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/* Output delay register: b[7:0] is delay in clock source units */
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#define XEC_BBLED_OUT_DLY_MSK 0xffu
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/* Delay.Lo register field */
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#define XEC_BBLED_MAX_PRESCALER 4095u
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/* Blink mode source frequency is 32768 Hz */
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#define XEC_BBLED_BLINK_CLK_SRC_HZ 32768u
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/* Fblink = 32768 / (256 * (prescaler+1))
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* prescaler is 12 bit.
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* Maximum Fblink = 128 Hz or 7.8125 ms
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* Minimum Fblink = 32.25 mHz or 32000 ms
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*/
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#define XEC_BBLED_BLINK_PERIOD_MAX_MS 32000u
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#define XEC_BBLED_BLINK_PERIOD_MIN_MS 8u
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struct xec_bbled_regs {
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volatile uint32_t config;
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volatile uint32_t limits;
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volatile uint32_t delay;
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volatile uint32_t update_step_size;
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volatile uint32_t update_interval;
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volatile uint32_t output_delay;
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};
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struct xec_bbled_config {
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struct xec_bbled_regs * const regs;
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const struct pinctrl_dev_config *pcfg;
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uint8_t pcr_id;
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uint8_t pcr_pos;
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};
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/* delay_on and delay_off are in milliseconds
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* (prescale+1) = (32768 * Tblink_ms) / (256 * 1000)
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* requires caller to limit delay_on and delay_off based
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* on BBLED 32KHz minimum/maximum values.
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*/
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static uint32_t calc_blink_32k_prescaler(uint32_t delay_on, uint32_t delay_off)
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{
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uint32_t temp = ((delay_on + delay_off) * XEC_BBLED_BLINK_CLK_SRC_HZ) / (256U * 1000U);
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uint32_t prescaler = 0;
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if (temp) {
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temp--;
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if (temp > XEC_BBLED_MAX_PRESCALER) {
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prescaler = XEC_BBLED_MAX_PRESCALER;
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} else {
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prescaler = (uint32_t)temp;
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}
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}
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return prescaler;
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}
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/* return duty cycle scaled to [0, 255]
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* caller must insure delay_on and delay_off are in hardware range.
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*/
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static uint32_t calc_blink_duty_cycle(uint32_t delay_on, uint32_t delay_off)
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{
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return (256U * delay_on) / (delay_on + delay_off);
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}
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/* Enable HW blinking of the LED.
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* delay_on = on time in milliseconds
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* delay_off = off time in milliseconds
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* BBLED blinking mode uses an 8-bit accumulator and an 8-bit duty cycle
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* register. The duty cycle register is programmed once and the
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* accumulator is used as an 8-bit up counter.
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* The counter uses the 32768 Hz clock and is pre-scaled by the delay
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* counter. Maximum blink rate is 128Hz to 32.25 mHz (7.8 ms to 32 seconds).
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* 8-bit duty cycle values: 0x00 = full off, 0xff = full on.
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* Fblink = 32768 / ((prescale + 1) * 256)
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* HiWidth (seconds) = (1/Fblink) * (duty_cycle / 256)
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* LoWidth (seconds) = (1/Fblink) * ((1 - duty_cycle) / 256)
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* duty_cycle in [0, 1]. Register value for duty cycle is
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* scaled to [0, 255].
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* prescale is delay register low delay field, bits[11:0]
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* duty_cycle is limits register minimum field, bits[7:0]
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*/
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static int xec_bbled_blink(const struct device *dev, uint32_t led,
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uint32_t delay_on, uint32_t delay_off)
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{
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const struct xec_bbled_config * const config = dev->config;
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struct xec_bbled_regs * const regs = config->regs;
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uint32_t period, prescaler, dcs;
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if (led) {
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return -EINVAL;
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}
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/* insure period will not overflow uin32_t */
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if ((delay_on > XEC_BBLED_BLINK_PERIOD_MAX_MS)
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|| (delay_off > XEC_BBLED_BLINK_PERIOD_MAX_MS)) {
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return -EINVAL;
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}
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period = delay_on + delay_off;
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if ((period < XEC_BBLED_BLINK_PERIOD_MIN_MS)
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|| (period > XEC_BBLED_BLINK_PERIOD_MAX_MS)) {
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return -EINVAL;
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}
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prescaler = calc_blink_32k_prescaler(delay_on, delay_off);
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dcs = calc_blink_duty_cycle(delay_on, delay_off);
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regs->config = (regs->config & ~(XEC_BBLED_CFG_MODE_MSK))
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| XEC_BBLED_CFG_MODE_OFF;
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regs->delay = (regs->delay & ~(XEC_BBLED_DLY_LO_MSK))
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| (prescaler & XEC_BBLED_DLY_LO_MSK);
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regs->limits = (regs->limits & ~(XEC_BBLED_LIM_MIN_MSK))
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| (dcs & XEC_BBLED_LIM_MIN_MSK);
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regs->config = (regs->config & ~(XEC_BBLED_CFG_MODE_MSK))
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| XEC_BBLED_CFG_MODE_PWM;
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regs->config |= BIT(XEC_BBLED_CFG_EN_UPDATE_POS);
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return 0;
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}
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static int xec_bbled_on(const struct device *dev, uint32_t led)
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{
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const struct xec_bbled_config * const config = dev->config;
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struct xec_bbled_regs * const regs = config->regs;
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if (led) {
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return -EINVAL;
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}
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regs->config = (regs->config & ~(XEC_BBLED_CFG_MODE_MSK))
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| XEC_BBLED_CFG_MODE_ALWAYS_ON;
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return 0;
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}
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static int xec_bbled_off(const struct device *dev, uint32_t led)
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{
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const struct xec_bbled_config * const config = dev->config;
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struct xec_bbled_regs * const regs = config->regs;
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if (led) {
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return -EINVAL;
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}
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regs->config = (regs->config & ~(XEC_BBLED_CFG_MODE_MSK))
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| XEC_BBLED_CFG_MODE_OFF;
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return 0;
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}
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#ifdef CONFIG_SOC_SERIES_MEC1501X
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static inline void xec_bbled_slp_en_clr(const struct device *dev)
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{
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const struct xec_bbled_config * const cfg = dev->config;
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enum pcr_id pcr_val = PCR_MAX_ID;
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switch (cfg->pcr_pos) {
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case MCHP_PCR3_LED0_POS:
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pcr_val = PCR_LED0;
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break;
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case MCHP_PCR3_LED1_POS:
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pcr_val = PCR_LED1;
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break;
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case MCHP_PCR3_LED2_POS:
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pcr_val = PCR_LED2;
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break;
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default:
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return;
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}
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mchp_pcr_periph_slp_ctrl(pcr_val, 0);
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}
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#else
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static inline void xec_bbled_slp_en_clr(const struct device *dev)
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{
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const struct xec_bbled_config * const cfg = dev->config;
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z_mchp_xec_pcr_periph_sleep(cfg->pcr_id, cfg->pcr_pos, 0);
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}
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#endif
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static int xec_bbled_init(const struct device *dev)
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{
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const struct xec_bbled_config * const config = dev->config;
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struct xec_bbled_regs * const regs = config->regs;
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int ret;
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xec_bbled_slp_en_clr(dev);
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/* soft reset, disable BBLED WDT, set clock source to default (32KHz domain) */
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regs->config |= BIT(XEC_BBLED_CFG_RST_PWM_POS);
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regs->config = XEC_BBLED_CFG_MODE_OFF;
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ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
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if (ret != 0) {
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LOG_ERR("XEC BBLED pinctrl setup failed (%d)", ret);
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}
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return ret;
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}
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static const struct led_driver_api xec_bbled_api = {
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.on = xec_bbled_on,
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.off = xec_bbled_off,
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.blink = xec_bbled_blink,
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};
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#define XEC_BBLED_PINCTRL_DEF(i) PINCTRL_DT_INST_DEFINE(i)
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#define XEC_BBLED_CONFIG(i) \
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static struct xec_bbled_config xec_bbled_config_##i = { \
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.regs = (struct xec_bbled_regs * const)DT_INST_REG_ADDR(i), \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(i), \
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.pcr_id = (uint8_t)DT_INST_PROP_BY_IDX(i, pcrs, 0), \
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.pcr_pos = (uint8_t)DT_INST_PROP_BY_IDX(i, pcrs, 1), \
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}
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#define XEC_BBLED_DEVICE(i) \
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\
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XEC_BBLED_PINCTRL_DEF(i); \
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\
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XEC_BBLED_CONFIG(i); \
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\
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DEVICE_DT_INST_DEFINE(i, &xec_bbled_init, NULL, \
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NULL, &xec_bbled_config_##i, \
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POST_KERNEL, CONFIG_LED_INIT_PRIORITY, \
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&xec_bbled_api);
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DT_INST_FOREACH_STATUS_OKAY(XEC_BBLED_DEVICE)
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31
dts/bindings/led/microchip,xec-bbled.yaml
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31
dts/bindings/led/microchip,xec-bbled.yaml
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@ -0,0 +1,31 @@
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# Copyright (c) 2022, Microchip Technology Inc.
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# SPDX-License-Identifier: Apache-2.0
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description: Microchip XEC BBLED
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include: [base.yaml, pinctrl-device.yaml]
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compatible: "microchip,xec-bbled"
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properties:
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reg:
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required: true
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interrupts:
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required: true
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pinctrl-0:
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required: false
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pinctrl-names:
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required: false
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girqs:
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type: array
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required: true
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description: Array of pairs of GIRQ number and bit position
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pcrs:
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type: array
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required: true
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description: BBLED PCR register index and bit position
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Loading…
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