From b1ad97bc264c98236ba25a0997e7296babc387c9 Mon Sep 17 00:00:00 2001 From: Peter Marheine Date: Mon, 4 Apr 2022 11:02:57 +1000 Subject: [PATCH] soc/it8xxx2: enable FPU support IT8xxx2 supports the standard 'F' extension for single-precision floating point: select the relevant Kconfig option for the SoC so users can build floating-point code. Signed-off-by: Peter Marheine Change-Id: Ie6da1d38d5654061553cb1ce13b0a0a96aa71ce0 --- soc/riscv/riscv-ite/it8xxx2/Kconfig.series | 1 + 1 file changed, 1 insertion(+) diff --git a/soc/riscv/riscv-ite/it8xxx2/Kconfig.series b/soc/riscv/riscv-ite/it8xxx2/Kconfig.series index 59848b190e..3380dbd872 100644 --- a/soc/riscv/riscv-ite/it8xxx2/Kconfig.series +++ b/soc/riscv/riscv-ite/it8xxx2/Kconfig.series @@ -5,6 +5,7 @@ config SOC_SERIES_RISCV32_IT8XXX2 bool "ITE IT8XXX2 implementation" #depends on RISCV select COMPRESSED_ISA + select CPU_HAS_FPU select SOC_FAMILY_RISCV_ITE help Enable support for ITE IT8XXX2