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drivers: i2c: Add STM32L1X I2C support

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Add I2C support for STM32L1X SoC series based on I2C_STM32_V1
driver.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This commit is contained in:
Manivannan Sadhasivam 2019-01-04 22:05:03 +05:30 committed by Kumar Gala
parent 0525019b23
commit b31adf2d33
5 changed files with 60 additions and 2 deletions
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4
drivers/i2c/Kconfig.stm32
View file

@ -13,8 +13,8 @@ menuconfig I2C_STM32
if I2C_STM32
config I2C_STM32_V1
bool "STM32 V1 Driver (F1/F4X)"
depends on SOC_SERIES_STM32F1X || SOC_SERIES_STM32F4X
bool "STM32 V1 Driver (F1/F4X/L1X)"
depends on SOC_SERIES_STM32F1X || SOC_SERIES_STM32F4X || SOC_SERIES_STM32L1X
select HAS_DTS_I2C
select USE_STM32_LL_I2C
help

27
dts/arm/st/l1/stm32l1.dtsi
View file

@ -8,6 +8,7 @@
#include <arm/armv7-m.dtsi>
#include <dt-bindings/clock/stm32_clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/i2c/i2c.h>
/ {
cpus {
@ -45,6 +46,32 @@
label = "UART_3";
};
i2c1: i2c@40005400 {
compatible = "st,stm32-i2c-v1";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>;
interrupts = <31 0>, <32 0>;
interrupt-names = "event", "error";
status = "disabled";
label= "I2C_1";
};
i2c2: i2c@40005800 {
compatible = "st,stm32-i2c-v1";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
interrupts = <33 0>, <34 0>;
interrupt-names = "event", "error";
status = "disabled";
label= "I2C_2";
};
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;

7
soc/arm/st_stm32/stm32l1/Kconfig.defconfig.series
View file

@ -12,4 +12,11 @@ source "soc/arm/st_stm32/stm32l1/Kconfig.defconfig.stm32l1*"
config SOC_SERIES
default "stm32l1"
if I2C_STM32
config I2C_STM32_V1
default y
endif # I2C_STM32
endif # SOC_SERIES_STM32L1X

20
soc/arm/st_stm32/stm32l1/dts_fixup.h
View file

@ -89,4 +89,24 @@
#define DT_UART_STM32_USART_3_CLOCK_BUS DT_ST_STM32_USART_40004800_CLOCK_BUS
#define DT_UART_STM32_USART_3_HW_FLOW_CONTROL DT_ST_STM32_USART_40004800_HW_FLOW_CONTROL
#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005400_BASE_ADDRESS
#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY
#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V1_40005400_LABEL
#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT
#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR
#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY
#define DT_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V1_40005400_CLOCK_BITS
#define DT_I2C_1_CLOCK_BUS DT_ST_STM32_I2C_V1_40005400_CLOCK_BUS
#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005800_BASE_ADDRESS
#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY
#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY
#define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V1_40005800_LABEL
#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT
#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR
#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY
#define DT_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V1_40005800_CLOCK_BITS
#define DT_I2C_2_CLOCK_BUS DT_ST_STM32_I2C_V1_40005800_CLOCK_BUS
/* End of SoC Level DTS fixup file */

4
soc/arm/st_stm32/stm32l1/soc.h
View file

@ -47,6 +47,10 @@
#include <stm32l1xx_ll_exti.h>
#endif
#ifdef CONFIG_I2C
#include <stm32l1xx_ll_i2c.h>
#endif
#endif /* !_ASMLANGUAGE */
#endif /* _STM32L1_SOC_H_ */