zdsp: add ARC DSPLIB backend for zdsp
Introduce ARC DSPLIB backend zdsp library for ARC target. Add agu and restrict attributes to map with ARC DSPLIB Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
This commit is contained in:
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a0db069978
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b475e1fcbf
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@ -14,7 +14,7 @@ optimized. The status of the various architectures can be found below:
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============ =============
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Architecture Status
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============ =============
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ARC Unoptimized
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ARC Optimized
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ARM Optimized
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ARM64 Optimized
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MIPS Unoptimized
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@ -46,11 +46,13 @@ Optimizing for your architecture
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If your architecture is showing as ``Unoptimized``, it's possible to add a new
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zDSP backend to better support it. To do that, a new Kconfig option should be
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added to `subsys/dsp/Kconfig`_ along with the required dependencies and the
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added to :file:`subsys/dsp/Kconfig` along with the required dependencies and the
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``default`` set for ``DSP_BACKEND`` Kconfig choice.
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Next, the implementation should be added at ``subsys/dsp/<backend>/`` and
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linked in at `subsys/dsp/CMakeLists.txt`_.
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linked in at :file:`subsys/dsp/CMakeLists.txt`. To add architecture-specific attributes,
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its corresponding Kconfig option should be added to :file:`subsys/dsp/Kconfig` and use
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them to update ``DSP_DATA`` and ``DSP_STATIC_DATA`` in :file:`include/zephyr/dsp/dsp.h`.
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API Reference
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*************
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@ -59,3 +61,4 @@ API Reference
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.. _subsys/dsp/Kconfig: https://github.com/zephyrproject-rtos/zephyr/blob/main/subsys/dsp/Kconfig
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.. _subsys/dsp/CMakeLists.txt: https://github.com/zephyrproject-rtos/zephyr/blob/main/subsys/dsp/CMakeLists.txt
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.. _include/zephyr/dsp/dsp.h: https://github.com/zephyrproject-rtos/zephyr/blob/main/include/zephyr/dsp/dsp.h
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@ -17,9 +17,17 @@
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#define DSP_FUNC_SCOPE
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#endif
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#ifdef CONFIG_DSP_BACKEND_HAS_AGU
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#define DSP_DATA __agu
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#else
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#define DSP_DATA
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#endif
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#ifdef CONFIG_DSP_BACKEND_HAS_XDATA_SECTION
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#define DSP_STATIC_DATA DSP_DATA __attribute__((section(".Xdata")))
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#else
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#define DSP_STATIC_DATA DSP_DATA
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#endif
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/**
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* @brief DSP Interface
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@ -28,6 +28,8 @@ else()
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-Xshift_assist -Xfpus_div -Xfpu_mac -Xfpuda -Xfpus_mpy_slow
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-Xfpus_div_slow -Xbitstream -Xtimer0 -Xtimer1)
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zephyr_ld_option_ifdef(CONFIG_SOC_NSIM_EM11D -Hlib=em9d_nrg_fpusp -Hdsplib)
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if(CONFIG_SOC_NSIM_EM11D)
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set_property(GLOBAL PROPERTY z_arc_dsp_options -Xxy -Xagu_large -Hfxapi -Xdsp2
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-Xdsp_accshift=full -Xdsp_divsqrt=radix2 -Xdsp_complex -Xdsp_itu
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@ -2,3 +2,4 @@
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# SPDX-License-Identifier: Apache-2.0
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add_subdirectory_ifdef(CONFIG_DSP_BACKEND_CMSIS cmsis)
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add_subdirectory_ifdef(CONFIG_DSP_BACKEND_ARCMWDT arcmwdt)
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@ -13,9 +13,16 @@ if DSP
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config DSP_BACKEND_HAS_STATIC
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bool
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config DSP_BACKEND_HAS_AGU
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bool
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config DSP_BACKEND_HAS_XDATA_SECTION
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bool
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choice DSP_BACKEND
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prompt "DSP library backend selection"
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default DSP_BACKEND_CMSIS if CMSIS_DSP
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default DSP_BACKEND_ARCMWDT if ARC && "$(ZEPHYR_TOOLCHAIN_VARIANT)" = "arcmwdt"
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default DSP_BACKEND_CUSTOM
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config DSP_BACKEND_CMSIS
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@ -32,6 +39,17 @@ config DSP_BACKEND_CUSTOM
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Rely on the application to provide a custom DSP backend. The implementation should be
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added to the 'zdsp' build target by the application or one of its modules.
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config DSP_BACKEND_ARCMWDT
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bool "Use the mwdt library as the math backend"
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depends on ARCMWDT_LIBC
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depends on CMSIS_DSP
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select DSP_BACKEND_HAS_STATIC
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select DSP_BACKEND_HAS_AGU
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select DSP_BACKEND_HAS_XDATA_SECTION
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help
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Implement the various zephyr DSP functions using the MWDT-DSP library. This feature
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requires the MetaWare toolchain and CMSIS module to be selected.
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endchoice
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endif # DSP
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8
subsys/dsp/arcmwdt/CMakeLists.txt
Normal file
8
subsys/dsp/arcmwdt/CMakeLists.txt
Normal file
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@ -0,0 +1,8 @@
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# Copyright (c) 2022 Synopsys
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# SPDX-License-Identifier: Apache-2.0
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zephyr_include_directories(public)
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zephyr_include_directories_ifdef(CONFIG_DSP_BACKEND_ARCMWDT
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${ARCMWDT_TOOLCHAIN_PATH}/MetaWare/arc/lib/src/dsp/include/
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)
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293
subsys/dsp/arcmwdt/public/zdsp_backend.h
Normal file
293
subsys/dsp/arcmwdt/public/zdsp_backend.h
Normal file
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@ -0,0 +1,293 @@
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/*
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* Copyright (c) 2022 Synopsys
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef SUBSYS_MATH_ARC_BACKEND_PUBLIC_ZDSP_BACKEND_DSP_H_
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#define SUBSYS_MATH_ARC_BACKEND_PUBLIC_ZDSP_BACKEND_DSP_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* This include MUST be done before arm_math.h so we can let the arch specific
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* logic set up the right #define values for arm_math.h
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*/
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#include <zephyr/kernel.h>
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#include <arm_math.h>
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#include "dsplib.h"
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static inline void zdsp_mult_q7(const DSP_DATA q7_t *src_a, const DSP_DATA q7_t *src_b,
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DSP_DATA q7_t *dst, uint32_t block_size)
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{
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dsp_mult_q7(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_mult_q15(const DSP_DATA q15_t *src_a, const DSP_DATA q15_t *src_b,
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DSP_DATA q15_t *dst, uint32_t block_size)
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{
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dsp_mult_q15(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_mult_q31(const DSP_DATA q31_t *src_a, const DSP_DATA q31_t *src_b,
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DSP_DATA q31_t *dst, uint32_t block_size)
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{
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dsp_mult_q31(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_mult_f32(const DSP_DATA float32_t *src_a, const DSP_DATA float32_t *src_b,
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DSP_DATA float32_t *dst, uint32_t block_size)
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{
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dsp_mult_f32(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_add_q7(const DSP_DATA q7_t *src_a, const DSP_DATA q7_t *src_b,
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DSP_DATA q7_t *dst, uint32_t block_size)
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{
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dsp_add_q7(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_add_q15(const DSP_DATA q15_t *src_a, const DSP_DATA q15_t *src_b,
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DSP_DATA q15_t *dst, uint32_t block_size)
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{
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dsp_add_q15(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_add_q31(const DSP_DATA q31_t *src_a, const DSP_DATA q31_t *src_b,
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DSP_DATA q31_t *dst, uint32_t block_size)
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{
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dsp_add_q31(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_add_f32(const DSP_DATA float32_t *src_a, const DSP_DATA float32_t *src_b,
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DSP_DATA float32_t *dst, uint32_t block_size)
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{
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dsp_add_f32(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_sub_q7(const DSP_DATA q7_t *src_a, const DSP_DATA q7_t *src_b,
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DSP_DATA q7_t *dst, uint32_t block_size)
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{
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dsp_sub_q7(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_sub_q15(const DSP_DATA q15_t *src_a, const DSP_DATA q15_t *src_b,
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DSP_DATA q15_t *dst, uint32_t block_size)
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{
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dsp_sub_q15(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_sub_q31(const DSP_DATA q31_t *src_a, const DSP_DATA q31_t *src_b,
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DSP_DATA q31_t *dst, uint32_t block_size)
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{
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dsp_sub_q31(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_sub_f32(const DSP_DATA float32_t *src_a, const DSP_DATA float32_t *src_b,
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DSP_DATA float32_t *dst, uint32_t block_size)
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{
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dsp_sub_f32(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_scale_q7(const DSP_DATA q7_t *src, q7_t scale_fract, int8_t shift,
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DSP_DATA q7_t *dst, uint32_t block_size)
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{
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dsp_scale_q7(src, scale_fract, shift, dst, block_size);
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}
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static inline void zdsp_scale_q15(const DSP_DATA q15_t *src, q15_t scale_fract, int8_t shift,
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DSP_DATA q15_t *dst, uint32_t block_size)
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{
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dsp_scale_q15(src, scale_fract, shift, dst, block_size);
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}
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static inline void zdsp_scale_q31(const DSP_DATA q31_t *src, q31_t scale_fract, int8_t shift,
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DSP_DATA q31_t *dst, uint32_t block_size)
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{
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dsp_scale_q31(src, scale_fract, shift, dst, block_size);
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}
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static inline void zdsp_scale_f32(const DSP_DATA float32_t *src, float32_t scale,
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DSP_DATA float32_t *dst, uint32_t block_size)
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{
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dsp_scale_f32(src, scale, dst, block_size);
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}
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static inline void zdsp_abs_q7(const DSP_DATA q7_t *src, DSP_DATA q7_t *dst, uint32_t block_size)
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{
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dsp_abs_q7(src, dst, block_size);
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}
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static inline void zdsp_abs_q15(const DSP_DATA q15_t *src, DSP_DATA q15_t *dst, uint32_t block_size)
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{
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dsp_abs_q15(src, dst, block_size);
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}
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static inline void zdsp_abs_q31(const DSP_DATA q31_t *src, DSP_DATA q31_t *dst, uint32_t block_size)
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{
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dsp_abs_q31(src, dst, block_size);
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}
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static inline void zdsp_abs_f32(const DSP_DATA float32_t *src, DSP_DATA float32_t *dst,
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uint32_t block_size)
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{
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dsp_abs_f32(src, dst, block_size);
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}
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static inline void zdsp_negate_q7(const DSP_DATA q7_t *src, DSP_DATA q7_t *dst, uint32_t block_size)
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{
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dsp_negate_q7(src, dst, block_size);
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}
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static inline void zdsp_negate_q15(const DSP_DATA q15_t *src, DSP_DATA q15_t *dst,
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uint32_t block_size)
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{
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dsp_negate_q15(src, dst, block_size);
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}
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static inline void zdsp_negate_q31(const DSP_DATA q31_t *src, DSP_DATA q31_t *dst,
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uint32_t block_size)
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{
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dsp_negate_q31(src, dst, block_size);
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}
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static inline void zdsp_negate_f32(const DSP_DATA float32_t *src, DSP_DATA float32_t *dst,
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uint32_t block_size)
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{
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dsp_negate_f32(src, dst, block_size);
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}
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static inline void zdsp_dot_prod_q7(const DSP_DATA q7_t *src_a, const DSP_DATA q7_t *src_b,
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uint32_t block_size, DSP_DATA q31_t *dst)
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{
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dsp_dot_prod_q7(src_a, src_b, block_size, dst);
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}
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static inline void zdsp_dot_prod_q15(const DSP_DATA q15_t *src_a, const DSP_DATA q15_t *src_b,
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uint32_t block_size, DSP_DATA q63_t *dst)
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{
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dsp_dot_prod_q15(src_a, src_b, block_size, dst);
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}
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static inline void zdsp_dot_prod_q31(const DSP_DATA q31_t *src_a, const DSP_DATA q31_t *src_b,
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uint32_t block_size, DSP_DATA q63_t *dst)
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{
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dsp_dot_prod_q31(src_a, src_b, block_size, dst);
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}
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static inline void zdsp_dot_prod_f32(const DSP_DATA float32_t *src_a,
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const DSP_DATA float32_t *src_b, uint32_t block_size,
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DSP_DATA float32_t *dst)
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{
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dsp_dot_prod_f32(src_a, src_b, block_size, dst);
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}
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static inline void zdsp_shift_q7(const DSP_DATA q7_t *src, int8_t shift_bits, DSP_DATA q7_t *dst,
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uint32_t block_size)
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{
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dsp_shift_q7(src, shift_bits, dst, block_size);
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}
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static inline void zdsp_shift_q15(const DSP_DATA q15_t *src, int8_t shift_bits, DSP_DATA q15_t *dst,
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uint32_t block_size)
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{
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dsp_shift_q15(src, shift_bits, dst, block_size);
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}
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static inline void zdsp_shift_q31(const DSP_DATA q31_t *src, int8_t shift_bits, DSP_DATA q31_t *dst,
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uint32_t block_size)
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{
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dsp_shift_q31(src, shift_bits, dst, block_size);
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}
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static inline void zdsp_offset_q7(const DSP_DATA q7_t *src, q7_t offset, DSP_DATA q7_t *dst,
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uint32_t block_size)
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{
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dsp_offset_q7(src, offset, dst, block_size);
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}
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static inline void zdsp_offset_q15(const DSP_DATA q15_t *src, q15_t offset, DSP_DATA q15_t *dst,
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uint32_t block_size)
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{
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dsp_offset_q15(src, offset, dst, block_size);
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}
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static inline void zdsp_offset_q31(const DSP_DATA q31_t *src, q31_t offset, DSP_DATA q31_t *dst,
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uint32_t block_size)
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{
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dsp_offset_q31(src, offset, dst, block_size);
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}
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static inline void zdsp_offset_f32(const DSP_DATA float32_t *src, float32_t offset,
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DSP_DATA float32_t *dst, uint32_t block_size)
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{
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dsp_offset_f32(src, offset, dst, block_size);
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}
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static inline void zdsp_clip_q7(const DSP_DATA q7_t *src, DSP_DATA q7_t *dst, q7_t low, q7_t high,
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uint32_t num_samples)
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{
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arm_clip_q7(src, dst, low, high, num_samples);
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}
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static inline void zdsp_clip_q15(const DSP_DATA q15_t *src, DSP_DATA q15_t *dst, q15_t low,
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q15_t high, uint32_t num_samples)
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{
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arm_clip_q15(src, dst, low, high, num_samples);
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}
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static inline void zdsp_clip_q31(const DSP_DATA q31_t *src, DSP_DATA q31_t *dst, q31_t low,
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q31_t high, uint32_t num_samples)
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{
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arm_clip_q31(src, dst, low, high, num_samples);
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}
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static inline void zdsp_clip_f32(const DSP_DATA float32_t *src, DSP_DATA float32_t *dst,
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float32_t low, float32_t high, uint32_t num_samples)
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{
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arm_clip_f32(src, dst, low, high, num_samples);
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}
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static inline void zdsp_and_u8(const DSP_DATA uint8_t *src_a, const DSP_DATA uint8_t *src_b,
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DSP_DATA uint8_t *dst, uint32_t block_size)
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{
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arm_and_u8(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_and_u16(const DSP_DATA uint16_t *src_a, const DSP_DATA uint16_t *src_b,
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DSP_DATA uint16_t *dst, uint32_t block_size)
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{
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arm_and_u16(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_and_u32(const DSP_DATA uint32_t *src_a, const DSP_DATA uint32_t *src_b,
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DSP_DATA uint32_t *dst, uint32_t block_size)
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{
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arm_and_u32(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_or_u8(const DSP_DATA uint8_t *src_a, const DSP_DATA uint8_t *src_b,
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DSP_DATA uint8_t *dst, uint32_t block_size)
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{
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arm_or_u8(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_or_u16(const DSP_DATA uint16_t *src_a, const DSP_DATA uint16_t *src_b,
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DSP_DATA uint16_t *dst, uint32_t block_size)
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{
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arm_or_u16(src_a, src_b, dst, block_size);
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}
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static inline void zdsp_or_u32(const DSP_DATA uint32_t *src_a, const DSP_DATA uint32_t *src_b,
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||||
DSP_DATA uint32_t *dst, uint32_t block_size)
|
||||
{
|
||||
arm_or_u32(src_a, src_b, dst, block_size);
|
||||
}
|
||||
|
||||
static inline void zdsp_xor_u8(const DSP_DATA uint8_t *src_a, const DSP_DATA uint8_t *src_b,
|
||||
DSP_DATA uint8_t *dst, uint32_t block_size)
|
||||
{
|
||||
arm_xor_u8(src_a, src_b, dst, block_size);
|
||||
}
|
||||
static inline void zdsp_xor_u16(const DSP_DATA uint16_t *src_a, const DSP_DATA uint16_t *src_b,
|
||||
DSP_DATA uint16_t *dst, uint32_t block_size)
|
||||
{
|
||||
arm_xor_u16(src_a, src_b, dst, block_size);
|
||||
}
|
||||
static inline void zdsp_xor_u32(const DSP_DATA uint32_t *src_a, const DSP_DATA uint32_t *src_b,
|
||||
DSP_DATA uint32_t *dst, uint32_t block_size)
|
||||
{
|
||||
arm_xor_u32(src_a, src_b, dst, block_size);
|
||||
}
|
||||
|
||||
static inline void zdsp_not_u8(const DSP_DATA uint8_t *src, DSP_DATA uint8_t *dst,
|
||||
uint32_t block_size)
|
||||
{
|
||||
arm_not_u8(src, dst, block_size);
|
||||
}
|
||||
static inline void zdsp_not_u16(const DSP_DATA uint16_t *src, DSP_DATA uint16_t *dst,
|
||||
uint32_t block_size)
|
||||
{
|
||||
arm_not_u16(src, dst, block_size);
|
||||
}
|
||||
static inline void zdsp_not_u32(const DSP_DATA uint32_t *src, DSP_DATA uint32_t *dst,
|
||||
uint32_t block_size)
|
||||
{
|
||||
arm_not_u32(src, dst, block_size);
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* SUBSYS_MATH_ARC_BACKEND_PUBLIC_ZDSP_BACKEND_DSP_H_ */
|
|
@ -14,3 +14,8 @@ target_sources(app PRIVATE
|
|||
target_sources_ifdef(CONFIG_FP16 app PRIVATE src/f16.c)
|
||||
|
||||
target_include_directories(app PRIVATE ${ZEPHYR_BASE}/tests/lib/cmsis_dsp)
|
||||
|
||||
if(COMPILER STREQUAL arcmwdt)
|
||||
get_property(Z_ARC_DSP_OPTIONS GLOBAL PROPERTY z_arc_dsp_options)
|
||||
target_compile_options(app PRIVATE ${Z_ARC_DSP_OPTIONS})
|
||||
endif()
|
||||
|
|
8
tests/subsys/dsp/basicmath/prj_arc.conf
Normal file
8
tests/subsys/dsp/basicmath/prj_arc.conf
Normal file
|
@ -0,0 +1,8 @@
|
|||
CONFIG_ZTEST=y
|
||||
CONFIG_ZTEST_NEW_API=y
|
||||
CONFIG_ARCMWDT_LIBC=y
|
||||
CONFIG_CPLUSPLUS=y
|
||||
CONFIG_DSP=y
|
||||
CONFIG_CMSIS_DSP=y
|
||||
CONFIG_CMSIS_DSP_BASICMATH=y
|
||||
CONFIG_DSP_BACKEND_ARCMWDT=y
|
|
@ -19,3 +19,8 @@ tests:
|
|||
- CONFIG_FPU=y
|
||||
min_flash: 128
|
||||
min_ram: 64
|
||||
zdsp.basicmath.arcmwdt:
|
||||
filter: CONFIG_ISA_ARCV2
|
||||
toolchain_allow: arcmwdt
|
||||
platform_allow: nsim_em11d
|
||||
extra_args: CONF_FILE=prj_arc.conf
|
||||
|
|
Loading…
Reference in a new issue