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ace: multiprocessing: add polling for core powered up confirmation

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Poll for CPA bit by which HW confirms that the core has been powered up.

Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Co-authored-by: Tomasz Leman <tomasz.m.leman@intel.com>
Co-authored-by: Andrey Borisovich <andrey.borisovich@intel.com>
This commit is contained in:
Rafal Redzimski 2022-03-04 10:08:06 +01:00 committed by Anas Nashif
parent 090b01e73c
commit b49d794966
1 changed files with 14 additions and 0 deletions
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14
soc/xtensa/intel_adsp/ace_v1x/multiprocessing.c
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@ -10,6 +10,9 @@
#include <ace-ipc-regs.h>
#include <cavs-mem.h>
#define CORE_POWER_CHECK_NUM 32
#define CORE_POWER_CHECK_DELAY 256
static void ipc_isr(void *arg)
{
MTL_P2P_IPC[arch_proc_id()].agents[0].ipc.tdr = BIT(31); /* clear BUSY bit */
@ -39,6 +42,8 @@ void soc_mp_init(void)
void soc_start_core(int cpu_num)
{
int retry = CORE_POWER_CHECK_NUM;
if (cpu_num > 0) {
/* Initialize the ROM jump address */
uint32_t *rom_jump_vector = (uint32_t *) ROM_JUMP_ADDR;
@ -50,6 +55,15 @@ void soc_start_core(int cpu_num)
}
MTL_PWRBOOT.capctl[cpu_num].ctl |= MTL_PWRBOOT_CTL_SPA;
/* Waiting for power up */
while (~(MTL_PWRBOOT.capctl[cpu_num].ctl & MTL_PWRBOOT_CTL_CPA) && --retry) {
k_busy_wait(CORE_POWER_CHECK_DELAY);
}
if (!retry) {
__ASSERT(false, "%s secondary core has not powered up", __func__);
}
}
void soc_mp_startup(uint32_t cpu)