soc: same70: enable instruction cache on sam_e70

The Cortex-M7 CPU included in the SAM e70 SoCs has an instruction cache
that significantly boost the performances. Enable it during the SoC
initialization.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2018-11-12 22:19:27 +01:00 committed by Anas Nashif
parent 532550cba1
commit b53c6c1fe3

View file

@ -227,6 +227,8 @@ static int atmel_same70_init(struct device *arg)
key = irq_lock();
SCB_EnableICache();
/* Clear all faults */
_ClearFaults();