diff --git a/drivers/timer/sam0_rtc_timer.c b/drivers/timer/sam0_rtc_timer.c index 6e13126621..ccd763d384 100644 --- a/drivers/timer/sam0_rtc_timer.c +++ b/drivers/timer/sam0_rtc_timer.c @@ -20,7 +20,7 @@ #include /* RTC registers. */ -#define RTC0 ((RtcMode0 *) DT_RTC_SAM0_BASE_ADDRESS) +#define RTC0 ((RtcMode0 *) DT_ATMEL_SAM0_RTC_0_BASE_ADDRESS) /* Number of sys timer cycles per on tick. */ #define CYCLES_PER_TICK (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC \ @@ -155,7 +155,7 @@ int z_clock_driver_init(struct device *device) /* Set up bus clock and GCLK generator. */ PM->APBAMASK.reg |= PM_APBAMASK_RTC; GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(RTC_GCLK_ID) | GCLK_CLKCTRL_CLKEN - | GCLK_GEN(DT_RTC_SAM0_CLOCK_GENERATOR); + | GCLK_GEN(DT_ATMEL_SAM0_RTC_0_CLOCK_GENERATOR); while (GCLK->STATUS.bit.SYNCBUSY) { /* Synchronize GCLK. */ @@ -191,9 +191,10 @@ int z_clock_driver_init(struct device *device) RTC0->CTRL.reg |= RTC_MODE0_CTRL_ENABLE; /* Enable RTC interrupt. */ - NVIC_ClearPendingIRQ(DT_RTC_SAM0_IRQ); - IRQ_CONNECT(DT_RTC_SAM0_IRQ, DT_RTC_SAM0_IRQ_PRIORITY, rtc_isr, 0, 0); - irq_enable(DT_RTC_SAM0_IRQ); + NVIC_ClearPendingIRQ(DT_ATMEL_SAM0_RTC_0_IRQ_0); + IRQ_CONNECT(DT_ATMEL_SAM0_RTC_0_IRQ_0, + DT_ATMEL_SAM0_RTC_0_IRQ_0_PRIORITY, rtc_isr, 0, 0); + irq_enable(DT_ATMEL_SAM0_RTC_0_IRQ_0); return 0; } diff --git a/soc/arm/atmel_sam0/samd20/dts_fixup.h b/soc/arm/atmel_sam0/samd20/dts_fixup.h index 972712eae5..699ad4aaa2 100644 --- a/soc/arm/atmel_sam0/samd20/dts_fixup.h +++ b/soc/arm/atmel_sam0/samd20/dts_fixup.h @@ -84,11 +84,6 @@ #define CONFIG_WDT_0_NAME DT_ATMEL_SAM0_WATCHDOG_0_LABEL -#define DT_RTC_SAM0_BASE_ADDRESS DT_ATMEL_SAM0_RTC_40001400_BASE_ADDRESS -#define DT_RTC_SAM0_IRQ DT_ATMEL_SAM0_RTC_40001400_IRQ_0 -#define DT_RTC_SAM0_IRQ_PRIORITY DT_ATMEL_SAM0_RTC_40001400_IRQ_0_PRIORITY -#define DT_RTC_SAM0_CLOCK_GENERATOR DT_ATMEL_SAM0_RTC_40001400_CLOCK_GENERATOR - #define DT_NUM_IRQ_PRIO_BITS DT_ARM_V6M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS /* End of SoC Level DTS fixup file */ diff --git a/soc/arm/atmel_sam0/samd21/dts_fixup.h b/soc/arm/atmel_sam0/samd21/dts_fixup.h index a6d73ef3e3..514043c7f6 100644 --- a/soc/arm/atmel_sam0/samd21/dts_fixup.h +++ b/soc/arm/atmel_sam0/samd21/dts_fixup.h @@ -96,11 +96,6 @@ #define CONFIG_WDT_0_NAME DT_ATMEL_SAM0_WATCHDOG_0_LABEL -#define DT_RTC_SAM0_BASE_ADDRESS DT_ATMEL_SAM0_RTC_40001400_BASE_ADDRESS -#define DT_RTC_SAM0_IRQ DT_ATMEL_SAM0_RTC_40001400_IRQ_0 -#define DT_RTC_SAM0_IRQ_PRIORITY DT_ATMEL_SAM0_RTC_40001400_IRQ_0_PRIORITY -#define DT_RTC_SAM0_CLOCK_GENERATOR DT_ATMEL_SAM0_RTC_40001400_CLOCK_GENERATOR - #define DT_USB_DC_SAM0_BASE_ADDRESS DT_ATMEL_SAM0_USB_41005000_BASE_ADDRESS #define DT_USB_DC_SAM0_IRQ DT_ATMEL_SAM0_USB_41005000_IRQ_0 #define DT_USB_DC_SAM0_IRQ_PRIORITY DT_ATMEL_SAM0_USB_41005000_IRQ_0_PRIORITY diff --git a/soc/arm/atmel_sam0/samr21/dts_fixup.h b/soc/arm/atmel_sam0/samr21/dts_fixup.h index a896852ec2..413d616cc5 100644 --- a/soc/arm/atmel_sam0/samr21/dts_fixup.h +++ b/soc/arm/atmel_sam0/samr21/dts_fixup.h @@ -100,11 +100,6 @@ #define CONFIG_WDT_0_NAME DT_ATMEL_SAM0_WATCHDOG_0_LABEL -#define DT_RTC_SAM0_BASE_ADDRESS DT_ATMEL_SAM0_RTC_40001400_BASE_ADDRESS -#define DT_RTC_SAM0_IRQ DT_ATMEL_SAM0_RTC_40001400_IRQ_0 -#define DT_RTC_SAM0_IRQ_PRIORITY DT_ATMEL_SAM0_RTC_40001400_IRQ_0_PRIORITY -#define DT_RTC_SAM0_CLOCK_GENERATOR DT_ATMEL_SAM0_RTC_40001400_CLOCK_GENERATOR - #define DT_USB_DC_SAM0_BASE_ADDRESS DT_ATMEL_SAM0_USB_41005000_BASE_ADDRESS #define DT_USB_DC_SAM0_IRQ DT_ATMEL_SAM0_USB_41005000_IRQ_0 #define DT_USB_DC_SAM0_IRQ_PRIORITY DT_ATMEL_SAM0_USB_41005000_IRQ_0_PRIORITY