soc: x86: raptor_lake: soc_gpio : Modified to support RPL-P
Added Modifications to support RPL-P platform. Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
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@ -15,14 +15,22 @@
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#ifndef __SOC_GPIO_H_
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#define __SOC_GPIO_H_
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#if defined(CONFIG_BOARD_INTEL_RPL_S_CRB)
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#define GPIO_INTEL_NR_SUBDEVS 13
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#define REG_PAD_OWNER_BASE 0x00A0
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#define REG_GPI_INT_STS_BASE 0x0200
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#define PAD_CFG0_PMODE_MASK (0x07 << 10)
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#define REG_GPI_INT_EN_BASE 0x0220
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#define REG_PAD_HOST_SW_OWNER 0x150
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#elif defined(CONFIG_BOARD_INTEL_RPL_P_CRB)
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#define GPIO_INTEL_NR_SUBDEVS 11
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#define REG_PAD_OWNER_BASE 0x0020
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#define REG_GPI_INT_STS_BASE 0x0100
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#define REG_GPI_INT_EN_BASE 0x0120
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#define REG_PAD_HOST_SW_OWNER 0x0B0
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#endif
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#define PAD_CFG0_PMODE_MASK (0x07 << 10)
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#define PAD_BASE_ADDR_MASK 0xfff
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#define GPIO_REG_BASE(reg_base) \
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