drivers: gpio: gpio_mcux_lpc: remove PINT code
Remove PINT management code from the LPC GPIO driver, as this code is now contained within the PINT interrupt controller driver, which exposes an interface to install interrupt callbacks. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse
David Leach
parent
6f938f347b
commit
b8a99a27cc
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2020, NXP
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* Copyright 2017-2020,2023 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -21,30 +21,14 @@
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#include <soc.h>
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#include <fsl_common.h>
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#include <zephyr/drivers/gpio/gpio_utils.h>
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#include <zephyr/drivers/interrupt_controller/nxp_pint.h>
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#include <fsl_gpio.h>
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#include <fsl_pint.h>
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#include <fsl_inputmux.h>
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#include <fsl_device_registers.h>
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#define PIN_TO_INPUT_MUX_CONNECTION(port, pin) \
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((PINTSEL_PMUX_ID << PMUX_SHIFT) + (32 * port) + (pin))
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#ifndef FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS
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#define FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS 0
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#endif
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#ifndef FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS
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#define FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS 0
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#endif
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#define NO_PINT_INT \
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MAX(FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS, \
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FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS)
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struct gpio_mcux_lpc_config {
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/* gpio_driver_config needs to be first */
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struct gpio_driver_config common;
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GPIO_Type *gpio_base;
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PINT_Type *pint_base;
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#ifdef IOPCTL
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IOPCTL_Type *pinmux_base;
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#else
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@ -59,12 +43,6 @@ struct gpio_mcux_lpc_data {
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struct gpio_driver_data common;
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/* port ISR callback routine address */
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sys_slist_t callbacks;
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/* pin association with PINT id */
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pint_pin_int_t pint_id[32];
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/* ISR allocated in device tree to this port */
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uint32_t isr_list[INPUTMUX_PINTSEL_COUNT];
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/* index to to table above */
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uint32_t isr_list_idx;
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};
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static int gpio_mcux_lpc_configure(const struct device *dev, gpio_pin_t pin,
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@ -211,83 +189,23 @@ static int gpio_mcux_lpc_port_toggle_bits(const struct device *dev,
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return 0;
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}
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static void gpio_mcux_lpc_port_isr(const struct device *dev)
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/* Called by PINT when pin interrupt fires */
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static void gpio_mcux_lpc_pint_cb(uint8_t pin, void *user)
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{
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const struct device *dev = user;
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const struct gpio_mcux_lpc_config *config = dev->config;
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struct gpio_mcux_lpc_data *data = dev->data;
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uint32_t enabled_int;
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uint32_t int_flags;
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uint32_t pin;
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uint32_t gpio_pin;
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for (pin = 0; pin < 32; pin++) {
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if (data->pint_id[pin] != NO_PINT_INT) {
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int_flags = PINT_PinInterruptGetStatus(
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config->pint_base, data->pint_id[pin]);
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enabled_int = int_flags << pin;
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if (int_flags) {
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PINT_PinInterruptClrStatus(config->pint_base,
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data->pint_id[pin]);
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}
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gpio_fire_callbacks(&data->callbacks, dev, enabled_int);
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}
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}
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}
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static uint32_t get_free_isr(struct gpio_mcux_lpc_data *data)
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{
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uint32_t i;
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uint32_t isr;
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for (i = 0; i < data->isr_list_idx; i++) {
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if (data->isr_list[i] != -1) {
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isr = data->isr_list[i];
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data->isr_list[i] = -1;
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return isr;
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}
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}
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return -EINVAL;
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}
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/* Function configures INPUTMUX device to route pin interrupts to a certain
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* PINT. PINT no. is unknown, rather it's determined from ISR no.
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*/
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static uint32_t attach_pin_to_isr(uint32_t port, uint32_t pin, uint32_t isr_no)
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{
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uint32_t pint_idx;
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/* Connect trigger sources to PINT */
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INPUTMUX_Init(INPUTMUX);
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/* Code asumes PIN_INT values are grouped [0..3] and [4..7].
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* This scenario is true in LPC54xxx/LPC55xxx.
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/* Subtract port number times 32 from pin number to get GPIO API
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* pin number.
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*/
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#if (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 8)
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#error having more than 8 PINT IRQs not supported in driver
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#elif (FSL_FEATURE_PINT_NUMBER_OF_CONNECTED_OUTPUTS > 4)
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if (isr_no < PIN_INT4_IRQn) {
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pint_idx = isr_no - PIN_INT0_IRQn;
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} else {
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pint_idx = isr_no - PIN_INT4_IRQn + 4;
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}
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#else
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pint_idx = isr_no - PIN_INT0_IRQn;
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#endif
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gpio_pin = pin - (config->port_no * 32);
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INPUTMUX_AttachSignal(INPUTMUX, pint_idx,
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PIN_TO_INPUT_MUX_CONNECTION(port, pin));
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/* Turnoff clock to inputmux to save power. Clock is only needed to make
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* changes. Can be turned off after.
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*/
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INPUTMUX_Deinit(INPUTMUX);
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return pint_idx;
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gpio_fire_callbacks(&data->callbacks, dev, BIT(gpio_pin));
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}
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static void gpio_mcux_lpc_port_isr(const struct device *dev);
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static int gpio_mcux_lpc_pin_interrupt_configure(const struct device *dev,
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gpio_pin_t pin,
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@ -295,13 +213,10 @@ static int gpio_mcux_lpc_pin_interrupt_configure(const struct device *dev,
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enum gpio_int_trig trig)
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{
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const struct gpio_mcux_lpc_config *config = dev->config;
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struct gpio_mcux_lpc_data *data = dev->data;
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pint_pin_enable_t interruptMode = kPINT_PinIntEnableNone;
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enum nxp_pint_trigger interrupt_mode = NXP_PINT_NONE;
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GPIO_Type *gpio_base = config->gpio_base;
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uint32_t port = config->port_no;
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uint32_t isr;
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uint32_t pint_idx;
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static bool pint_inited;
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int ret;
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/* Ensure pin used as interrupt is set as input*/
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if ((mode & GPIO_INT_ENABLE) &&
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@ -311,50 +226,39 @@ static int gpio_mcux_lpc_pin_interrupt_configure(const struct device *dev,
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switch (mode) {
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case GPIO_INT_MODE_DISABLED:
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interruptMode = kPINT_PinIntEnableNone;
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break;
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nxp_pint_pin_disable((config->port_no * 32) + pin);
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return 0;
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case GPIO_INT_MODE_LEVEL:
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if (trig == GPIO_INT_TRIG_HIGH) {
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interruptMode = kPINT_PinIntEnableHighLevel;
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interrupt_mode = NXP_PINT_HIGH;
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} else if (trig == GPIO_INT_TRIG_LOW) {
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interruptMode = kPINT_PinIntEnableLowLevel;
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interrupt_mode = NXP_PINT_LOW;
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} else {
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return -ENOTSUP;
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}
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break;
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case GPIO_INT_MODE_EDGE:
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if (trig == GPIO_INT_TRIG_HIGH) {
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interruptMode = kPINT_PinIntEnableRiseEdge;
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interrupt_mode = NXP_PINT_RISING;
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} else if (trig == GPIO_INT_TRIG_LOW) {
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interruptMode = kPINT_PinIntEnableFallEdge;
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interrupt_mode = NXP_PINT_FALLING;
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} else {
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interruptMode = kPINT_PinIntEnableBothEdges;
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interrupt_mode = NXP_PINT_BOTH;
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}
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break;
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default:
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return -ENOTSUP;
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}
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/* First time calling this function routes PIN->PINT->INPUTMUX->NVIC */
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if (data->pint_id[pin] == NO_PINT_INT) {
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isr = get_free_isr(data);
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if (isr == -EINVAL) {
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/* Didn't find any free interrupt in this port */
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return -EBUSY;
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}
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pint_idx = attach_pin_to_isr(port, pin, isr);
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data->pint_id[pin] = pint_idx;
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/* PINT treats GPIO pins as continuous. Each port has 32 pins */
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ret = nxp_pint_pin_enable((config->port_no * 32) + pin, interrupt_mode);
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if (ret < 0) {
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return ret;
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}
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if (!pint_inited) {
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PINT_Init(config->pint_base);
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pint_inited = true;
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}
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PINT_PinInterruptConfig(config->pint_base, data->pint_id[pin],
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interruptMode,
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(pint_cb_t)gpio_mcux_lpc_port_isr);
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return 0;
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/* Install callback */
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return nxp_pint_pin_set_callback((config->port_no * 32) + pin,
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gpio_mcux_lpc_pint_cb,
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(struct device *)dev);
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}
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static int gpio_mcux_lpc_manage_cb(const struct device *port,
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@ -368,17 +272,9 @@ static int gpio_mcux_lpc_manage_cb(const struct device *port,
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static int gpio_mcux_lpc_init(const struct device *dev)
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{
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const struct gpio_mcux_lpc_config *config = dev->config;
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struct gpio_mcux_lpc_data *data = dev->data;
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int i;
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GPIO_PortInit(config->gpio_base, config->port_no);
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for (i = 0; i < 32; i++) {
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data->pint_id[i] = NO_PINT_INT;
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}
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data->isr_list_idx = 0;
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return 0;
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}
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@ -401,20 +297,6 @@ static const clock_ip_name_t gpio_clock_names[] = GPIO_CLOCKS;
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#define PINMUX_BASE IOCON
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#endif
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#define GPIO_MCUX_LPC_IRQ_CONNECT(n, m) \
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do { \
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struct gpio_mcux_lpc_data *data = dev->data; \
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IRQ_CONNECT(DT_INST_IRQ_BY_IDX(n, m, irq), \
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DT_INST_IRQ_BY_IDX(n, m, priority), \
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gpio_mcux_lpc_port_isr, DEVICE_DT_INST_GET(n), 0); \
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irq_enable(DT_INST_IRQ_BY_IDX(n, m, irq)); \
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data->isr_list[data->isr_list_idx++] = DT_INST_IRQ_BY_IDX(n, m, irq); \
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} while (false)
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#define GPIO_MCUX_LPC_IRQ(idx, inst) \
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COND_CODE_1(DT_INST_IRQ_HAS_IDX(inst, idx), \
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(GPIO_MCUX_LPC_IRQ_CONNECT(inst, idx)), ())
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#define GPIO_MCUX_LPC(n) \
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static int lpc_gpio_init_##n(const struct device *dev); \
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@ -424,7 +306,6 @@ static const clock_ip_name_t gpio_clock_names[] = GPIO_CLOCKS;
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.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(n), \
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}, \
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.gpio_base = GPIO, \
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.pint_base = PINT, /* TODO: SECPINT issue #16330 */ \
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.pinmux_base = PINMUX_BASE, \
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.port_no = DT_INST_PROP(n, port), \
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.clock_ip_name = gpio_clock_names[DT_INST_PROP(n, port)], \
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@ -442,8 +323,6 @@ static const clock_ip_name_t gpio_clock_names[] = GPIO_CLOCKS;
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{ \
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gpio_mcux_lpc_init(dev); \
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\
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LISTIFY(8, GPIO_MCUX_LPC_IRQ, (;), n) \
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\
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return 0; \
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}
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