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include: dt-bindings: F4 clocks: Add PLLI2S as source clock

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Add PLLI2S R as I2S source clock.
For now I2S_CKIN (fixed clock) is not supported.

This change only consider F401 and compatible PLL I2S implementations.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2023-02-28 11:43:34 +01:00 committed by Carles Cufí
parent e04ff4c3db
commit b934ad8cb9
2 changed files with 19 additions and 6 deletions
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5
include/zephyr/dt-bindings/clock/stm32f410_clock.h
View file

@ -26,4 +26,9 @@
#define SDIO_SEL(val) STM32_CLOCK(val, 1, 28, DCKCFGR2_REG)
#define LPTIM1_SEL(val) STM32_CLOCK(val, 3, 30, DCKCFGR2_REG)
/* F4 generic I2S_SEL is not compatible with F410 devices */
#ifdef I2S_SEL
#undef I2S_SEL
#endif
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32F410_CLOCK_H_ */

20
include/zephyr/dt-bindings/clock/stm32f4_clock.h
View file

@ -23,14 +23,18 @@
/* RM0386, 0390, 0402, 0430 § Dedicated Clock configuration register (RCC_DCKCFGRx) */
/** PLL clock outputs */
#define STM32_SRC_PLL_P 0x001
#define STM32_SRC_PLL_Q 0x002
#define STM32_SRC_PLL_R 0x003
#define STM32_SRC_PLL_P 0x001
#define STM32_SRC_PLL_Q 0x002
#define STM32_SRC_PLL_R 0x003
/** Fixed clocks */
#define STM32_SRC_LSE 0x004
#define STM32_SRC_LSI 0x005
#define STM32_SRC_LSE 0x004
#define STM32_SRC_LSI 0x005
/** System clock */
#define STM32_SRC_SYSCLK 0x006
#define STM32_SRC_SYSCLK 0x006
/** I2S sources */
#define STM32_SRC_PLLI2S_R 0x007
/* I2S_CKIN not supported yet */
/* #define STM32_SRC_I2S_CKIN 0x008 */
/**
* @brief STM32 clock configuration bit field.
@ -61,10 +65,14 @@
(((mask) & STM32_CLOCK_MASK_MASK) << STM32_CLOCK_MASK_SHIFT) | \
(((val) & STM32_CLOCK_VAL_MASK) << STM32_CLOCK_VAL_SHIFT))
/** @brief RCC_CFGR register offset */
#define CFGR_REG 0x08
/** @brief RCC_BDCR register offset */
#define BDCR_REG 0x70
/** @brief Device domain clocks selection helpers */
/** CFGR devices */
#define I2S_SEL(val) STM32_CLOCK(val, 1, 23, CFGR_REG)
/** BDCR devices */
#define RTC_SEL(val) STM32_CLOCK(val, 3, 8, BDCR_REG)