samples: tests: additional overlay and conf file adjustments
Adjustments of overlay and conf files to adjust for the MERGE removal. The revert of MERGE requires specific overlay and conf files for boards which relied on the MERGE feature. Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
This commit is contained in:
Torsten Rasmussen
Carles Cufí
parent
abca917055
commit
b9f3d68863
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@ -1,34 +0,0 @@
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/*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Copyright 2021,2023 NXP
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*/
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#include <zephyr/dt-bindings/adc/mcux-lpadc.h>
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/ {
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zephyr,user {
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/* adjust channel number according to pinmux in board.dts */
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io-channels = <&lpadc0 0>;
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};
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};
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&lpadc0 {
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#address-cells = <1>;
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#size-cells = <0>;
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/*
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* To use this sample:
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* - Connect LPADC0 CH0 signal to voltage between 0~1.8V (J9 pin 10)
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*/
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channel@0 {
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reg = <0>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,reference = "ADC_REF_EXTERNAL0";
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zephyr,vref-mv = <1800>;
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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zephyr,resolution = <12>;
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zephyr,input-positive = <MCUX_LPADC_CH0A>;
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};
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};
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6
samples/modules/lvgl/demos/boards/native_sim_64.overlay
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6
samples/modules/lvgl/demos/boards/native_sim_64.overlay
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/*
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* Copyright (c) 2023, Fabian Blatz <fabianblatz@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "native_posix.overlay"
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CONFIG_FXOS8700_TRIGGER_OWN_THREAD=n
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CONFIG_FXOS8700_TRIGGER_NONE=y
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CONFIG_FXOS8700_TRIGGER_OWN_THREAD=n
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CONFIG_FXOS8700_TRIGGER_NONE=y
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CONFIG_INCLUDE_REMOTE_DIR=y
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CONFIG_SECOND_CORE_MCUX=y
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/*
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* Copyright (c) 2022 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
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/ {
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chosen {
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zephyr,ipc_shm = &ocram2_overlay;
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};
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/* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
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* Define a subset of the OCRAM2 region for demo to use
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* Note that shared memory must have specific MPU attributes set.
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*/
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ocram2_overlay: memory@202c0000{
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x202c0000 DT_SIZE_K(16)>;
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zephyr,memory-region="OCRAM2_OVERLAY";
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
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};
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};
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/*
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* Copyright 2022-2023 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
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/ {
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/* Switch to lpuart2, since primary core uses lpuart1 */
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chosen {
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zephyr,flash = &ocram;
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zephyr,console = &lpuart2;
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zephyr,shell-uart = &lpuart2;
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zephyr,ipc_shm = &ocram2_overlay;
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};
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soc {
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/delete-node/ gpt@400f0000;
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/* Replace GPT2 with another GPT kernel timer */
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gpt2_hw_timer:gpt@400f0000 {
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compatible = "nxp,gpt-hw-timer";
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reg = <0x400f0000 0x4000>;
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interrupts = <120 0>;
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status = "okay";
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};
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};
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/* OpenAMP fails with full 512K OCRAM2 memory region as shared memory.
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* Define a subset of the OCRAM2 region for demo to use
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* Note that shared memory must have specific MPU attributes set
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*/
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ocram2_overlay: memory@202c0000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x202c0000 DT_SIZE_K(16)>;
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zephyr,memory-region="OCRAM2_OVERLAY";
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
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};
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};
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/* Enable secondary LPUART */
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&lpuart2 {
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status = "okay";
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current-speed = <115200>;
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};
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/* Disable primary GPT timer */
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&gpt_hw_timer {
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status = "disabled";
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};
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7
tests/drivers/adc/adc_api/boards/native_posix_64.overlay
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7
tests/drivers/adc/adc_api/boards/native_posix_64.overlay
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/*
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* Copyright 2023 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "native_posix.overlay"
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7
tests/drivers/adc/adc_api/boards/native_sim_64.overlay
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7
tests/drivers/adc/adc_api/boards/native_sim_64.overlay
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/*
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* Copyright 2023 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "native_posix.overlay"
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CONFIG_CODE_DATA_RELOCATION=y
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CONFIG_MEM_ATTR_HEAP=y
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CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="SRAM1"
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/*
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* Copyright (c) 2022 Kumar Gala <galak@kernel.org>
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* Copyright (c) 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
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&sram1 {
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
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};
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tst_dma0: &edma_lpsr0 { };
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CONFIG_CODE_DATA_RELOCATION=y
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CONFIG_MEM_ATTR_HEAP=y
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CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="DTCM"
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/*
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* Copyright (c) 2022 Kumar Gala <galak@kernel.org>
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* Copyright (c) 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
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&dtcm {
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
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};
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tst_dma0: &edma0 { };
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CONFIG_CODE_DATA_RELOCATION=y
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CONFIG_NOCACHE_MEMORY=y
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CONFIG_MEM_ATTR_HEAP=y
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CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="SRAM1"
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/*
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* Copyright (c) 2022 Kumar Gala <galak@kernel.org>
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* Copyright (c) 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
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&sram1 {
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
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};
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tst_dma0: &edma_lpsr0 { };
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/*
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* Copyright (c) 2022 Kumar Gala <galak@kernel.org>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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dma0: &edma0 { };
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/*
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* Copyright (c) 2023 Meta
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "native_sim.overlay"
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CONFIG_CODE_DATA_RELOCATION=y
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CONFIG_MEM_ATTR_HEAP=y
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CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="SRAM1"
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/*
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* Copyright (c) 2022 Kumar Gala <galak@kernel.org>
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* Copyright (c) 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
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&sram1 {
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
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};
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tst_dma0: &edma_lpsr0 { };
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CONFIG_CODE_DATA_RELOCATION=y
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CONFIG_MEM_ATTR_HEAP=y
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CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="ITCM"
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/*
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* Copyright (c) 2022 Kumar Gala <galak@kernel.org>
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* Copyright (c) 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
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&itcm {
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
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};
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tst_dma0: &edma0 { };
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CONFIG_CODE_DATA_RELOCATION=y
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CONFIG_MEM_ATTR_HEAP=y
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CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION="SRAM1"
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/*
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* Copyright (c) 2022 Kumar Gala <galak@kernel.org>
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* Copyright (c) 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
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&sram1 {
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
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};
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tst_dma0: &edma_lpsr0 { };
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/* SPDX-License-Identifier: Apache-2.0 */
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dut: &lpuart2 {
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status = "okay";
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current-speed = <115200>;
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nxp,loopback;
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};
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/* SPDX-License-Identifier: Apache-2.0 */
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/ {
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chosen {
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zephyr,sram = &dtcm;
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};
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};
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dut: &lpuart2 {
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status = "okay";
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current-speed = <115200>;
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nxp,loopback;
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};
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/* SPDX-License-Identifier: Apache-2.0 */
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dut: &lpuart2 {
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status = "okay";
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current-speed = <115200>;
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nxp,loopback;
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};
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