scripts: gen_defines: re-work write_regs() with augmented nodes
Group the macros together by namespace rather than putting all the BASE_ADDRESS macros together and all the SIZE macros together. E.g., all the DT_INST_<x> namespace macros for each node now appear consecutively. Add a comment making it clear that this output comes from "regs", since "BASE_ADDRESS" and "SIZE" are not property names. Other than the order in which they appear and comments, the output before and after this patch should be exactly the same. Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
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@ -1,6 +1,6 @@
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#!/usr/bin/env python3
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# Copyright (c) 2019 Nordic Semiconductor ASA
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# Copyright (c) 2019 - 2020 Nordic Semiconductor ASA
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# Copyright (c) 2019 Linaro Limited
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# SPDX-License-Identifier: BSD-3-Clause
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@ -278,25 +278,74 @@ def relativize(path):
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def write_regs(node):
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# Writes address/size output for the registers in the node's 'reg' property
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# Writes address/size output for the registers in the node's 'reg'
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# property. This is where the BASE_ADDRESS and SIZE macros come from.
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def write_reg(reg, base_ident, val):
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# Drop '_0' from the identifier if there's a single register, for
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# backwards compatibility
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if len(reg.node.regs) > 1:
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ident = f"{base_ident}_{reg.node.regs.index(reg)}"
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if not node.regs:
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return
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# This maps a reg_i (see below) to the "primary" BASE_ADDRESS and SIZE
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# macros used to identify it, which look like:
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#
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# DT_<PRIMARY_NODE_IDENTIFIER>_BASE_ADDRESS_<reg_i>
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# DT_<PRIMARY_NODE_IDENTIFIER>_SIZE_<reg_i>
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#
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# Or, for backwards compatibility if there's only one reg:
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#
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# DT_<IDENT>_BASE_ADDRESS
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# DT_<IDENT>_SIZE
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#
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# It's up to augment_node() to decide which identifier for the
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# node is its "primary" identifier, and which identifiers are
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# "other" identifiers. The "other" identifier BASE_ADDRESS and
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# SIZE macros are defined in terms of the "primary" ones.
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reg_i2primary_addr_size = {}
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def write_regs_for_ident(node, ident):
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# Write BASE_ADDRESS and SIZE macros for a given identifier
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# 'ident'. If we have already generated primary address and
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# size macros and saved in them in primary_addrs and
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# primary_sizes, we just reuse those. Otherwise (i.e. the
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# first time this is called), they are generated from the
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# actual reg.addr and reg.size attributes, and the names of
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# the primary macros are saved.
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for reg_i, reg in enumerate(node.regs):
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# DT_<IDENT>_BASE_ADDRESS_<reg_i>
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# DT_<IDENT>_SIZE_<reg_i>
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prim_addr, prim_size = reg_i2primary_addr_size.get(reg_i,
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(None, None))
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suffix = f"_{reg_i}" if len(node.regs) > 1 else ""
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if prim_addr is not None:
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write_reg(ident, reg, prim_addr, prim_size,
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"", suffix)
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else:
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prim_addr, prim_size = write_reg(ident, reg, None, None,
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"", suffix)
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reg_i2primary_addr_size[reg_i] = (prim_addr, prim_size)
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# DT_<IDENT>_<reg.name>_BASE_ADDRESS
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# DT_<IDENT>_<reg.name>_SIZE
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if reg.name:
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write_reg(ident, reg, prim_addr, prim_size,
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f"{str2ident(reg.name)}_", "")
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def write_reg(ident, reg, prim_addr, prim_size, prefix, suffix):
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addr = hex(reg.addr) if prim_addr is None else prim_addr
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size = reg.size if prim_size is None else prim_size
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addr_ret = out(f"{ident}_{prefix}BASE_ADDRESS{suffix}", addr)
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if size is not None and size != 0:
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size_ret = out(f"{ident}_{prefix}SIZE{suffix}", size)
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else:
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ident = base_ident
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size_ret = None
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out_node(node, ident, val,
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# Name alias from 'reg-names = ...'
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f"{str2ident(reg.name)}_{base_ident}" if reg.name else None)
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for reg in node.regs:
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write_reg(reg, "BASE_ADDRESS", hex(reg.addr))
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if reg.size:
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write_reg(reg, "SIZE", reg.size)
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return (addr_ret, size_ret)
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out_comment("BASE_ADDRESS and SIZE macros from the 'reg' property",
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blank_before=False)
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for_each_ident(node, write_regs_for_ident)
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def write_props(node):
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# Writes any properties defined in the "properties" section of the binding
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