ethernet/dw: remove kconfigs that are SoC specific

Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.

Change-Id: Ib483419be5199b52cf281b4b106cd8a3be95b7be
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2016-04-05 12:53:03 -07:00 committed by Anas Nashif
parent 1bdc6f8b22
commit ba4099430b
4 changed files with 27 additions and 63 deletions

View file

@ -273,10 +273,6 @@ config ETH_DW_0
if ETH_DW_0
config ETH_DW_0_BASE_ADDR
default 0x90002000
config ETH_DW_0_IRQ
default 18
config ETH_DW_0_IRQ_SHARED_NAME
default SHARED_IRQ_0_NAME if SHARED_IRQ

View file

@ -36,6 +36,21 @@
#include <drivers/ioapic.h>
#endif
/*
* Ethernet (DesignWare)
*/
#define ETH_DW_PCI_VENDOR_ID 0x8086
#define ETH_DW_PCI_DEVICE_ID 0x0937
#define ETH_DW_PCI_CLASS 0x02
#define ETH_DW_0_BASE_ADDR 0x90002000
#define ETH_DW_0_IRQ 18
#define ETH_DW_0_PCI_BUS 0
#define ETH_DW_0_PCI_DEV 20
#define ETH_DW_0_PCI_FUNCTION 6
#define ETH_DW_0_PCI_BAR 0
/*
* GPIO
*/

View file

@ -29,21 +29,6 @@ config ETH_DW_SHARED_IRQ
bool
default n
config ETH_DW_VENDOR_ID
hex "PCI Vendor ID"
depends on PCI
default 0x8086
config ETH_DW_DEVICE_ID
hex "PCI Device ID"
depends on PCI
default 0x937
config ETH_DW_CLASS
hex "PCI class"
depends on PCI
default 0x02
config ETH_DW_0
bool "Synopsys DesignWare Ethernet port 0"
default n
@ -55,31 +40,6 @@ config ETH_DW_0_NAME
depends on ETH_DW_0
default "ETH_0"
config ETH_DW_0_BASE_ADDR
hex "MAC base address"
depends on ETH_DW_0
default 0x00000000
config ETH_DW_0_BUS
int "Port 0 PCI bus number"
depends on ETH_DW_0 && PCI
default 0
config ETH_DW_0_DEV
int "Port 0 PCI device number"
depends on ETH_DW_0 && PCI
default 20
config ETH_DW_0_FUNCTION
int "Port 0 PCI function number"
depends on ETH_DW_0 && PCI
default 6
config ETH_DW_0_BAR
int "Port 0 PCI BAR slot"
depends on ETH_DW_0 && PCI
default 0
choice
prompt "Port 0 Interrupts via"
default ETH_DW_0_IRQ_SHARED
@ -108,14 +68,7 @@ config ETH_DW_0_IRQ_SHARED_NAME
this driver with the shared IRQ driver, so interrupts can be dispatched
correctly.
config ETH_DW_0_IRQ
int "Controller interrupt number"
depends on ETH_DW_0 && ETH_DW_0_IRQ_DIRECT
default 0
help
IRQ number for the controller
config ETH_DW_0_PRI
config ETH_DW_0_IRQ_PRI
int "Controller interrupt priority"
depends on ETH_DW_0 && ETH_DW_0_IRQ_DIRECT
default 0

View file

@ -283,18 +283,18 @@ static int eth_initialize(struct device *port)
static void eth_config_0_irq(struct device *port);
static struct eth_config eth_config_0 = {
.base_addr = CONFIG_ETH_DW_0_BASE_ADDR,
.base_addr = ETH_DW_0_BASE_ADDR,
#ifdef CONFIG_ETH_DW_0_IRQ_DIRECT
.irq_num = CONFIG_ETH_DW_0_IRQ,
.irq_num = ETH_DW_0_IRQ,
#endif
#if CONFIG_PCI
.pci_dev.class_type = CONFIG_ETH_DW_CLASS,
.pci_dev.bus = CONFIG_ETH_DW_0_BUS,
.pci_dev.dev = CONFIG_ETH_DW_0_DEV,
.pci_dev.vendor_id = CONFIG_ETH_DW_VENDOR_ID,
.pci_dev.device_id = CONFIG_ETH_DW_DEVICE_ID,
.pci_dev.function = CONFIG_ETH_DW_0_FUNCTION,
.pci_dev.bar = CONFIG_ETH_DW_0_BAR,
.pci_dev.class_type = ETH_DW_PCI_CLASS,
.pci_dev.bus = ETH_DW_0_PCI_BUS,
.pci_dev.dev = ETH_DW_0_PCI_DEV,
.pci_dev.vendor_id = ETH_DW_PCI_VENDOR_ID,
.pci_dev.device_id = ETH_DW_PCI_DEVICE_ID,
.pci_dev.function = ETH_DW_0_PCI_FUNCTION,
.pci_dev.bar = ETH_DW_0_PCI_BAR,
#endif
.config_func = eth_config_0_irq,
@ -321,9 +321,9 @@ static void eth_config_0_irq(struct device *port)
#ifdef CONFIG_ETH_DW_0_IRQ_DIRECT
ARG_UNUSED(shared_irq_dev);
IRQ_CONNECT(CONFIG_ETH_DW_0_IRQ, CONFIG_ETH_DW_0_PRI, eth_dw_isr,
IRQ_CONNECT(ETH_DW_0_IRQ, CONFIG_ETH_DW_0_IRQ_PRI, eth_dw_isr,
DEVICE_GET(eth_dw_0), 0);
irq_enable(CONFIG_ETH_DW_0_IRQ);
irq_enable(ETH_DW_0_IRQ);
#elif defined(CONFIG_ETH_DW_0_IRQ_SHARED)
shared_irq_dev = device_get_binding(config->shared_irq_dev_name);
__ASSERT(shared_irq_dev != NULL, "Failed to get eth_dw device binding");