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drivers/gpio: stm32: Use gpio device as gpio_stm32_configure arg

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Now that pinmux driver holds a table of GPIO device pointers,
use gpio device as the single source of trust for gpio_base
and remove use of port_base and related code.
This way, gpio_stm32_configure could directly take gpio device
pointer as argument.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2021-02-17 11:17:01 +01:00 committed by Kumar Gala
parent 8d97f67159
commit bb014514e0
3 changed files with 15 additions and 22 deletions
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8
drivers/gpio/gpio_stm32.c
View file

@ -112,9 +112,10 @@ static inline uint32_t stm32_pinval_get(int pin)
/** /**
* @brief Configure the hardware. * @brief Configure the hardware.
*/ */
int gpio_stm32_configure(uint32_t *base_addr, int pin, int conf, int altf) int gpio_stm32_configure(const struct device *dev, int pin, int conf, int altf)
{ {
GPIO_TypeDef *gpio = (GPIO_TypeDef *)base_addr; const struct gpio_stm32_config *cfg = dev->config;
GPIO_TypeDef *gpio = (GPIO_TypeDef *)cfg->base;
int pin_ll = stm32_pinval_get(pin); int pin_ll = stm32_pinval_get(pin);
@ -457,7 +458,6 @@ static int gpio_stm32_port_toggle_bits(const struct device *dev,
static int gpio_stm32_config(const struct device *dev, static int gpio_stm32_config(const struct device *dev,
gpio_pin_t pin, gpio_flags_t flags) gpio_pin_t pin, gpio_flags_t flags)
{ {
const struct gpio_stm32_config *cfg = dev->config;
int err = 0; int err = 0;
int pincfg; int pincfg;
@ -477,7 +477,7 @@ static int gpio_stm32_config(const struct device *dev,
} }
} }
gpio_stm32_configure(cfg->base, pin, pincfg, 0); gpio_stm32_configure(dev, pin, pincfg, 0);
exit: exit:
return err; return err;

6
drivers/gpio/gpio_stm32.h
View file

@ -233,12 +233,12 @@ struct gpio_stm32_data {
/** /**
* @brief helper for configuration of GPIO pin * @brief helper for configuration of GPIO pin
* *
* @param base_addr GPIO port base address * @param dev GPIO port device pointer
* @param pin IO pin * @param pin IO pin
* @param func GPIO mode * @param conf GPIO mode
* @param altf Alternate function * @param altf Alternate function
*/ */
int gpio_stm32_configure(uint32_t *base_addr, int pin, int conf, int altf); int gpio_stm32_configure(const struct device *dev, int pin, int conf, int altf);
/** /**
* @brief Enable / disable GPIO port clock. * @brief Enable / disable GPIO port clock.

23
drivers/pinmux/stm32/pinmux_stm32.c
View file

@ -1,5 +1,6 @@
/* /*
* Copyright (c) 2016 Open-RnD Sp. z o.o. * Copyright (c) 2016 Open-RnD Sp. z o.o.
* Copyright (c) 2021 Linaro Limited
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -7,8 +8,7 @@
/** /**
* @brief * @brief
* *
* A common driver for STM32 pinmux. Each SoC must implement a SoC * A common driver for STM32 pinmux.
* specific part of the driver.
*/ */
#include <errno.h> #include <errno.h>
@ -23,14 +23,6 @@
#include <drivers/clock_control/stm32_clock_control.h> #include <drivers/clock_control/stm32_clock_control.h>
#include <pinmux/stm32/pinmux_stm32.h> #include <pinmux/stm32/pinmux_stm32.h>
#ifdef CONFIG_SOC_SERIES_STM32MP1X
#define GPIO_REG_SIZE 0x1000
/* 0x1000 between each port, 0x400 gpio registry 0xC00 reserved */
#else
#define GPIO_REG_SIZE 0x400
#endif /* CONFIG_SOC_SERIES_STM32MP1X */
/* base address for where GPIO registers start */
#define GPIO_PORTS_BASE (GPIOA_BASE)
#define GPIO_DEVICE(gpio_port) \ #define GPIO_DEVICE(gpio_port) \
COND_CODE_1(DT_NODE_HAS_STATUS(DT_NODELABEL(gpio_port), okay), \ COND_CODE_1(DT_NODE_HAS_STATUS(DT_NODELABEL(gpio_port), okay), \
(DEVICE_DT_GET(DT_NODELABEL(gpio_port))), \ (DEVICE_DT_GET(DT_NODELABEL(gpio_port))), \
@ -52,15 +44,16 @@ const struct device * const gpio_ports[STM32_PORTS_MAX] = {
static int stm32_pin_configure(uint32_t pin, uint32_t func, uint32_t altf) static int stm32_pin_configure(uint32_t pin, uint32_t func, uint32_t altf)
{ {
/* determine IO port registers location */ const struct device *port_device = gpio_ports[STM32_PORT(pin)];
uint32_t offset = STM32_PORT(pin) * GPIO_REG_SIZE;
uint8_t *port_base = (uint8_t *)(GPIO_PORTS_BASE + offset);
/* not much here, on STM32F10x the alternate function is /* not much here, on STM32F10x the alternate function is
* controller by setting up GPIO pins in specific mode. * controller by setting up GPIO pins in specific mode.
*/ */
return gpio_stm32_configure((uint32_t *)port_base, if (port_device == NULL) {
STM32_PIN(pin), func, altf); return -ENODEV;
}
return gpio_stm32_configure(port_device, STM32_PIN(pin), func, altf);
} }
/** /**