native simulator: Get latest from upstream
Align with native_simulator's upstream main d32b2504ad2b6d6d541bc71a0f9b16ab7b6a3831 Which includes: * d32b250 Minor format fix * 7b4f35b native HW counter: Provide new API to reset and control * 4f815cb INT CNTLR: Bugfix for more than 32 interrupts * 1d36254 Provide new 64 version of nsi_find_lsb_set Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
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@ -14,7 +14,6 @@ extern "C" {
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#endif
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/**
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*
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* @brief find least significant bit set in a 32-bit word
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*
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* This routine finds the first bit set starting from the least significant bit
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@ -30,6 +29,22 @@ static inline unsigned int nsi_find_lsb_set(uint32_t op)
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return __builtin_ffs(op);
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}
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/**
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* @brief find least significant bit set in a 64-bit word
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*
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* This routine finds the first bit set starting from the least significant bit
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* in the argument passed in and returns the index of that bit. Bits are
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* numbered starting at 1 from the least significant bit. A return value of
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* zero indicates that the value passed is zero.
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*
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* @return least significant bit set, 0 if @a op is 0
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*/
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static inline unsigned int nsi_find_lsb_set64(uint64_t op)
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{
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return __builtin_ffsll(op);
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}
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#ifdef __cplusplus
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}
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#endif
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@ -17,6 +17,7 @@ static bool counter_running;
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static uint64_t counter_value;
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static uint64_t counter_target;
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static uint64_t counter_period;
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static uint64_t counter_wrap;
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/**
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* Initialize the counter with prescaler of HW
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@ -28,6 +29,7 @@ static void hw_counter_init(void)
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counter_value = 0;
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counter_running = false;
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counter_period = NSI_NEVER;
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counter_wrap = NSI_NEVER;
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}
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NSI_TASK(hw_counter_init, HW_INIT, 10);
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@ -40,7 +42,7 @@ static void hw_counter_triggered(void)
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}
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hw_counter_timer = nsi_hws_get_time() + counter_period;
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counter_value = counter_value + 1;
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counter_value = (counter_value + 1) % counter_wrap;
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if (counter_value == counter_target) {
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hw_irq_ctrl_set_irq(COUNTER_EVENT_IRQ);
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@ -58,6 +60,16 @@ void hw_counter_set_period(uint64_t period)
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counter_period = period;
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}
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/*
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* Set the count value at which the counter will wrap
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* The counter will count up to (counter_wrap-1), i.e.:
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* 0, 1, 2,.., (counter_wrap - 1), 0
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*/
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void hw_counter_set_wrap_value(uint64_t wrap_value)
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{
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counter_wrap = wrap_value;
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}
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/**
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* Starts the counter. It must be previously configured with
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* hw_counter_set_period() and hw_counter_set_target().
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@ -86,6 +98,11 @@ void hw_counter_stop(void)
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nsi_hws_find_next_event();
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}
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bool hw_counter_is_started(void)
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{
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return counter_running;
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}
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/**
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* Returns the current counter value.
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*/
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@ -94,6 +111,14 @@ uint64_t hw_counter_get_value(void)
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return counter_value;
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}
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/**
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* Resets the counter value.
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*/
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void hw_counter_reset(void)
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{
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counter_value = 0;
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}
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/**
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* Configures the counter to generate an interrupt
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* when its count value reaches target.
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@ -22,9 +22,12 @@ void hw_counter_triggered(void);
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void hw_counter_set_period(uint64_t period);
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void hw_counter_set_target(uint64_t counter_target);
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void hw_counter_set_wrap_value(uint64_t wrap_value);
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void hw_counter_start(void);
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void hw_counter_stop(void);
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bool hw_counter_is_started(void);
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uint64_t hw_counter_get_value(void);
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void hw_counter_reset(void);
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#ifdef __cplusplus
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}
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@ -95,7 +95,7 @@ int hw_irq_ctrl_get_highest_prio_irq(void)
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int winner_prio = 256;
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while (irq_status != 0U) {
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int irq_nbr = nsi_find_lsb_set(irq_status) - 1;
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int irq_nbr = nsi_find_lsb_set64(irq_status) - 1;
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irq_status &= ~((uint64_t) 1 << irq_nbr);
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if ((winner_prio > (int)irq_prio[irq_nbr])
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