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drivers: arcv2_timer0: minor fix and optimization for SMP case

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* still need to clear IP bit in timer irq handler

* last_time should be aligned to ticks, old code will miss some
cycles which are about (curret_time - last_time) % CYC_PER_TICK

* in timeout set, shorten the delay needed when tick is 0, this
 will improve the response of timer irq

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
This commit is contained in:
Wayne Ren 2020-05-21 10:30:18 +08:00 committed by Carles Cufí
parent ac5dc1dd34
commit bc6f11b730
1 changed files with 11 additions and 3 deletions
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14
drivers/timer/arcv2_timer0.c
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@ -228,12 +228,16 @@ static void timer_int_handler(void *unused)
u64_t curr_time;
k_spinlock_key_t key;
/* clear the IP bit of the control register */
timer0_control_register_set(_ARC_V2_TMR_CTRL_NH |
_ARC_V2_TMR_CTRL_IE);
key = k_spin_lock(&lock);
/* gfrc is the wall clock */
curr_time = z_arc_connect_gfrc_read();
dticks = (curr_time - last_time) / CYC_PER_TICK;
last_time = curr_time;
/* last_time should be aligned to ticks */
last_time += dticks * CYC_PER_TICK;
k_spin_unlock(&lock, key);
@ -335,8 +339,12 @@ void z_clock_set_timeout(s32_t ticks, bool idle)
ticks = MIN(MAX_TICKS, ticks);
/* Desired delay in the future */
delay = MAX(CYC_PER_TICK, ticks * CYC_PER_TICK);
/* Desired delay in the future
* use MIN_DEALY here can trigger the timer
* irq more soon, no need to go to CYC_PER_TICK
* later.
*/
delay = MAX(ticks * CYC_PER_TICK, MIN_DELAY);
key = arch_irq_lock();