ethernet: eth_liteeth: Add and use register names
Adds addresses and names for individual CSR registers to device tree. This way liteuart driver no longer depends on CSR data width being 8 bits. Also when register names or their number changes, then overlay generated by LiteX will be incompatible with one defined here. This should make finding breaking changes easier. I also appended `_ADDR` suffix to defines, to distinguish them from normal values like `LITEETH_EV_RX`. Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
This commit is contained in:
Michal Sieron
Carles Cufí
parent
081e201219
commit
bd892bd963
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@ -29,30 +29,28 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME);
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#define LITEETH_EV_RX 0x1
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/* slots */
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#define LITEETH_SLOT_BASE DT_INST_REG_ADDR_BY_NAME(0, buffers)
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#define LITEETH_SLOT_RX0 ((LITEETH_SLOT_BASE) + 0x0000)
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#define LITEETH_SLOT_RX1 ((LITEETH_SLOT_BASE) + 0x0800)
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#define LITEETH_SLOT_TX0 ((LITEETH_SLOT_BASE) + 0x1000)
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#define LITEETH_SLOT_TX1 ((LITEETH_SLOT_BASE) + 0x1800)
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#define LITEETH_SLOT_BASE_ADDR DT_INST_REG_ADDR_BY_NAME(0, buffers)
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#define LITEETH_SLOT_RX0_ADDR (LITEETH_SLOT_BASE_ADDR + 0x0000)
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#define LITEETH_SLOT_RX1_ADDR (LITEETH_SLOT_BASE_ADDR + 0x0800)
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#define LITEETH_SLOT_TX0_ADDR (LITEETH_SLOT_BASE_ADDR + 0x1000)
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#define LITEETH_SLOT_TX1_ADDR (LITEETH_SLOT_BASE_ADDR + 0x1800)
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/* sram - rx */
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#define LITEETH_RX_BASE DT_INST_REG_ADDR_BY_NAME(0, control)
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#define LITEETH_RX_SLOT ((LITEETH_RX_BASE) + 0x00)
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#define LITEETH_RX_LENGTH ((LITEETH_RX_BASE) + 0x04)
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#define LITEETH_RX_EV_PENDING ((LITEETH_RX_BASE) + 0x28)
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#define LITEETH_RX_EV_ENABLE ((LITEETH_RX_BASE) + 0x2c)
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#define LITEETH_RX_SLOT_ADDR DT_INST_REG_ADDR_BY_NAME(0, rx_slot)
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#define LITEETH_RX_LENGTH_ADDR DT_INST_REG_ADDR_BY_NAME(0, rx_length)
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#define LITEETH_RX_EV_PENDING_ADDR DT_INST_REG_ADDR_BY_NAME(0, rx_ev_pending)
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#define LITEETH_RX_EV_ENABLE_ADDR DT_INST_REG_ADDR_BY_NAME(0, rx_ev_enable)
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/* sram - tx */
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#define LITEETH_TX_BASE ((DT_INST_REG_ADDR_BY_NAME(0, control)) + 0x30)
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#define LITEETH_TX_START ((LITEETH_TX_BASE) + 0x00)
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#define LITEETH_TX_READY ((LITEETH_TX_BASE) + 0x04)
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#define LITEETH_TX_SLOT ((LITEETH_TX_BASE) + 0x0c)
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#define LITEETH_TX_LENGTH ((LITEETH_TX_BASE) + 0x10)
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#define LITEETH_TX_EV_PENDING ((LITEETH_TX_BASE) + 0x1c)
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#define LITEETH_TX_START_ADDR DT_INST_REG_ADDR_BY_NAME(0, tx_start)
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#define LITEETH_TX_READY_ADDR DT_INST_REG_ADDR_BY_NAME(0, tx_ready)
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#define LITEETH_TX_SLOT_ADDR DT_INST_REG_ADDR_BY_NAME(0, tx_slot)
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#define LITEETH_TX_LENGTH_ADDR DT_INST_REG_ADDR_BY_NAME(0, tx_length)
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#define LITEETH_TX_EV_PENDING_ADDR DT_INST_REG_ADDR_BY_NAME(0, tx_ev_pending)
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/* irq */
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#define LITEETH_IRQ DT_INST_IRQN(0)
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#define LITEETH_IRQ_PRIORITY DT_INST_IRQ(0, priority)
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#define LITEETH_IRQ DT_INST_IRQN(0)
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#define LITEETH_IRQ_PRIORITY DT_INST_IRQ(0, priority)
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#define MAX_TX_FAILURE 100
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@ -93,11 +91,11 @@ static int eth_tx(const struct device *dev, struct net_pkt *pkt)
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len = net_pkt_get_len(pkt);
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net_pkt_read(pkt, context->tx_buf[context->txslot], len);
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litex_write8(context->txslot, LITEETH_TX_SLOT);
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litex_write16(len, LITEETH_TX_LENGTH);
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litex_write8(context->txslot, LITEETH_TX_SLOT_ADDR);
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litex_write16(len, LITEETH_TX_LENGTH_ADDR);
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/* wait for the device to be ready to transmit */
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while (litex_read8(LITEETH_TX_READY) == 0) {
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while (litex_read8(LITEETH_TX_READY_ADDR) == 0) {
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if (attempts++ == MAX_TX_FAILURE) {
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goto error;
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}
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@ -105,7 +103,7 @@ static int eth_tx(const struct device *dev, struct net_pkt *pkt)
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}
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/* start transmitting */
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litex_write8(1, LITEETH_TX_START);
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litex_write8(1, LITEETH_TX_START_ADDR);
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/* change slot */
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context->txslot = (context->txslot + 1) % 2;
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@ -131,10 +129,10 @@ static void eth_rx(const struct device *port)
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key = irq_lock();
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/* get frame's length */
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len = litex_read32(LITEETH_RX_LENGTH);
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len = litex_read32(LITEETH_RX_LENGTH_ADDR);
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/* which slot is the frame in */
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context->rxslot = litex_read8(LITEETH_RX_SLOT);
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context->rxslot = litex_read8(LITEETH_RX_SLOT_ADDR);
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/* obtain rx buffer */
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pkt = net_pkt_rx_alloc_with_buffer(context->iface, len, AF_UNSPEC, 0,
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@ -165,19 +163,19 @@ out:
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static void eth_irq_handler(const struct device *port)
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{
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/* check sram reader events (tx) */
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if (litex_read8(LITEETH_TX_EV_PENDING) & LITEETH_EV_TX) {
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if (litex_read8(LITEETH_TX_EV_PENDING_ADDR) & LITEETH_EV_TX) {
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/* TX event is not enabled nor used by this driver; ack just
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* in case if some rogue TX event appeared
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*/
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litex_write8(LITEETH_EV_TX, LITEETH_TX_EV_PENDING);
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litex_write8(LITEETH_EV_TX, LITEETH_TX_EV_PENDING_ADDR);
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}
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/* check sram writer events (rx) */
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if (litex_read8(LITEETH_RX_EV_PENDING) & LITEETH_EV_RX) {
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if (litex_read8(LITEETH_RX_EV_PENDING_ADDR) & LITEETH_EV_RX) {
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eth_rx(port);
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/* ack writer irq */
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litex_write8(LITEETH_EV_RX, LITEETH_RX_EV_PENDING);
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litex_write8(LITEETH_EV_RX, LITEETH_RX_EV_PENDING_ADDR);
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}
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}
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@ -222,18 +220,18 @@ static void eth_iface_init(struct net_if *iface)
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}
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/* clear pending events */
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litex_write8(LITEETH_EV_TX, LITEETH_TX_EV_PENDING);
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litex_write8(LITEETH_EV_RX, LITEETH_RX_EV_PENDING);
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litex_write8(LITEETH_EV_TX, LITEETH_TX_EV_PENDING_ADDR);
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litex_write8(LITEETH_EV_RX, LITEETH_RX_EV_PENDING_ADDR);
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/* setup tx slots */
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context->txslot = 0;
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context->tx_buf[0] = (uint8_t *)LITEETH_SLOT_TX0;
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context->tx_buf[1] = (uint8_t *)LITEETH_SLOT_TX1;
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context->tx_buf[0] = (uint8_t *)LITEETH_SLOT_TX0_ADDR;
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context->tx_buf[1] = (uint8_t *)LITEETH_SLOT_TX1_ADDR;
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/* setup rx slots */
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context->rxslot = 0;
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context->rx_buf[0] = (uint8_t *)LITEETH_SLOT_RX0;
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context->rx_buf[1] = (uint8_t *)LITEETH_SLOT_RX1;
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context->rx_buf[0] = (uint8_t *)LITEETH_SLOT_RX0_ADDR;
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context->rx_buf[1] = (uint8_t *)LITEETH_SLOT_RX1_ADDR;
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init_done = true;
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}
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@ -260,7 +258,7 @@ static void eth_irq_config(void)
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IRQ_CONNECT(LITEETH_IRQ, LITEETH_IRQ_PRIORITY, eth_irq_handler,
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DEVICE_DT_INST_GET(0), 0);
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irq_enable(LITEETH_IRQ);
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litex_write8(1, LITEETH_RX_EV_ENABLE);
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litex_write8(1, LITEETH_RX_EV_ENABLE_ADDR);
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}
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#endif /* CONFIG_ETH_LITEETH_0 */
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@ -104,9 +104,28 @@
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compatible = "litex,eth0";
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interrupt-parent = <&intc0>;
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interrupts = <3 0>;
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reg = <0xe0009800 0x6b 0xb0000000 0x2000>;
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reg = <0xe0009800 0x4
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0xe0009804 0x8
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0xe0009828 0x4
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0xe000982c 0x4
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0xe0009830 0x4
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0xe0009834 0x4
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0xe000983c 0x4
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0xe0009840 0x8
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0xe000984c 0x4
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0xb0000000 0x2000>;
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local-mac-address = [10 e2 d5 00 00 02];
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reg-names = "control", "buffers";
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reg-names =
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"rx_slot",
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"rx_length",
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"rx_ev_pending",
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"rx_ev_enable",
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"tx_start",
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"tx_ready",
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"tx_slot",
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"tx_length",
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"tx_ev_pending",
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"buffers";
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label = "eth0";
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status = "disabled";
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};
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