drivers: serial: uart_intel_lw: add driver

Enable driver for intel lw uart.

Changes from review:
- refactor spinlock to inside of loop
- use menuconfig for kconfig
- add CONFIG_UART_INTEL_LW_AUTO_LINE_CTRL_POLL

Signed-off-by: Teoh Shi Lin <shi.lin.teoh@intel.com>

CODEOWNERS

@@ -451,6 +451,7 @@
 /drivers/serial/uart_hvc_xen_consoleio.c  @lorc @firscity
 /drivers/serial/Kconfig.it8xxx2           @GTLin08
 /drivers/serial/uart_ite_it8xxx2.c        @GTLin08
+/drivers/serial/*intel_lw*                @shilinte
 /drivers/smbus/                           @finikorg
 /drivers/sip_svc/                         @maheshraotm
 /drivers/disk/                            @jfischer-no

drivers/serial/CMakeLists.txt

@@ -65,6 +65,7 @@ zephyr_library_sources_ifdef(CONFIG_UART_NUMAKER uart_numaker.c)
 zephyr_library_sources_ifdef(CONFIG_UART_EFINIX_SAPPIHIRE uart_efinix_sapphire.c)
 zephyr_library_sources_ifdef(CONFIG_UART_SEDI uart_sedi.c)
 zephyr_library_sources_ifdef(CONFIG_UART_BCM2711_MU uart_bcm2711.c)
+zephyr_library_sources_ifdef(CONFIG_UART_INTEL_LW uart_intel_lw.c)
 
 zephyr_library_sources_ifdef(CONFIG_USERSPACE   uart_handlers.c)
 

drivers/serial/Kconfig

@@ -243,4 +243,6 @@ source "drivers/serial/Kconfig.sedi"
 
 source "drivers/serial/Kconfig.bcm2711"
 
+source "drivers/serial/Kconfig.intel_lw"
+
 endif # SERIAL

drivers/serial/Kconfig.intel_lw

@@ -0,0 +1,30 @@
+# Copyright (c) 2023 Intel Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+menuconfig UART_INTEL_LW
+	bool "Intel Lightweight UART driver"
+	depends on DT_HAS_INTEL_LW_UART_ENABLED
+	select SERIAL_HAS_DRIVER
+	select SERIAL_SUPPORT_INTERRUPT
+	help
+	  Enable the Intel Lightweight UART driver, that can be built into Intel NiosV CPU designs.
+
+if UART_INTEL_LW
+
+config UART_INTEL_LW_EOP
+	bool "Include end of packet register"
+	depends on UART_DRV_CMD && UART_INTERRUPT_DRIVEN
+	help
+	  Use driver command CMD_ENABLE_EOP and CMD_DISABLE_EOP to use the feature.
+
+config UART_INTEL_LW_AUTO_LINE_CTRL_POLL
+	bool "Auto set RTS signal during poll out"
+	depends on UART_LINE_CTRL
+	help
+	  Assert RTS before polling out a character,
+	  and deassert RTS after the character is polled out.
+	  Please note that this is not suitable, when polling out several characters.
+	  Please use uart_drv_cmd with CMD_POLL_ASSERT_RTS before polling out.
+	  Then use CMD_POLL_DEASSERT_RTS to resume normal operation after polling.
+
+endif # UART_INTEL_LW

dts/bindings/serial/intel,lw_uart.yaml

@@ -0,0 +1,19 @@
+description: Intel Lightweight UART
+
+compatible: "intel,lw-uart"
+
+include: uart-controller.yaml
+
+properties:
+  reg:
+    required: true
+    description: Base address of the uart controller.
+
+  current-speed:
+    required: true
+    description: Default baudrate of the uart controller.
+
+  fixed-baudrate:
+    type: boolean
+    description: |
+      Baud rate cannot be changed by software (Divisor register is not writable)

include/zephyr/drivers/serial/uart_intel_lw.h

@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2023 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * Header file for the INTEL LW UART
+ */
+
+#ifndef ZEPHYR_DRIVERS_SERIAL_UART_INTEL_LW_H_
+#define ZEPHYR_DRIVERS_SERIAL_UART_INTEL_LW_H_
+
+/* End of packet feature.
+ * Driver will trigger interrupt upon receiving end of package character.
+ * Please enable CONFIG_UART_INTEL_LW_EOP to use this feature.
+ * Use the api: uart_drv_cmd with CMD_ENABLE_EOP to enable the feature.
+ * This cmd will write the ip register and also set a flag to the driver.
+ * The flag will modify uart_irq_callback_user_data_set
+ * to set call back function for eop interrupt.
+ * Flag is cleared after uart_irq_callback_user_data_set is called.
+ */
+#define CMD_ENABLE_EOP          0x01
+#define CMD_DISABLE_EOP         0x02
+
+/* Transmit break feature.
+ * Use uart_drv_cmd with CMD_TRBK_EN to break ongoing transmit.
+ * After this cmd, uart is unable to transmit any data.
+ * Please use CMD_TRBK_DIS to resume normal operation.
+ * Please also call uart_intel_lw_err_check, to clear the error caused
+ * by transmit break.
+ */
+#define CMD_TRBK_EN             0x03
+#define CMD_TRBK_DIS            0x04
+
+/* This driver supports interrupt driven api.
+ * Polling for data under normal operation, might cause unexpected behaviour.
+ * If users wish to poll for data, please use the api:
+ * uart_drv_cmd with CMD_POLL_ASSERT_RTS before polling out/in.
+ * Then use CMD_POLL_DEASSERT_RTS to resume normal operation after polling.
+ */
+#define CMD_POLL_ASSERT_RTS     0x05
+#define CMD_POLL_DEASSERT_RTS   0x06
+
+#endif /* ZEPHYR_DRIVERS_SERIAL_UART_INTEL_LW_H_ */