Renaming include/nanokernel to include/arch

Renaming the directory include/nanokernel to be include/arch, which
better reflects the real nature of the directory and the contents
inside.

Change-Id: I2bc33ebc6715e2f0403227a558279fdf52398ade
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>

arch/arc/bsp/fatal_error.c

@@ -39,7 +39,7 @@ This module provides the _SysFatalErrorHandler() routine for ARCv2 BSPs.
 
 #include <cputype.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <toolchain.h>
 #include <sections.h>
 #include "board.h"

arch/arc/bsp/reset.s

@@ -40,7 +40,7 @@ Reset handler that prepares the system for running C code.
 #include <board.h>
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 #define _RAM_END (CONFIG_RAM_START + CONFIG_RAM_SIZE)
 

arch/arc/core/context.c

@@ -37,7 +37,7 @@
  */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <toolchain.h>
 #include <nanok.h>
 #include <nanocontextentry.h>

arch/arc/core/cpu_idle.s

@@ -41,7 +41,7 @@ CPU power management routines.
 #include <offsets.h>
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 GTEXT(nano_cpu_idle)
 GTEXT(nano_cpu_atomic_idle)

arch/arc/core/fast_irq.s

@@ -42,7 +42,7 @@ See isr_wrapper.s for details.
 #include <nanok.h>
 #include <offsets.h>
 #include <toolchain.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include "swap_macros.h"
 
 GTEXT(_firq_enter)

arch/arc/core/fatal.c

@@ -39,7 +39,7 @@ ARCv2 CPUs.
 #include <nanok.h>
 #include <offsets.h>
 #include <toolchain.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 #ifdef CONFIG_PRINTK
 #include <misc/printk.h>

arch/arc/core/fault.c

@@ -40,7 +40,7 @@
 
 #include <cputype.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <nanok.h>
 
 #ifdef CONFIG_PRINTK

arch/arc/core/fault_s.s

@@ -39,7 +39,7 @@
 
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include "swap_macros.h"
 
 GTEXT(_Fault)

arch/arc/core/irq_lock.s

@@ -38,7 +38,7 @@
 #include <nanok.h>
 #include <offsets.h>
 #include <toolchain.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 /*******************************************************************************
 *

arch/arc/core/irq_manage.c

@@ -45,7 +45,7 @@
  */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <misc/__assert.h>
 #include <toolchain.h>
 #include <sections.h>

arch/arc/core/isr_wrapper.s

@@ -44,7 +44,7 @@ a parameter.
 #include <sections.h>
 #include <sw_isr_table.h>
 #include <nanok.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 GTEXT(_isr_enter)
 GTEXT(_isr_demux)

arch/arc/core/regular_irq.s

@@ -43,7 +43,7 @@ See isr_wrapper.s for details.
 #include <nanok.h>
 #include <offsets.h>
 #include <toolchain.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include "swap_macros.h"
 
 GTEXT(_rirq_enter)

arch/arc/core/swap.s

@@ -43,7 +43,7 @@ See isr_wrapper.s for details.
 #include <nanok.h>
 #include <offsets.h>
 #include <toolchain.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <v2/irq.h>
 #include "swap_macros.h"
 

arch/arc/core/swap_macros.h

@@ -36,7 +36,7 @@
 #include <nanok.h>
 #include <offsets.h>
 #include <toolchain.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 #ifdef _ASMLANGUAGE
 

arch/arc/include/nanok.h

@@ -50,7 +50,7 @@ extern "C" {
 
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 #ifndef _ASMLANGUAGE
 #include <stdint.h>

arch/arc/include/v2/cache.h

@@ -39,7 +39,7 @@
 #ifndef _ARCV2_CACHE__H_
 #define _ARCV2_CACHE__H_
 
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 #ifndef _ASMLANGUAGE
 

arch/arc/interrupt_controller/arcv2_irq_unit.c

@@ -40,7 +40,7 @@
  */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <board.h>
 
 /*

arch/arc/serial/nsim_uart.c

@@ -29,7 +29,7 @@
  */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <sections.h>
 #include <misc/__assert.h>
 #include <stdint.h>

arch/arc/timer/arcv2_timer0.c

@@ -40,11 +40,11 @@ The ARCv2 processor timer provides a 32-bit incrementing, wrap-to-zero counter.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <toolchain.h>
 #include <sections.h>
 #include <misc/__assert.h>
-#include <nanokernel/arc/v2/aux_regs.h>
+#include <arch/arc/v2/aux_regs.h>
 #include <clock_vars.h>
 #include <drivers/system_timer.h>
 

arch/arm/bsp/CortexM/nmi.c

@@ -38,7 +38,7 @@ run time handler.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <misc/printk.h>
 #include <toolchain.h>
 #include <sections.h>

arch/arm/bsp/CortexM/reset.s

@@ -40,7 +40,7 @@ Reset handler that prepares the system for running C code.
 #include <board.h>
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include "vector_table.h"
 
 _ASM_FILE_PROLOGUE

arch/arm/bsp/CortexM/scb.c

@@ -39,7 +39,7 @@ definitions and more complex routines, if needed.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <misc/util.h>
 
 #define SCB_AIRCR_VECTKEY_EN_W 0x05FA

arch/arm/bsp/CortexM/scs.c

@@ -38,7 +38,7 @@ definitions and more complex routines, if needed.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <toolchain.h>
 #include <sections.h>
 

arch/arm/bsp/sysFatalErrorHandler.c

@@ -39,7 +39,7 @@ This module provides the _SysFatalErrorHandler() routine for Cortex-M BSPs.
 
 #include <cputype.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <toolchain.h>
 #include <sections.h>
 #include "board.h"

arch/arm/core/basepri.s

@@ -52,7 +52,7 @@ unlocked. This achieves two purposes:
 
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE
 

arch/arm/core/cpu_idle.s

@@ -39,7 +39,7 @@ DESCRIPTION
 #include <offsets.h>
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #ifdef CONFIG_TICKLESS_IDLE
 #include <nanok.h>
 #endif

arch/arm/core/exc_exit.s

@@ -43,7 +43,7 @@ wrapped around by _isr_wrapper()).
 #include <nanok.h>
 #include <offsets.h>
 #include <toolchain.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE
 

arch/arm/core/fault.c

@@ -40,7 +40,7 @@ Common fault handler for ARM Cortex-M processors.
 
 #include <cputype.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <nanok.h>
 
 #ifdef CONFIG_PRINTK

arch/arm/core/fault_s.s

@@ -39,7 +39,7 @@ Fault handlers for ARM Cortex-M processors.
 
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE
 

arch/arm/core/gdb_stub.s

@@ -47,7 +47,7 @@ anymore.
 #include <toolchain.h>
 #include <sections.h>
 #include <nanok.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE
 

arch/arm/core/gdb_stub_irq_vector_table.c

@@ -39,7 +39,7 @@ user-installed ISRs.
 
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 typedef void (*vth)(void); /* Vector Table Handler */
 

arch/arm/core/irq_init.c

@@ -43,7 +43,7 @@ the PendSV exception.
 #include <toolchain.h>
 #include <sections.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 /*******************************************************************************
 *

arch/arm/core/irq_manage.c

@@ -38,7 +38,7 @@ SW_ISR_TABLE_DYNAMIC has to be enabled for connecting ISRs at runtime.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <misc/__assert.h>
 #include <toolchain.h>
 #include <sections.h>

arch/arm/core/isr_wrapper.s

@@ -44,7 +44,7 @@ a parameter.
 #include <sections.h>
 #include <sw_isr_table.h>
 #include <nanok.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE
 

arch/arm/core/nano_fiber_abort.c

@@ -49,7 +49,7 @@ the PendSV exception.
 #include <toolchain.h>
 #include <sections.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 extern void _nano_fiber_swap(void);
 

arch/arm/core/nanocontext.c

@@ -37,7 +37,7 @@ architecture.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <toolchain.h>
 #include <nanok.h>
 #include <nanocontextentry.h>

arch/arm/core/nanofatal.c

@@ -42,7 +42,7 @@ This module provides the _NanoFatalErrorHandler() routine for ARM Cortex-M.
 
 #include <cputype.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <nanok.h>
 
 #ifdef CONFIG_PRINTK

arch/arm/core/swap.s

@@ -41,7 +41,7 @@ on ARM Cortex-M3/M4 CPUs.
 #include <nanok.h>
 #include <offsets.h>
 #include <toolchain.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE
 

arch/arm/fsl_frdm_k64f/linker.cmd

@@ -57,4 +57,4 @@ This is the linker script for both standard images and XIP images.
 #define SRAM_START  0x20000000  /* 192K in SRAM space */
 #define SRAM_SIZE   192K
 
-#include <nanokernel/arm/CortexM/scripts/linker.cmd>
+#include <arch/arm/CortexM/scripts/linker.cmd>

arch/arm/fsl_frdm_k64f/system.c

@@ -37,7 +37,7 @@ for the fsl_frdm_k64f BSP.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <cputype.h>
 #include <board.h>
 #include <drivers/k20_mcg.h>

arch/arm/include/CortexM/exc.h

@@ -38,7 +38,7 @@ Exception/interrupt context helpers.
 #ifndef _ARM_CORTEXM_ISR__H_
 #define _ARM_CORTEXM_ISR__H_
 
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <asm_inline.h>
 
 #ifdef _ASMLANGUAGE

arch/arm/include/nanok.h

@@ -50,7 +50,7 @@ extern "C" {
 
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 #ifndef _ASMLANGUAGE
 #include <stdint.h>

arch/arm/ti_lm3s6965/linker.cmd

@@ -35,4 +35,4 @@
 #define FLASH_SIZE  256K
 #define SRAM_SIZE   64K
 
-#include <nanokernel/arm/CortexM/scripts/linker.cmd>
+#include <arch/arm/CortexM/scripts/linker.cmd>

arch/arm/ti_lm3s6965/system.c

@@ -37,7 +37,7 @@ for the ti_lm3s6965 BSP.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <cputype.h>
 #include <board.h>
 #include <drivers/uart.h>

arch/arm/timer/systick.c

@@ -52,7 +52,7 @@ conjunction with a microkernel.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <toolchain.h>
 #include <sections.h>
 #include <misc/__assert.h>

arch/arm/timer/systick_gdb.s

@@ -42,7 +42,7 @@ correct state of the thread that was interrupted.
 
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE
 

arch/x86/bsp/cache.c

@@ -35,7 +35,7 @@ This module contains functions for manipulation caches.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <misc/util.h>
 
 #ifdef CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED

arch/x86/bsp/cache_s.s

@@ -37,7 +37,7 @@ This module contains functions for manipulating caches.
 #ifndef CONFIG_CLFLUSH_INSTRUCTION_SUPPORTED
 
 #define _ASMLANGUAGE
-#include <nanokernel/x86/asm.h>
+#include <arch/x86/asm.h>
 
 	/* externs (internal APIs) */
 	GTEXT(_SysCacheFlush)

arch/x86/bsp/crt0.s

@@ -44,7 +44,7 @@ been left in place should future booting scenarios arise which require its use.
 
 #define _ASMLANGUAGE
 
-#include <nanokernel/x86/asm.h>
+#include <arch/x86/asm.h>
 
 	/* exports (private APIs) */
 

arch/x86/bsp/driver_static_irq_stubs.s

@@ -40,7 +40,7 @@ by x86 BSPs.
 
 #ifndef CONFIG_DYNAMIC_INT_STUBS
 
-#include <nanokernel/x86/asm.h>
+#include <arch/x86/asm.h>
 #include <drivers/ioapic.h>
 #include <drivers/loapic.h>
 #include <drivers/pic.h>

arch/x86/bsp/i8259Boi.s

@@ -47,8 +47,8 @@ a real IRQ has been inserted.
 /* includes */
 #define _ASMLANGUAGE
 
-#include <nanokernel/cpu.h>
-#include <nanokernel/x86/asm.h>
+#include <arch/cpu.h>
+#include <arch/x86/asm.h>
 
 #include <drivers/pic.h>
 #include <board.h>

arch/x86/bsp/rand32-timestamp.c

@@ -39,7 +39,7 @@ number generator.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <drivers/rand32.h>
 
 /*******************************************************************************

arch/x86/bsp/sysFatalErrorHandler.c

@@ -40,7 +40,7 @@ supported BSPs.
 
 #include <cputype.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <toolchain.h>
 #include <sections.h>
 

arch/x86/bsp/systemApic.c

@@ -39,7 +39,7 @@ for the atom_n28xx variant of generic_pc BSP.
 #include <misc/__assert.h>
 #include "board.h"
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <drivers/ioapic.h>
 #include <drivers/loapic.h>
 

arch/x86/bsp/systemPic.c

@@ -38,7 +38,7 @@ for the pentium4 and minuteia variants of the generic_pc BSP.
 
 #include "board.h"
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <drivers/pic.h>
 
 /* Handle possible stray or spurious interrupts on the master and slave PICs */

arch/x86/core/cpuhalt.s

@@ -51,7 +51,7 @@ by nano_cpu_atomic_idle().
 
 #define _ASMLANGUAGE
 
-#include <nanokernel/x86/asm.h>
+#include <arch/x86/asm.h>
 
 	/* exports (external APIs) */
 

arch/x86/core/excstub.s

@@ -41,8 +41,8 @@ and exiting a C exception handler.
 #define _ASMLANGUAGE
 
 #include <nanok.h>
-#include <nanokernel/x86/asm.h>
-#include <nanokernel/x86/arch.h> /* For MK_ISR_NAME */
+#include <arch/x86/asm.h>
+#include <arch/x86/arch.h> /* For MK_ISR_NAME */
 #include <offsets.h>	/* nanokernel structure offset definitions */
 
 

arch/x86/core/ffs.s

@@ -42,7 +42,7 @@ are defined in arch.h.
 
 #define _ASMLANGUAGE
 
-#include <nanokernel/x86/asm.h>
+#include <arch/x86/asm.h>
 #include <offsets.h>	/* nanokernel structure offset definitions */
 
 

arch/x86/core/gdt.c

@@ -43,7 +43,7 @@ for the IA-32 architecture.
 #include <sections.h>
 
 #include <nanok.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <gdt.h>
 
 /* defines */

arch/x86/core/intboiexit.s

@@ -52,7 +52,7 @@ _IntBoiExit() is present.
 */
 
 #define _ASMLANGUAGE
-#include <nanokernel/x86/asm.h>
+#include <arch/x86/asm.h>
 #include <offsets.h>		/* nanokernel structure offset definitions */
 
 

arch/x86/core/intconnect.c

@@ -90,7 +90,7 @@ The _INT_STUB_SIZE macro is defined in include/nanokernel/x86/arch.h.
 #ifndef CONFIG_NO_ISRS
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <nanok.h>
 
 /* the _idt_base_address symbol is generated via a linker script */

arch/x86/core/intstub.s

@@ -43,9 +43,9 @@ entering and exiting a C interrupt handler.
 #ifndef CONFIG_NO_ISRS
 
 #include <nanok.h>
-#include <nanokernel/x86/asm.h>
+#include <arch/x86/asm.h>
 #include <offsets.h>	/* nanokernel structure offset definitions */
-#include <nanokernel/cpu.h>	/* _NANO_ERR_SPURIOUS_INT */
+#include <arch/cpu.h>	/* _NANO_ERR_SPURIOUS_INT */
 
 
 

arch/x86/core/msr.s

@@ -38,7 +38,7 @@ utilities.
 
 #define _ASMLANGUAGE
 
-#include <nanokernel/x86/asm.h>
+#include <arch/x86/asm.h>
 
 	/* exports (internal APIs) */
 

arch/x86/core/nanoatomic.s

@@ -49,7 +49,7 @@ as there is no requirement for this capability.
 
 #define _ASMLANGUAGE
 
-#include <nanokernel/x86/asm.h>
+#include <arch/x86/asm.h>
 
 	/* exports (public APIs) */
 

arch/x86/core/nanoatomic_nolock.c

@@ -50,7 +50,7 @@ as there is no requirement for this capability.
 #if defined(CONFIG_LOCK_INSTRUCTION_UNSUPPORTED)
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 /*******************************************************************************
 *

arch/x86/core/nanofatal.c

@@ -41,7 +41,7 @@ This module provides the _NanoFatalErrorHandler() routine.
 
 #include <cputype.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <nanok.h>
 #include <misc/printk.h>
 

arch/x86/core/swap.s

@@ -44,7 +44,7 @@ save frame on the stack.
 #define _ASMLANGUAGE
 
 #include <nanok.h>
-#include <nanokernel/x86/asm.h>
+#include <arch/x86/asm.h>
 #include <offsets.h>	/* nanokernel structure offset definitions */
 
 	/* exports (internal APIs) */

arch/x86/core/unaligned.s

@@ -42,7 +42,7 @@ performed byte-by-byte.
 
 #ifdef CONFIG_UNALIGNED_WRITE_UNSUPPORTED
 
-#include <nanokernel/x86/asm.h>
+#include <arch/x86/asm.h>
 
 	/* exports (internal APIs) */
 

arch/x86/generic_pc/linker.cmd

@@ -65,9 +65,9 @@ MEMORY
     IDT_LIST        : ORIGIN = 2K, LENGTH = 2K
     }
 
-#include <nanokernel/x86/linker-common-sections.h>
+#include <arch/x86/linker-common-sections.h>
 
 /* start adding bsp specific linker sections here */
 
 /* no sections should appear after linker-epilog.h */
-#include <nanokernel/x86/linker-epilog.h>
+#include <arch/x86/linker-epilog.h>

arch/x86/generic_pc/system.c

@@ -38,7 +38,7 @@ for the generic_pc BSP.
 
 #include <cputype.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include "board.h"
 #include <drivers/uart.h>
 #include <drivers/pic.h>

arch/x86/include/asmPrv.h

@@ -33,7 +33,7 @@
 #ifndef __INCsysX86AsmPrvh
 #define __INCsysX86AsmPrvh
 
-#include <nanokernel/x86/asm.h>
+#include <arch/x86/asm.h>
 
 #ifdef __cplusplus
 extern "C" {

arch/x86/include/gdt.h

@@ -41,7 +41,7 @@ IA-32 architecture.
 
 /* includes */
 
-#include <nanokernel/x86/arch.h>
+#include <arch/x86/arch.h>
 
 #ifndef _ASMLANGUAGE
 

arch/x86/include/nanok.h

@@ -55,7 +55,7 @@ offsets.o module.
 
 #ifndef _ASMLANGUAGE
 #include <nanokernel.h>		   /* public nanokernel API */
-#include <nanokernel/x86/arch.h> /* private IA-32 definitions */
+#include <arch/x86/arch.h> /* private IA-32 definitions */
 #include <stdint.h>
 /*
  * This pulls in the code shared with the IDT generator that actually

arch/x86/interrupt_controller/ioApicIntr.c

@@ -78,7 +78,7 @@ SEE ALSO: loApicIntr.c
 /* includes */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 #include "board.h"
 

arch/x86/interrupt_controller/loApicIntr.c

@@ -106,7 +106,7 @@ INCLUDE FILES: loapic.h
 /* includes */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <stdint.h>
 
 #include "board.h"

arch/x86/quark/linker.cmd

@@ -65,9 +65,9 @@ MEMORY
     IDT_LIST        : ORIGIN = 2K, LENGTH = 2K
     }
 
-#include <nanokernel/x86/linker-common-sections.h>
+#include <arch/x86/linker-common-sections.h>
 
 /* start adding bsp specific linker sections here */
 
 /* no sections should appear after linker-epilog.h */
-#include <nanokernel/x86/linker-epilog.h>
+#include <arch/x86/linker-epilog.h>

arch/x86/quark/system.c

@@ -41,7 +41,7 @@ Handlers for the secondary serial port have not been added.
 
 #include <cputype.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <misc/printk.h>
 #include <misc/__assert.h>
 #include "board.h"

arch/x86/timer/hpet.c

@@ -65,7 +65,7 @@ In a nanokernel-only system this device driver omits more complex capabilities
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <toolchain.h>
 #include <sections.h>
 #include <clock_vars.h>

arch/x86/timer/loApicTimer.c

@@ -46,7 +46,7 @@ After reset, the timer is initialized to zero.
 /* includes */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <toolchain.h>
 #include <sections.h>
 #include <clock_vars.h>

drivers/bluetooth/uart.c

@@ -34,7 +34,7 @@
 #include <stddef.h>
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 #include <board.h>
 #include <drivers/uart.h>

drivers/console/uart_console.c

@@ -38,7 +38,7 @@
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 #include <stdio.h>
 #include <stdint.h>

drivers/interrupt_controller/i8259.c

@@ -86,7 +86,7 @@ the last level acknowledged and serviced.
 /* includes */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <toolchain.h>
 #include <sections.h>
 

drivers/pci/pci.c

@@ -116,7 +116,7 @@ restarting from 0.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <misc/printk.h>
 #include <toolchain.h>
 #include <sections.h>

drivers/pci/pci_config.c

@@ -40,7 +40,7 @@ This module implements the PCI config space access functions
 /* includes */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 #include <pci/pci_mgr.h>
 #include <string.h>

drivers/pci/pci_interface.c

@@ -40,7 +40,7 @@ This module implements the PCI H/W access functions.
 /* includes */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 #include <pci/pci_mgr.h>
 #include <string.h>

drivers/serial/k20UartDrv.c

@@ -43,7 +43,7 @@ INCLUDE FILES: drivers/serial/k20_uart.h
 /* includes */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <stdint.h>
 
 #include <board.h>

drivers/serial/ns16550.c

@@ -59,7 +59,7 @@ INCLUDE FILES: drivers/uart.h
 /* includes */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <stdint.h>
 
 #include <board.h>

drivers/serial/stellarisUartDrv.c

@@ -40,7 +40,7 @@ and STDOUT_CONSOLE APIs.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <misc/__assert.h>
 #include <board.h>
 #include <drivers/uart.h>

drivers/timer/i8253.c

@@ -52,7 +52,7 @@ directly invoke the VIOAPIC APIs to configure/unmask the IRQ.
 /* includes */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <toolchain.h>
 #include <sections.h>
 #include <limits.h>

include/arch/arc/arch.h

@@ -50,14 +50,14 @@ extern "C" {
 #endif
 
 #ifdef CONFIG_CPU_ARCV2
-#include <nanokernel/arc/v2/init.h>
-#include <nanokernel/arc/v2/exc.h>
-#include <nanokernel/arc/v2/irq.h>
-#include <nanokernel/arc/v2/ffs.h>
-#include <nanokernel/arc/v2/error.h>
-#include <nanokernel/arc/v2/misc.h>
-#include <nanokernel/arc/v2/aux_regs.h>
-#include <nanokernel/arc/v2/arcv2_irq_unit.h>
+#include <arch/arc/v2/init.h>
+#include <arch/arc/v2/exc.h>
+#include <arch/arc/v2/irq.h>
+#include <arch/arc/v2/ffs.h>
+#include <arch/arc/v2/error.h>
+#include <arch/arc/v2/misc.h>
+#include <arch/arc/v2/aux_regs.h>
+#include <arch/arc/v2/arcv2_irq_unit.h>
 #endif
 
 #ifdef __cplusplus

include/arch/arc/v2/error.h

@@ -38,7 +38,7 @@ ARC-specific nanokernel error handling interface. Included by ARC/arch.h.
 #ifndef _ARCH_ARC_V2_ERROR_H_
 #define _ARCH_ARC_V2_ERROR_H_
 
-#include <nanokernel/arc/v2/exc.h>
+#include <arch/arc/v2/exc.h>
 
 #ifndef _ASMLANGUAGE
 extern FUNC_NORETURN void _NanoFatalErrorHandler(unsigned int,

include/arch/arc/v2/irq.h

@@ -38,7 +38,7 @@
 #ifndef _ARCH_ARC_V2_IRQ__H_
 #define _ARCH_ARC_V2_IRQ__H_
 
-#include <nanokernel/arc/v2/aux_regs.h>
+#include <arch/arc/v2/aux_regs.h>
 
 #ifdef _ASMLANGUAGE
 GTEXT(_irq_exit);