boards: riscv: Add SiPeed Longan Nano platform

SiPeed Longan Nano is a minimal development board
based on GigaDevice's RISC-V processor.
There are 2 board variations.

longan_nano:      GDGD32VF103CBT6 (128K Flash/32K SRAM)
longan_nano_lite: GDGD32VF103C8T6 ( 64K Flash/20K SRAM)

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>

CODEOWNERS

@@ -153,6 +153,7 @@
 /boards/riscv/rv32m1_vega/                @dleach02
 /boards/riscv/beaglev_starlight_jh7100/   @rajnesh-kanwal
 /boards/riscv/adp_xc7k_ae350/             @cwshu @kevinwang821020 @jimmyzhe
+/boards/riscv/longan_nano/                @soburi
 /boards/riscv/neorv32/                    @henrikbrixandersen
 /boards/shields/                          @erwango
 /boards/shields/atmel_rf2xx/              @nandojve

boards/riscv/longan_nano/Kconfig.board

@@ -0,0 +1,10 @@
+# Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_LONGAN_NANO
+	bool "Sipeed Longan Nano target"
+	depends on SOC_GD32VF103
+
+config BOARD_LONGAN_NANO_LITE
+	bool "Sipeed Longan Nano Lite target"
+	depends on SOC_GD32VF103

boards/riscv/longan_nano/Kconfig.defconfig

@@ -0,0 +1,11 @@
+# Sipeed longan nano Development Board Configuration
+
+# Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
+
+if BOARD_LONGAN_NANO || BOARD_LONGAN_NANO_LITE
+
+config BOARD
+	default "longan_nano" if BOARD_LONGAN_NANO
+	default "longan_nano_lite" if BOARD_LONGAN_NANO_LITE
+
+endif # BOARD_LONGAN_NANO || BOARD_LONGAN_NANO_LITE

boards/riscv/longan_nano/board.cmake

@@ -0,0 +1,10 @@
+# Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(openocd --cmd-pre-init "source [find target/gd32vf103.cfg]")
+
+board_runner_args(openocd "--cmd-pre-load=gd32vf103-pre-load")
+board_runner_args(openocd "--cmd-load=gd32vf103-load")
+board_runner_args(openocd "--cmd-post-verify=gd32vf103-post-verify")
+
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/riscv/longan_nano/doc/index.rst

@@ -0,0 +1,64 @@
+.. _longan_nano:
+
+Sipeed Longan Nano
+##################
+
+Overview
+********
+
+The Sipeed Longan Nano and Longan Nano Lite is an simple and tiny development board with
+an GigaDevice GD32VF103 SoC that based on N200 RISC-V IP core by Nuclei system technology.
+More information can be found on:
+
+- `Sipeed Longan website <https://longan.sipeed.com/en/>`_
+- `GD32VF103 datasheet <https://www.gigadevice.com/datasheet/gd32vf103xxxx-datasheet/>`_
+- `GD32VF103 user manual <http://www.gd32mcu.com/data/documents/shujushouce/GD32VF103_User_Manual_EN_V1.2.pdf>`_
+- `Nuclei website <https://www.nucleisys.com/download.php>`_
+- `Nuclei Bumblebee core documents <https://github.com/nucleisys/Bumblebee_Core_Doc>`_
+- `Nuclei ISA Spec <https://doc.nucleisys.com/nuclei_spec/>`_
+
+Programming and debugging
+*************************
+
+Building
+========
+
+Applications for the ``logan_nano`` board configuration can be built as usual
+(see :ref:`build_an_application`) using the corresponding board name:
+
+.. zephyr-app-commands::
+   :board: logan_nano
+   :goals: build
+
+Flashing
+========
+
+In order to upload the application to the device, you'll need OpenOCD with
+GD32V support. Download the tarball for your OS from the
+`SiPEED longan nano download site
+<http://dl.sipeed.com/LONGAN/platformio/dl-packages/>`_ and extract it.
+
+The Zephyr SDK uses a bundled version of OpenOCD by default. You can
+overwrite that behavior by adding the
+``-DOPENOCD=<path/to/riscv-openocd/bin/openocd>``
+parameter when building:
+
+.. zephyr-app-commands::
+   :board: longan_nano
+   :goals: build
+   :gen-args: -DOPENOCD=<path/to/riscv-openocd/bin/openocd>
+
+When using a custom toolchain it should be enough to have the downloaded
+version of the binary in your ``PATH``.
+
+Now you can flash the application as usual (see :ref:`build_an_application` and
+:ref:`application_run` for more details):
+
+.. code-block:: console
+
+   west flash
+
+Debugging
+=========
+
+Refer to the detailed overview about :ref:`application_debugging`.

boards/riscv/longan_nano/longan_nano.dts

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <gigadevice/gd32vf103Xb.dtsi>
+
+/ {
+	model = "Sipeed Longan Nano";
+	compatible = "sipeed,longan_nano";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+};

boards/riscv/longan_nano/longan_nano.yaml

@@ -0,0 +1,9 @@
+identifier: longan_nano
+name: Sipeed Longan Nano
+type: mcu
+arch: riscv32
+toolchain:
+  - zephyr
+  - xtools
+flash: 128
+ram: 32

boards/riscv/longan_nano/longan_nano_defconfig

@@ -0,0 +1,13 @@
+# Sipeed longan nano Development Board Configuration
+#
+# Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+CONFIG_SOC_SERIES_GD32VF103=y
+CONFIG_SOC_GD32VF103=y
+CONFIG_GD32_HXTAL_8MHZ=y
+
+# enable machine timer
+CONFIG_RISCV_MACHINE_TIMER=y

boards/riscv/longan_nano/longan_nano_lite.dts

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <gigadevice/gd32vf103X8.dtsi>
+
+/ {
+	model = "Sipeed Longan Nano Lite";
+	compatible = "sipeed,longan_nano_lite";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+};

boards/riscv/longan_nano/longan_nano_lite.yaml

@@ -0,0 +1,9 @@
+identifier: longan_nano_lite
+name: Sipeed Longan Nano Lite
+type: mcu
+arch: riscv32
+toolchain:
+  - zephyr
+  - xtools
+flash: 64
+ram: 20

boards/riscv/longan_nano/longan_nano_lite_defconfig

@@ -0,0 +1,13 @@
+# Sipeed Longan Nano Lite board Configuration
+#
+# Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+CONFIG_SOC_SERIES_GD32VF103=y
+CONFIG_SOC_GD32VF103=y
+CONFIG_GD32_HXTAL_8MHZ=y
+
+# enable machine timer
+CONFIG_RISCV_MACHINE_TIMER=y

boards/riscv/longan_nano/support/openocd.cfg

@@ -0,0 +1,33 @@
+# Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
+# SPDX-License-Identifier: Apache-2.0
+
+interface ftdi
+
+ftdi_device_desc "Dual RS232"
+#ftdi_device_desc "Sipeed-Debug"
+#ftdi_device_desc "JTAG Debugger"
+
+ftdi_vid_pid 0x0403 0x6010
+#ftdi_channel 0
+
+ftdi_layout_init 0x0008 0x001b
+ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
+
+adapter_khz 2000
+transport select jtag
+
+proc gd32vf103-pre-load {} {
+	halt
+}
+
+proc gd32vf103-load {file} {
+	flash protect 0 0 last off
+	flash write_image erase $file
+}
+
+
+proc gd32vf103-post-verify {} {
+	mww 0xe004200c 0x4b5a6978
+	mww 0xe0042008 0x01
+	resume
+}