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soc: arm: ambiq: Remove the redundant configurations.

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These non-cached SRAM size and base address configurations
are not needed now.

Signed-off-by: Aaron Ye <aye@ambiq.com>
This commit is contained in:
Aaron Ye 2023-12-29 14:38:34 +08:00 committed by Fabio Baltieri
parent d142958fb6
commit c3e8b731ef
2 changed files with 0 additions and 16 deletions
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8
soc/arm/ambiq/apollo4x/Kconfig.defconfig.apollo4p
View file

@ -7,12 +7,4 @@ if SOC_APOLLO4P
config NUM_IRQS
default 83
DT_NODE_SRAM := /memory@0
config SRAM_NC_SIZE
default $(dt_node_reg_size_int,$(DT_NODE_SRAM),1,K)
config SRAM_NC_BASE_ADDRESS
default $(dt_node_reg_addr_hex,$(DT_NODE_SRAM),1)
endif # SOC_APOLLO4P

8
soc/arm/ambiq/apollo4x/Kconfig.defconfig.apollo4p_blue
View file

@ -7,12 +7,4 @@ if SOC_APOLLO4P_BLUE
config NUM_IRQS
default 83
DT_NODE_SRAM := /memory@0
config SRAM_NC_SIZE
default $(dt_node_reg_size_int,$(DT_NODE_SRAM),1,K)
config SRAM_NC_BASE_ADDRESS
default $(dt_node_reg_addr_hex,$(DT_NODE_SRAM),1)
endif # SOC_APOLLO4P_BLUE